workbench/devs/networks/e1000/e1000_osdep.h

   1 /*
   2  * $Id$
   3  */
   4 /*******************************************************************************
   5
   6   Intel PRO/1000 Linux driver
   7   Copyright(c) 1999 - 2008 Intel Corporation.
   8
   9   This program is free software; you can redistribute it and/or modify it
  10   under the terms and conditions of the GNU General Public License,
  11   version 2, as published by the Free Software Foundation.
  12
  13   This program is distributed in the hope it will be useful, but WITHOUT
  14   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16   more details.
  17
  18   You should have received a copy of the GNU General Public License along with
  19   this program; if not, write to the Free Software Foundation, Inc.,
  20   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21
  22   The full GNU General Public License is included in this distribution in
  23   the file called "COPYING".
  24
  25   Contact Information:
  26   Linux NICS <linux.nics@intel.com>
  27   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  28   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  29
  30 *******************************************************************************/
  31
  32
  33 /* glue for the OS-dependent part of e1000
  34  * includes register access macros
  35  */
  36
  37 #ifndef _E1000_OSDEP_H_
  38 #define _E1000_OSDEP_H_
  39
  40 #include "e1000.h"
  41
  42 #define ADVERTISED_1000baseT_Full           (1 << 5)
  43 #define ADVERTISED_Autoneg                  (1 << 6)
  44 #define ADVERTISED_TP                       (1 << 7)
  45 #define ADVERTISED_FIBRE                    (1 << 10)
  46
  47 #define AUTONEG_DISABLE                     0x00
  48 #define AUTONEG_ENABLE                      0x01
  49
  50 #define E1000_FLAG_HAS_SMBUS                (1 << 0)
  51 #define E1000_FLAG_HAS_INTR_MODERATION      (1 << 4)
  52 #define E1000_FLAG_BAD_TX_CARRIER_STATS_FD  (1 << 6)
  53 #define E1000_FLAG_QUAD_PORT_A              (1 << 8)
  54 #define E1000_FLAG_SMART_POWER_DOWN         (1 << 9)
  55
  56 #define E1000_TX_FLAGS_CSUM                         0x00000001
  57 #define E1000_TX_FLAGS_VLAN                         0x00000002
  58 #define E1000_TX_FLAGS_TSO                          0x00000004
  59 #define E1000_TX_FLAGS_IPV4                         0x00000008
  60 #define E1000_TX_FLAGS_VLAN_MASK                0xffff0000
  61 #define E1000_TX_FLAGS_VLAN_SHIFT               16
  62
  63 #define ALIGN(x,a) (((x)+(a)-1L)&~((a)-1L))
  64 #define min(a, b)  (((a) < (b)) ? (a) : (b))
  65 #define max(a, b)  (((a) > (b)) ? (a) : (b))
  66
  67 #define E1000_MAX_INTR                      10
  68
  69 /* TX/RX descriptor defines */
  70 #define E1000_DEFAULT_TXD                  256
  71 #define E1000_MAX_TXD                      256
  72 #define E1000_MIN_TXD                       80
  73 #define E1000_MAX_82544_TXD               4096
  74
  75 #define E1000_DEFAULT_RXD                  256
  76 #define E1000_MAX_RXD                      256
  77
  78 #define E1000_MIN_RXD                       80
  79 #define E1000_MAX_82544_RXD               4096
  80
  81 #define E1000_MIN_ITR_USECS                 10 /* 100000 irq/sec */
  82 #define E1000_MAX_ITR_USECS              10000 /* 100    irq/sec */
  83
  84
  85 /* this is the size past which hardware will drop packets when setting LPE=0 */
  86 #define MAXIMUM_ETHERNET_VLAN_SIZE          1522
  87
  88 /* Supported Rx Buffer Sizes */
  89 #define E1000_RXBUFFER_128                  128
  90 #define E1000_RXBUFFER_256                  256
  91 #define E1000_RXBUFFER_512                  512
  92 #define E1000_RXBUFFER_1024                 1024
  93 #define E1000_RXBUFFER_2048                 2048
  94 #define E1000_RXBUFFER_4096                 4096
  95 #define E1000_RXBUFFER_8192                 8192
  96 #define E1000_RXBUFFER_16384                16384
  97
  98 /* SmartSpeed delimiters */
  99 #define E1000_SMARTSPEED_DOWNSHIFT 3
 100 #define E1000_SMARTSPEED_MAX       15
 101
 102 /* Packet Buffer allocations */
 103 #define E1000_PBA_BYTES_SHIFT 0xA
 104 #define E1000_TX_HEAD_ADDR_SHIFT 7
 105 #define E1000_PBA_TX_MASK 0xFFFF0000
 106
 107 /* Early Receive defines */
 108 #define E1000_ERT_2048 0x100
 109
 110 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
 111
 112 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
 113 #define E1000_TX_QUEUE_WAKE     16
 114 /* How many Rx Buffers do we bundle into one write to the hardware ? */
 115 #define E1000_RX_BUFFER_WRITE   16      /* Must be power of 2 */
 116
 117 #define AUTO_ALL_MODES            0
 118 #define E1000_EEPROM_82544_APM    0x0004
 119 #define E1000_EEPROM_APME         0x0400
 120
 121 #ifndef E1000_MASTER_SLAVE
 122 /* Switch to override PHY master/slave setting */
 123 #define E1000_MASTER_SLAVE      e1000_ms_hw_default
 124 #endif
 125
 126 /* standard definitions .. */
 127 #ifndef PCIBAR_TYPE_IO
 128 #define PCIBAR_TYPE_IO          0x01
 129 #endif
 130 #ifndef PCICS_COMMAND
 131 #define PCICS_COMMAND           0x04    /* 16 bits */
 132 #endif
 133 #ifndef PCICMB_INVALIDATE
 134 #define PCICMB_INVALIDATE       4           /* Use memory write and invalidate */
 135 #endif
 136
 137 #define PCI_COMMAND_REGISTER   PCICS_COMMAND
 138 #define CMD_MEM_WRT_INVALIDATE (1 << PCICMB_INVALIDATE)
 139
 140 #ifdef __BIG_ENDIAN
 141 #define E1000_BIG_ENDIAN __BIG_ENDIAN
 142 #endif
 143
 144 #if DEBUG > 0
 145 #if defined(intel_debug)
 146 #define E1K_INTELDEBUG
 147 #endif
 148 #endif
 149
 150 #if defined(E1K_INTELDEBUG)
 151 #define DEBUGOUT(S) D(bug("[%s] %s:" S, ((struct e1000Unit *)hw->back)->e1ku_name, __PRETTY_FUNCTION__));
 152 #define DEBUGOUT1(S, A) D(bug("[%s] %s:" S , ((struct e1000Unit *)hw->back)->e1ku_name, __PRETTY_FUNCTION__, A));
 153
 154 #define DEBUGFUNC(F) D(bug("[%s]: " F "()\n", ((struct e1000Unit *)hw->back)->e1ku_name));
 155 #define DEBUGOUT2(S, A, B) D(bug("[%s] %s:" S , ((struct e1000Unit *)hw->back)->e1ku_name, __PRETTY_FUNCTION__, A, B));
 156 #define DEBUGOUT3(S, A, B, C) D(bug("[%s] %s:" S , ((struct e1000Unit *)hw->back)->e1ku_name, __PRETTY_FUNCTION__, A, B, C));
 157 #define DEBUGOUT7(S, A, B, C, D, E, F, G) D(bug("[%s] %s:" S , ((struct e1000Unit *)hw->back)->e1ku_name, __PRETTY_FUNCTION__, A, B, C, D, E, F, G));
 158 #else
 159 #define DEBUGOUT(S)
 160 #define DEBUGOUT1(S, A...)
 161
 162 #define DEBUGFUNC(F) DEBUGOUT(F "\n")
 163 #define DEBUGOUT2 DEBUGOUT1
 164 #define DEBUGOUT3 DEBUGOUT2
 165 #define DEBUGOUT7 DEBUGOUT3
 166 #endif
 167
 168 #define MMIO_R8(addr)           (*((volatile UBYTE *)(addr)))
 169 #define MMIO_R16(addr)          (*((volatile UWORD *)(addr)))
 170 #define MMIO_R32(addr)          (*((volatile ULONG *)(addr)))
 171
 172 extern void MMIO_W8(APTR, UBYTE);
 173 extern void MMIO_W16(APTR, UWORD);
 174 extern void MMIO_W32(APTR, ULONG);
 175
 176 #define E1000_REGISTER(a, reg) (((a)->mac.type >= e1000_82543) ? reg : e1000_translate_register_82542(reg))
 177
 178 #define E1000_WRITE_REG(a, reg, value) (MMIO_W32((APTR) ((a)->hw_addr + E1000_REGISTER(a, reg)), (value)))
 179
 180 #define E1000_READ_REG(a, reg) (*((volatile ULONG *)((a)->hw_addr + E1000_REGISTER(a, reg))))
 181
 182 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) (MMIO_W32((APTR)(((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))), (value)))
 183 #define E1000_READ_REG_ARRAY(a, reg, offset) (*((volatile ULONG *)((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))))
 184
 185 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
 186 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
 187
 188 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) (MMIO_W16((APTR) ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)), (value)))
 189
 190 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) (*((volatile UWORD *)((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))))
 191
 192 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) (MMIO_W8((APTR) ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)), (value)))
 193
 194 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) (*((volatile UBYTE *)((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))))
 195
 196 #define E1000_WRITE_REG_IO(a, reg, offset) do { \
 197     LONGOUT(((a)->io_base), reg);                  \
 198     LONGOUT(((a)->io_base + 4), offset);      } while(0)
 199
 200 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
 201
 202 #define E1000_WRITE_FLASH_REG(a, reg, value) (MMIO_W32((APTR) ((a)->hw_addr + E1000_REGISTER(a, reg)), (value)))
 203
 204 #define E1000_WRITE_FLASH_REG16(a, reg, value) (MMIO_W16((APTR) ((a)->hw_addr + E1000_REGISTER(a, reg)), (value)))
 205
 206 #define E1000_READ_FLASH_REG(a, reg) (*((volatile ULONG *)((a)->hw_addr + E1000_REGISTER(a, reg))))
 207
 208 #define E1000_READ_FLASH_REG16(a, reg) (*((volatile UWORD *)((a)->hw_addr + E1000_REGISTER(a, reg))))
 209
 210 #define SANA2_SPECIAL_STAT_COUNT 3
 211
 212 struct e1000Unit {
 213     struct Node             e1ku_Node;
 214
 215     struct e1000Base        *e1ku_device;                     /* Pointer to our device base */
 216
 217     STRPTR                  e1ku_name;
 218
 219     ULONG                   e1ku_UnitNum;
 220     IPTR                    e1ku_DriverFlags;
 221
 222     OOP_Object              *e1ku_PCIDevice;
 223     OOP_Object              *e1ku_PCIDriver;
 224     IPTR                    e1ku_IRQ;
 225
 226     UWORD                   e1ku_PCIeCap;
 227     int                     e1ku_open_count;
 228     struct SignalSemaphore  e1ku_unit_lock;
 229
 230     LONG                    e1ku_range_count;
 231     struct MinList          e1ku_Openers;
 232     struct MinList          e1ku_multicast_ranges;
 233     struct MinList          e1ku_type_trackers;
 234
 235     ULONG                   e1ku_mtu;
 236     ULONG                   e1ku_ifflags;
 237     struct Sana2DeviceQuery e1ku_Sana2Info;
 238     struct Sana2DeviceStats e1ku_stats;
 239     ULONG                   e1ku_special_stats[SANA2_SPECIAL_STAT_COUNT];
 240
 241     struct Process          *e1ku_Process;
 242
 243     struct MsgPort          *e1ku_input_port;
 244
 245     struct MsgPort          *e1ku_request_ports[REQUEST_QUEUE_COUNT];
 246
 247     struct Interrupt         e1ku_irqhandler;
 248     struct Interrupt         e1ku_touthandler;
 249
 250     struct MsgPort          *e1ku_TimerSlowPort;
 251     struct timerequest      *e1ku_TimerSlowReq;
 252
 253     struct MsgPort          *e1ku_TimerFastPort;
 254     struct timerequest      *e1ku_TimerFastReq;
 255
 256     struct MsgPort          e1ku_DelayPort;
 257     struct timerequest      e1ku_DelayReq;
 258
 259     BYTE                    e1ku_signal_0;
 260     BYTE                    e1ku_signal_1;
 261     BYTE                    e1ku_signal_2;
 262     BYTE                    e1ku_signal_3;
 263
 264     UBYTE                   e1ku_dev_addr[6];
 265     UBYTE                   e1ku_org_addr[6];
 266
 267     struct Interrupt        e1ku_tx_int;
 268
 269 /* Start : Intel e1000 specific */
 270
 271         IPTR                    e1ku_Private00;                 /* Pointer to Intels driver-code hardware struct */
 272     ULONG                   e1ku_MMIOSize;
 273     ULONG                   e1ku_FlashSize;
 274
 275     ULONG                   e1ku_hwflags;
 276
 277     ULONG                   e1ku_txRing_QueueSize;
 278     ULONG                   e1ku_rxRing_QueueSize;
 279     struct e1000_tx_ring    *e1ku_txRing;
 280     struct e1000_rx_ring    *e1ku_rxRing;
 281
 282     APTR                    e1ku_mc_list;
 283
 284     ULONG                   rx_buffer_len;
 285
 286         ULONG                   txd_cmd;
 287
 288     ULONG                   e1ku_frame_max;
 289     ULONG                   e1ku_frame_min;
 290
 291         ULONG                   e1ku_tx_fifo_head;
 292         ULONG                   e1ku_tx_head_addr;
 293         ULONG                   e1ku_tx_fifo_size;
 294
 295         struct e1000_hw_stats *e1ku_hw_stats;
 296
 297         BOOL                    detect_tx_hung;
 298
 299 /* End : Intel e1000 specific */
 300
 301     struct timeval          e1ku_toutPOLL;
 302     BOOL                    e1ku_toutNEED;
 303
 304 };
 305
 306 #define net_device e1000Unit
 307
 308 #define E1000_DESC_UNUSED(R) \
 309         ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
 310         (R)->next_to_clean - (R)->next_to_use - 1)
 311
 312 #define E1000_RX_DESC_EXT(R, i)     \
 313         (&(((union e1000_rx_desc_extended *)((R).desc))[i]))
 314 #define E1000_GET_DESC(R, i, type) ((struct type *)&((R)->desc[i]))
 315 #define E1000_RX_DESC(R, i)             &(R->desc[i])
 316 #define E1000_TX_DESC(R, i)             &(R->desc[i])
 317 #define E1000_CONTEXT_DESC(R, i)        E1000_GET_DESC(R, i, e1000_context_desc)
 318
 319 /* e1000.c definitions */
 320 /* Timer functions */
 321 /* Some workarounds require millisecond delays and are run during interrupt
 322  * context.  Most notably, when establishing link, the phy may need tweaking
 323  * but cannot process phy register reads/writes faster than millisecond
 324  * intervals...and we establish link due to a "link status change" interrupt.
 325  */
 326 void e1000_msec_delay(struct net_device *, ULONG);
 327 void e1000_msec_delay_irq(struct net_device *, ULONG);
 328 void e1000_usec_delay(struct net_device *, ULONG);
 329 #define msec_delay(msec)     e1000_msec_delay((struct net_device *)hw->back, msec)
 330 #define msec_delay_irq(msec) e1000_msec_delay_irq((struct net_device *)hw->back, msec)
 331 #define usec_delay(usec)     e1000_usec_delay((struct net_device *)hw->back, usec)
 332 /* misc */
 333 int request_irq(struct net_device *);
 334 void e1000func_irq_disable(struct net_device *);
 335 void e1000func_irq_enable(struct net_device *);
 336 void e1000func_reset(struct net_device *);
 337 int e1000func_setup_all_tx_resources(struct net_device *);
 338 int e1000func_setup_all_rx_resources(struct net_device *);
 339 void e1000func_configure(struct net_device *);
 340 void e1000func_free_tx_resources(struct net_device *, struct e1000_tx_ring *);
 341 void e1000func_free_rx_resources(struct net_device *, struct e1000_rx_ring *);
 342 int e1000func_set_mac(struct net_device *);
 343 void e1000func_set_multi(struct net_device *);
 344 BOOL e1000func_clean_tx_irq(struct net_device *, struct e1000_tx_ring *);
 345 BOOL e1000func_clean_rx_irq(struct net_device *, struct e1000_rx_ring *);
 346
 347 #endif /* _E1000_OSDEP_H_ */