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Moved IO_GPIOPortIdx to platform (#14127)
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Src / stm32g4xx_ll_dac.c
blob699784153b18cc165477408a107dd2217ecd3c52
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_dac.c
4 * @author MCD Application Team
5 * @brief DAC LL module driver
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19 #if defined(USE_FULL_LL_DRIVER)
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32g4xx_ll_dac.h"
23 #include "stm32g4xx_ll_bus.h"
24
25 #ifdef USE_FULL_ASSERT
26 #include "stm32_assert.h"
27 #else
28 #define assert_param(expr) ((void)0U)
29 #endif
30
31 /** @addtogroup STM32G4xx_LL_Driver
32 * @{
33 */
34
35 #if defined(DAC1) || defined(DAC2) || defined(DAC3) ||defined (DAC4)
36
37 /** @addtogroup DAC_LL DAC
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /* Private macros ------------------------------------------------------------*/
45
46 /** @addtogroup DAC_LL_Private_Macros
47 * @{
48 */
49 #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx)
50 #define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
51 (((__DACX__) == DAC2) ? \
52 ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
53 : \
54 (((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
55 || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2)) \
56 )
57 #else
58 #define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__) \
59 (((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1) \
60 || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2) \
61 )
62 #endif
63
64 #if defined(STM32G474xx) || defined(STM32G484xx)
65 #define IS_LL_DAC_TRIGGER_SOURCE(__DACX__, __TRIGGER_SOURCE__) \
66 ( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
67 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
68 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
69 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
70 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
71 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
72 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
73 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
74 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG1) \
75 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG2) \
76 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG3) \
77 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG4) \
78 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG5) \
79 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_RST_TRG6) \
80 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
81 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
82 || (((__DACX__) == DAC1) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO1))\
83 || (((__DACX__) == DAC2) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO2))\
84 || (((__DACX__) == DAC3) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO3))\
85 || (((__DACX__) == DAC4) && ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_TRGO1))\
86 )
87 #else
88 #define IS_LL_DAC_TRIGGER_SOURCE(__DACX__, __TRIGGER_SOURCE__) \
89 ( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
90 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
91 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
92 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
93 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
94 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9) \
95 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
96 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
97 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
98 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
99 )
100 #endif
101
102 #if defined(STM32G474xx) || defined(STM32G484xx)
103 #define IS_LL_DAC_TRIGGER_SOURCE2(__DACX__, __TRIGGER_SOURCE__) \
104 ( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
105 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
106 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
107 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
108 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
109 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE10) \
110 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
111 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
112 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG1) \
113 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG2) \
114 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG3) \
115 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG4) \
116 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG5) \
117 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_HRTIM_STEP_TRG6) \
118 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
119 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
120 )
121 #else
122 #define IS_LL_DAC_TRIGGER_SOURCE2(__DACX__, __TRIGGER_SOURCE__) \
123 ( ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE) \
124 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO) \
125 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO) \
126 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO) \
127 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO) \
128 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE10) \
129 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO) \
130 || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO) \
131 || (((__DACX__) == DAC3) ? ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM1_TRGO) \
132 : ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM8_TRGO)) \
133 )
134 #endif
135
136 #define IS_LL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__) \
137 ( ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE) \
138 || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
139 || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
140 || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_SAWTOOTH) \
141 )
142 #define IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_MODE__, __WAVE_AUTO_GENERATION_CONFIG__) \
143 ( (((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE) \
144 && ( ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0) \
145 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0) \
146 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0) \
147 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0) \
148 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0) \
149 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0) \
150 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0) \
151 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0) \
152 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0) \
153 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0) \
154 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
155 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0)) \
156 ) \
157 ||(((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
158 && ( ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1) \
159 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3) \
160 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7) \
161 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15) \
162 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31) \
163 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63) \
164 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127) \
165 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255) \
166 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511) \
167 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023) \
168 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047) \
169 || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095)) \
170 ) \
171 ||(((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_SAWTOOTH) \
172 && (((__WAVE_AUTO_GENERATION_CONFIG__) & ~(DAC_STR1_STINCDATA1|DAC_STR1_STDIR1|DAC_STR1_STRSTDATA1)) \
173 == 0UL) \
174 ) \
175 )
176
177 #define IS_LL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__) \
178 ( ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE) \
179 || ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE) \
180 )
181
182 #define IS_LL_DAC_OUTPUT_CONNECTION(__OUTPUT_CONNECTION__) \
183 ( ((__OUTPUT_CONNECTION__) == LL_DAC_OUTPUT_CONNECT_GPIO) \
184 || ((__OUTPUT_CONNECTION__) == LL_DAC_OUTPUT_CONNECT_INTERNAL) \
185 )
186
187 #define IS_LL_DAC_OUTPUT_MODE(__OUTPUT_MODE__) \
188 ( ((__OUTPUT_MODE__) == LL_DAC_OUTPUT_MODE_NORMAL) \
189 || ((__OUTPUT_MODE__) == LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD) \
190 )
191
192 /**
193 * @}
194 */
195
196
197 /* Private function prototypes -----------------------------------------------*/
198
199 /* Exported functions --------------------------------------------------------*/
200 /** @addtogroup DAC_LL_Exported_Functions
201 * @{
202 */
203
204 /** @addtogroup DAC_LL_EF_Init
205 * @{
206 */
207
208 /**
209 * @brief De-initialize registers of the selected DAC instance
210 * to their default reset values.
211 * @param DACx DAC instance
212 * @retval An ErrorStatus enumeration value:
213 * - SUCCESS: DAC registers are de-initialized
214 * - ERROR: not applicable
215 */
216 ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx)
217 {
218 /* Check the parameters */
219 assert_param(IS_DAC_ALL_INSTANCE(DACx));
220
221 #ifdef DAC1
222 if (DACx == DAC1)
223 {
224 /* Force reset of DAC clock */
225 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC1);
226
227 /* Release reset of DAC clock */
228 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC1);
229 }
230 #endif
231 #ifdef DAC2
232 if (DACx == DAC2)
233 {
234 /* Force reset of DAC clock */
235 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC2);
236
237 /* Release reset of DAC clock */
238 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC2);
239 }
240 #endif
241 #ifdef DAC3
242 if (DACx == DAC3)
243 {
244 /* Force reset of DAC clock */
245 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC3);
246
247 /* Release reset of DAC clock */
248 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC3);
249 }
250 #endif
251 #ifdef DAC4
252 if (DACx == DAC4)
253 {
254 /* Force reset of DAC clock */
255 LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_DAC4);
256
257 /* Release reset of DAC clock */
258 LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_DAC4);
259 }
260 #endif
261
262 return SUCCESS;
263 }
264
265 /**
266 * @brief Initialize some features of DAC channel.
267 * @note @ref LL_DAC_Init() aims to ease basic configuration of a DAC channel.
268 * Leaving it ready to be enabled and output:
269 * a level by calling one of
270 * @ref LL_DAC_ConvertData12RightAligned
271 * @ref LL_DAC_ConvertData12LeftAligned
272 * @ref LL_DAC_ConvertData8RightAligned
273 * or one of the supported autogenerated wave.
274 * @note This function allows configuration of:
275 * - Output mode
276 * - Trigger
277 * - Wave generation
278 * @note The setting of these parameters by function @ref LL_DAC_Init()
279 * is conditioned to DAC state:
280 * DAC channel must be disabled.
281 * @param DACx DAC instance
282 * @param DAC_Channel This parameter can be one of the following values:
283 * @arg @ref LL_DAC_CHANNEL_1
284 * @arg @ref LL_DAC_CHANNEL_2 (1)
285 *
286 * (1) On this STM32 serie, parameter not available on all instances.
287 * Refer to device datasheet for channels availability.
288 * @param DAC_InitStruct Pointer to a @ref LL_DAC_InitTypeDef structure
289 * @retval An ErrorStatus enumeration value:
290 * - SUCCESS: DAC registers are initialized
291 * - ERROR: DAC registers are not initialized
292 */
293 ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct)
294 {
295 ErrorStatus status = SUCCESS;
296
297 /* Check the parameters */
298 assert_param(IS_DAC_ALL_INSTANCE(DACx));
299 assert_param(IS_LL_DAC_CHANNEL(DACx, DAC_Channel));
300 assert_param(IS_LL_DAC_TRIGGER_SOURCE(DACx, DAC_InitStruct->TriggerSource));
301 assert_param(IS_LL_DAC_OUTPUT_BUFFER(DAC_InitStruct->OutputBuffer));
302 assert_param(IS_LL_DAC_OUTPUT_CONNECTION(DAC_InitStruct->OutputConnection));
303 assert_param(IS_LL_DAC_OUTPUT_MODE(DAC_InitStruct->OutputMode));
304 assert_param(IS_LL_DAC_WAVE_AUTO_GENER_MODE(DAC_InitStruct->WaveAutoGeneration));
305 if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
306 {
307 assert_param(IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(DAC_InitStruct->WaveAutoGeneration,
308 DAC_InitStruct->WaveAutoGenerationConfig));
309 }
310
311 /* Note: Hardware constraint (refer to description of this function) */
312 /* DAC instance must be disabled. */
313 if (LL_DAC_IsEnabled(DACx, DAC_Channel) == 0U)
314 {
315 /* Configuration of DAC channel: */
316 /* - TriggerSource */
317 /* - WaveAutoGeneration */
318 /* - OutputBuffer */
319 /* - OutputConnection */
320 /* - OutputMode */
321 if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
322 {
323 if (DAC_InitStruct->WaveAutoGeneration == LL_DAC_WAVE_AUTO_GENERATION_SAWTOOTH)
324 {
325 assert_param(IS_LL_DAC_TRIGGER_SOURCE2(DACx, DAC_InitStruct->TriggerSource2));
326
327 MODIFY_REG(DACx->CR,
328 DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
329 DAC_InitStruct->WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
330 );
331 MODIFY_REG(DACx->STMODR,
332 (DAC_STMODR_STINCTRIGSEL1 | DAC_STMODR_STRSTTRIGSEL1) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
333 (
334 ((DAC_InitStruct->TriggerSource >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STRSTTRIGSEL1_Pos)
335 | ((DAC_InitStruct->TriggerSource2 >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STINCTRIGSEL1_Pos)
336 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
337 );
338 WRITE_REG(*(__DAC_PTR_REG_OFFSET(DACx->STR1, (DAC_Channel >> DAC_REG_STRX_REGOFFSET_BITOFFSET_POS) & DAC_REG_STRX_REGOFFSET_MASK_POSBIT0)),
339 DAC_InitStruct->WaveAutoGenerationConfig);
340 }
341 else
342 {
343 MODIFY_REG(DACx->CR,
344 (DAC_CR_TSEL1
345 | DAC_CR_WAVE1
346 | DAC_CR_MAMP1
347 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
348 ,
349 (DAC_InitStruct->TriggerSource
350 | DAC_InitStruct->WaveAutoGeneration
351 | DAC_InitStruct->WaveAutoGenerationConfig
352 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
353 );
354 }
355 }
356 else
357 {
358 MODIFY_REG(DACx->CR,
359 (DAC_CR_TSEL1
360 | DAC_CR_WAVE1
361 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
362 ,
363 (DAC_InitStruct->TriggerSource
364 | LL_DAC_WAVE_AUTO_GENERATION_NONE
365 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
366 );
367 }
368
369 MODIFY_REG(DACx->MCR,
370 (DAC_MCR_MODE1_1
371 | DAC_MCR_MODE1_0
372 | DAC_MCR_MODE1_2
373 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
374 ,
375 (DAC_InitStruct->OutputBuffer
376 | DAC_InitStruct->OutputConnection
377 | DAC_InitStruct->OutputMode
378 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
379 );
380 }
381 else
382 {
383 /* Initialization error: DAC instance is not disabled. */
384 status = ERROR;
385 }
386 return status;
387 }
388
389 /**
390 * @brief Set each @ref LL_DAC_InitTypeDef field to default value.
391 * @param DAC_InitStruct pointer to a @ref LL_DAC_InitTypeDef structure
392 * whose fields will be set to default values.
393 * @retval None
394 */
395 void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct)
396 {
397 /* Set DAC_InitStruct fields to default values */
398 DAC_InitStruct->TriggerSource = LL_DAC_TRIG_SOFTWARE;
399 DAC_InitStruct->TriggerSource2 = LL_DAC_TRIG_SOFTWARE;
400 DAC_InitStruct->WaveAutoGeneration = LL_DAC_WAVE_AUTO_GENERATION_NONE;
401 /* Note: Parameter discarded if wave auto generation is disabled, */
402 /* set anyway to its default value. */
403 DAC_InitStruct->WaveAutoGenerationConfig = LL_DAC_NOISE_LFSR_UNMASK_BIT0;
404 DAC_InitStruct->OutputBuffer = LL_DAC_OUTPUT_BUFFER_ENABLE;
405 DAC_InitStruct->OutputConnection = LL_DAC_OUTPUT_CONNECT_GPIO;
406 DAC_InitStruct->OutputMode = LL_DAC_OUTPUT_MODE_NORMAL;
407 }
408
409 /**
410 * @}
411 */
412
413 /**
414 * @}
415 */
416
417 /**
418 * @}
419 */
420
421 #endif /* DAC1 || DAC2 || DAC3 || DAC4 */
422
423 /**
424 * @}
425 */
426
427 #endif /* USE_FULL_LL_DRIVER */
428
429 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/