Moved IO_GPIOPortIdx to platform (#14127)
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Src / stm32g4xx_ll_lptim.c
blobe77f5089c348163700190fa88164c8f0263a4b6b
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM LL module driver.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 * ******************************************************************************
18 #if defined(USE_FULL_LL_DRIVER)
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32g4xx_ll_lptim.h"
22 #include "stm32g4xx_ll_bus.h"
23 #include "stm32g4xx_ll_rcc.h"
26 #ifdef USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif
32 /** @addtogroup STM32G4xx_LL_Driver
33 * @{
38 /** @addtogroup LPTIM_LL
39 * @{
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /* Private macros ------------------------------------------------------------*/
46 /** @addtogroup LPTIM_LL_Private_Macros
47 * @{
49 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
50 || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
52 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \
53 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \
54 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \
55 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \
56 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \
57 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \
58 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \
59 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
61 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
62 || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
64 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
65 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
66 /**
67 * @}
71 /* Private function prototypes -----------------------------------------------*/
72 /* Private functions ---------------------------------------------------------*/
73 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
74 * @{
76 /**
77 * @}
79 /* Exported functions --------------------------------------------------------*/
80 /** @addtogroup LPTIM_LL_Exported_Functions
81 * @{
84 /** @addtogroup LPTIM_LL_EF_Init
85 * @{
88 /**
89 * @brief Set LPTIMx registers to their reset values.
90 * @param LPTIMx LP Timer instance
91 * @retval An ErrorStatus enumeration value:
92 * - SUCCESS: LPTIMx registers are de-initialized
93 * - ERROR: invalid LPTIMx instance
95 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx)
97 ErrorStatus result = SUCCESS;
99 /* Check the parameters */
100 assert_param(IS_LPTIM_INSTANCE(LPTIMx));
102 if (LPTIMx == LPTIM1)
104 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
105 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
107 else
109 result = ERROR;
112 return result;
116 * @brief Set each fields of the LPTIM_InitStruct structure to its default
117 * value.
118 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
119 * @retval None
121 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
123 /* Set the default configuration */
124 LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
125 LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1;
126 LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
127 LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
131 * @brief Configure the LPTIMx peripheral according to the specified parameters.
132 * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
133 * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
134 * @param LPTIMx LP Timer Instance
135 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
136 * @retval An ErrorStatus enumeration value:
137 * - SUCCESS: LPTIMx instance has been initialized
138 * - ERROR: LPTIMx instance hasn't been initialized
140 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
142 ErrorStatus result = SUCCESS;
143 /* Check the parameters */
144 assert_param(IS_LPTIM_INSTANCE(LPTIMx));
145 assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
146 assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
147 assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
148 assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
150 /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
151 (ENABLE bit is reset to 0).
153 if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
155 result = ERROR;
157 else
159 /* Set CKSEL bitfield according to ClockSource value */
160 /* Set PRESC bitfield according to Prescaler value */
161 /* Set WAVE bitfield according to Waveform value */
162 /* Set WAVEPOL bitfield according to Polarity value */
163 MODIFY_REG(LPTIMx->CFGR,
164 (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
165 LPTIM_InitStruct->ClockSource | \
166 LPTIM_InitStruct->Prescaler | \
167 LPTIM_InitStruct->Waveform | \
168 LPTIM_InitStruct->Polarity);
171 return result;
175 * @}
179 * @}
183 * @brief Disable the LPTIM instance
184 * @rmtoll CR ENABLE LL_LPTIM_Disable
185 * @param LPTIMx Low-Power Timer instance
186 * @note The following sequence is required to solve LPTIM disable HW limitation.
187 * Please check Errata Sheet ES0335 for more details under "MCU may remain
188 * stuck in LPTIM interrupt when entering Stop mode" section.
189 * @retval None
191 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
193 LL_RCC_ClocksTypeDef rcc_clock;
194 uint32_t tmpclksource = 0;
195 uint32_t tmpIER;
196 uint32_t tmpCFGR;
197 uint32_t tmpCMP;
198 uint32_t tmpARR;
199 uint32_t tmpOR;
201 /* Check the parameters */
202 assert_param(IS_LPTIM_INSTANCE(LPTIMx));
204 __disable_irq();
206 /********** Save LPTIM Config *********/
207 /* Save LPTIM source clock */
208 switch ((uint32_t)LPTIMx)
210 case LPTIM1_BASE:
211 tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
212 break;
213 default:
214 break;
217 /* Save LPTIM configuration registers */
218 tmpIER = LPTIMx->IER;
219 tmpCFGR = LPTIMx->CFGR;
220 tmpCMP = LPTIMx->CMP;
221 tmpARR = LPTIMx->ARR;
222 tmpOR = LPTIMx->OR;
224 /************* Reset LPTIM ************/
225 (void)LL_LPTIM_DeInit(LPTIMx);
227 /********* Restore LPTIM Config *******/
228 LL_RCC_GetSystemClocksFreq(&rcc_clock);
230 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
232 /* Force LPTIM source kernel clock from APB */
233 switch ((uint32_t)LPTIMx)
235 case LPTIM1_BASE:
236 LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
237 break;
238 default:
239 break;
242 if (tmpCMP != 0UL)
244 /* Restore CMP and ARR registers (LPTIM should be enabled first) */
245 LPTIMx->CR |= LPTIM_CR_ENABLE;
246 LPTIMx->CMP = tmpCMP;
248 /* Polling on CMP write ok status after above restore operation */
251 rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
252 } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
254 LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
257 if (tmpARR != 0UL)
259 LPTIMx->CR |= LPTIM_CR_ENABLE;
260 LPTIMx->ARR = tmpARR;
262 LL_RCC_GetSystemClocksFreq(&rcc_clock);
263 /* Polling on ARR write ok status after above restore operation */
266 rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
267 } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
269 LL_LPTIM_ClearFlag_ARROK(LPTIMx);
272 /* Restore LPTIM source kernel clock */
273 LL_RCC_SetLPTIMClockSource(tmpclksource);
276 /* Restore configuration registers (LPTIM should be disabled first) */
277 LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
278 LPTIMx->IER = tmpIER;
279 LPTIMx->CFGR = tmpCFGR;
280 LPTIMx->OR = tmpOR;
282 __enable_irq();
286 * @}
292 * @}
295 #endif /* USE_FULL_LL_DRIVER */
297 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/