2 ******************************************************************************
3 * @file stm32h7xx_ll_delayblock.c
4 * @author MCD Application Team
5 * @brief DelayBlock Low Layer HAL module driver.
7 * This file provides firmware functions to manage the following
8 * functionalities of the Delay Block peripheral:
9 * + input clock frequency range 25MHz to 208MHz
10 * + up to 12 oversampling phases
13 ==============================================================================
14 ##### DelayBlock peripheral features #####
15 ==============================================================================
16 [..] The Delay block is used to generate an Output clock which is de-phased from the Input
17 clock. The phase of the Output clock is programmed by FW. The Output clock is then used
18 to clock the receive data in i.e. a SDMMC or QSPI interface.
19 The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
20 and recenter the Output clock phase to the receive data.
22 [..] The Delay Block features include the following:
23 (+) Input clock frequency range 25MHz to 208MHz.
24 (+) Up to 12 oversampling phases.
26 ##### How to use this driver #####
27 ==============================================================================
29 This driver is a considered as a driver of service for external devices drivers
30 that interfaces with the DELAY peripheral.
31 The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
32 and configure the Output clock phase.
33 The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.
37 ******************************************************************************
40 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
41 * All rights reserved.</center></h2>
43 * This software component is licensed by ST under BSD 3-Clause license,
44 * the "License"; You may not use this file except in compliance with the
45 * License. You may obtain a copy of the License at:
46 * opensource.org/licenses/BSD-3-Clause
48 ******************************************************************************
51 /* Includes ------------------------------------------------------------------*/
52 #include "stm32h7xx_hal.h"
54 /** @addtogroup STM32H7xx_HAL_Driver
58 /** @defgroup DELAYBLOCK_LL DELAYBLOCK_LL
59 * @brief Low layer module for Delay Block
63 #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_QSPI_MODULE_ENABLED)
65 /* Private typedef -----------------------------------------------------------*/
66 /* Private define ------------------------------------------------------------*/
67 #define DLYB_TIMEOUT 0xFFU
68 /* Private macro -------------------------------------------------------------*/
69 /* Private variables ---------------------------------------------------------*/
70 /* Private function prototypes -----------------------------------------------*/
71 /* Exported functions --------------------------------------------------------*/
73 /** @defgroup DelayBlock_LL_Exported_Functions Delay Block Low Layer Exported Functions
77 /** @defgroup HAL_DELAY_LL_Group1 Initialization de-initialization functions
78 * @brief Initialization and Configuration functions
81 ===============================================================================
82 ##### Initialization and de-initialization functions #####
83 ===============================================================================
84 [..] This section provides functions allowing to:
92 * @brief Enable the Delay Block instance.
93 * @param DLYBx: Pointer to DLYB instance.
96 HAL_StatusTypeDef
DelayBlock_Enable(DLYB_TypeDef
*DLYBx
)
100 uint32_t sel_current
;
101 uint32_t unit_current
;
106 DLYBx
->CR
= DLYB_CR_DEN
| DLYB_CR_SEN
;
108 for (sel_current
= 0U; sel_current
< DLYB_MAX_SELECT
; sel_current
++)
110 /* lng_mask is the mask bit for the LNG field to check the output of the UNITx*/
111 lng_mask
= DLYB_CFGR_LNG_0
<< sel_current
;
113 for (unit_current
= 0U; unit_current
< DLYB_MAX_UNIT
; unit_current
++)
115 /* Set the Delay of the UNIT(s)*/
116 DLYBx
->CFGR
= DLYB_MAX_SELECT
| (unit_current
<< DLYB_CFGR_UNIT_Pos
);
118 /* Waiting for a LNG valid value */
119 tickstart
= HAL_GetTick();
120 while ((DLYBx
->CFGR
& DLYB_CFGR_LNGF
) == 0U)
122 if((HAL_GetTick() - tickstart
) >= DLYB_TIMEOUT
)
129 if ((DLYBx
->CFGR
& lng_mask
) != 0U)
131 /* 1/2 period HIGH is detected */
137 /* 1/2 period LOW detected after the HIGH 1/2 period => FULL PERIOD passed*/
138 if((DLYBx
->CFGR
& lng_mask
) == 0U)
140 /* Save the first result */
144 sel
= sel_current
+ 1U;
152 /* Apply the Tuning settings */
154 DLYBx
->CR
= DLYB_CR_DEN
| DLYB_CR_SEN
;
155 DLYBx
->CFGR
= sel
| (unit
<< DLYB_CFGR_UNIT_Pos
);
156 DLYBx
->CR
= DLYB_CR_DEN
;
162 * @brief Disable the Delay Block instance.
163 * @param DLYBx: Pointer to DLYB instance.
166 HAL_StatusTypeDef
DelayBlock_Disable(DLYB_TypeDef
*DLYBx
)
174 * @brief Configure the Delay Block instance.
175 * @param DLYBx: Pointer to DLYB instance.
176 * @param PhaseSel: Phase selection [0..11].
177 * @param Units: Delay units[0..127].
180 HAL_StatusTypeDef
DelayBlock_Configure(DLYB_TypeDef
*DLYBx
,uint32_t PhaseSel
, uint32_t Units
)
182 /* Apply the delay settings */
185 DLYBx
->CR
= DLYB_CR_DEN
| DLYB_CR_SEN
;
186 DLYBx
->CFGR
= PhaseSel
| (Units
<< DLYB_CFGR_UNIT_Pos
);
187 DLYBx
->CR
= DLYB_CR_DEN
;
201 #endif /* (HAL_SD_MODULE_ENABLED) & (HAL_QSPI_MODULE_ENABLED)*/
210 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/