src/platform/APM32/platform_mcu.h

   1 /*
   2  * This file is part of Betaflight.
   3  *
   4  * Betaflight is free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Betaflight is distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #pragma once
  22
  23 #ifdef APM32F4
  24
  25 #include "apm32f4xx.h"
  26 #include "apm32f4xx_dal.h"
  27 #include "system_apm32f4xx.h"
  28
  29 #include "apm32f4xx_ddl_spi.h"
  30 #include "apm32f4xx_ddl_gpio.h"
  31 #include "apm32f4xx_ddl_dma.h"
  32 #include "apm32f4xx_ddl_rcm.h"
  33 #include "apm32f4xx_ddl_bus.h"
  34 #include "apm32f4xx_ddl_tmr.h"
  35 #include "apm32f4xx_ddl_system.h"
  36 #include "apm32f4xx_ddl_adc.h"
  37
  38 #include "apm32f4xx_ddl_ex.h"
  39
  40 // Aliases
  41 #define HAL_StatusTypeDef           DAL_StatusTypeDef
  42 #define HAL_RCC_GetSysClockFreq     DAL_RCM_GetSysClockFreq
  43 #define HAL_IncTick                 DAL_IncTick
  44 #define HAL_TIM_IC_Start_IT         DAL_TMR_IC_Start_IT
  45 #define HAL_TIM_IC_ConfigChannel    DAL_TMR_IC_ConfigChannel
  46 #define HAL_NVIC_SetPriority        DAL_NVIC_SetPriority
  47 #define HAL_NVIC_EnableIRQ          DAL_NVIC_EnableIRQ
  48
  49 #define __HAL_TIM_GetAutoreload     __DAL_TMR_GET_AUTORELOAD
  50 #define __HAL_TIM_SetCounter        __DAL_TMR_SET_COUNTER
  51 #define __HAL_DMA_GET_COUNTER       __DAL_DMA_GET_COUNTER
  52 #define __HAL_UART_ENABLE_IT        __DAL_UART_ENABLE_IT
  53
  54 #define LL_TIM_InitTypeDef          DDL_TMR_InitTypeDef
  55 #define LL_TIM_DeInit               DDL_TMR_DeInit
  56 #define LL_TIM_OC_InitTypeDef       DDL_TMR_OC_InitTypeDef
  57 #define LL_TIM_IC_InitTypeDef       DDL_TMR_IC_InitTypeDef
  58 #define LL_TIM_SetAutoReload        DDL_TMR_SetAutoReload
  59 #define LL_TIM_DisableIT_UPDATE     DDL_TMR_DisableIT_UPDATE
  60 #define LL_TIM_DisableCounter       DDL_TMR_DisableCounter
  61 #define LL_TIM_SetCounter           DDL_TMR_SetCounter
  62 #define LL_TIM_ClearFlag_UPDATE     DDL_TMR_ClearFlag_UPDATE
  63 #define LL_TIM_EnableIT_UPDATE      DDL_TMR_EnableIT_UPDATE
  64 #define LL_TIM_EnableCounter        DDL_TMR_EnableCounter
  65 #define LL_TIM_GenerateEvent_UPDATE DDL_TMR_GenerateEvent_UPDATE
  66 #define LL_EX_TIM_DisableIT         DDL_EX_TMR_DisableIT
  67
  68 #define LL_DMA_InitTypeDef          DDL_DMA_InitTypeDef
  69 #define LL_EX_DMA_DeInit            DDL_EX_DMA_DeInit
  70 #define LL_EX_DMA_Init              DDL_EX_DMA_Init
  71 #define LL_EX_DMA_DisableResource   DDL_EX_DMA_DisableResource
  72 #define LL_EX_DMA_EnableResource    DDL_EX_DMA_EnableResource
  73 #define LL_EX_DMA_GetDataLength     DDL_EX_DMA_GetDataLength
  74 #define LL_EX_DMA_SetDataLength     DDL_EX_DMA_SetDataLength
  75 #define LL_EX_DMA_EnableIT_TC       DDL_EX_DMA_EnableIT_TC
  76
  77 #define TIM_TypeDef                 TMR_TypeDef
  78 #define TIM_HandleTypeDef           TMR_HandleTypeDef
  79 #define TIM_ICPOLARITY_RISING       TMR_ICPOLARITY_RISING
  80 #define TIM_CCxChannelCmd           TMR_CCxChannelCmd
  81 #define TIM_CCx_DISABLE             TMR_CCx_DISABLE
  82 #define TIM_CCx_ENABLE              TMR_CCx_ENABLE
  83 #define TIM_CCxChannelCmd           TMR_CCxChannelCmd
  84 #define TIM_IC_InitTypeDef          TMR_IC_InitTypeDef
  85 #define TIM_ICPOLARITY_FALLING      TMR_ICPOLARITY_FALLING
  86 #define TIM_ICSELECTION_DIRECTTI    TMR_ICSELECTION_DIRECTTI
  87 #define TIM_ICPSC_DIV1              TMR_ICPSC_DIV1
  88
  89 #ifdef USE_DAL_DRIVER
  90 #define USE_HAL_DRIVER
  91 #endif
  92
  93 #ifdef USE_FULL_DDL_DRIVER
  94 #define USE_FULL_LL_DRIVER
  95 #endif
  96
  97 #endif // APM32F4
  98
  99 #if defined(APM32F405xx) || defined(APM32F407xx) || defined(APM32F415xx) || defined(APM32F417xx)
 100 #define USE_FAST_DATA
 101
 102 // Chip Unique ID on APM32F405
 103 #define U_ID_0 (*(uint32_t*)0x1fff7a10)
 104 #define U_ID_1 (*(uint32_t*)0x1fff7a14)
 105 #define U_ID_2 (*(uint32_t*)0x1fff7a18)
 106
 107 #define USE_PIN_AF
 108
 109 #ifndef APM32F4
 110 #define APM32F4
 111 #endif
 112
 113 #endif
 114
 115 #define USE_RPM_FILTER
 116 #define USE_DYN_IDLE
 117 #define USE_DYN_NOTCH_FILTER
 118 #define USE_ADC_INTERNAL
 119 #define USE_USB_MSC
 120 #define USE_PERSISTENT_MSC_RTC
 121 #define USE_MCO
 122 #define USE_DMA_SPEC
 123 #define USE_PERSISTENT_OBJECTS
 124 #define USE_LATE_TASK_STATISTICS
 125
 126 #define USE_OVERCLOCK
 127
 128 #define TASK_GYROPID_DESIRED_PERIOD     125 // 125us = 8kHz
 129 #define SCHEDULER_DELAY_LIMIT           10
 130
 131 #define DEFAULT_CPU_OVERCLOCK 0
 132
 133 #define FAST_IRQ_HANDLER
 134
 135 #define DMA_DATA_ZERO_INIT
 136 #define DMA_DATA
 137 #define STATIC_DMA_DATA_AUTO        static
 138
 139 // Data in RAM which is guaranteed to not be reset on hot reboot
 140 #define PERSISTENT                  __attribute__ ((section(".persistent_data"), aligned(4)))
 141
 142 #define DMA_RAM
 143 #define DMA_RW_AXI
 144 #define DMA_RAM_R
 145 #define DMA_RAM_W
 146 #define DMA_RAM_RW
 147
 148 #define USE_TIMER_MGMT
 149 #define USE_TIMER_AF
 150
 151 #if defined(APM32F4)
 152
 153 //speed is packed inside modebits 5 and 2,
 154 #define IO_CONFIG(mode, speed, pupd) ((mode) | ((speed) << 2) | ((pupd) << 5))
 155
 156 #define IOCFG_OUT_PP         IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_LOW,  GPIO_NOPULL)
 157 #define IOCFG_OUT_PP_UP      IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_LOW,  GPIO_PULLUP)
 158 #define IOCFG_OUT_PP_25      IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_HIGH, GPIO_NOPULL)
 159 #define IOCFG_OUT_OD         IO_CONFIG(GPIO_MODE_OUTPUT_OD, GPIO_SPEED_FREQ_LOW,  GPIO_NOPULL)
 160 #define IOCFG_AF_PP          IO_CONFIG(GPIO_MODE_AF_PP,     GPIO_SPEED_FREQ_LOW,  GPIO_NOPULL)
 161 #define IOCFG_AF_PP_PD       IO_CONFIG(GPIO_MODE_AF_PP,     GPIO_SPEED_FREQ_LOW,  GPIO_PULLDOWN)
 162 #define IOCFG_AF_PP_UP       IO_CONFIG(GPIO_MODE_AF_PP,     GPIO_SPEED_FREQ_LOW,  GPIO_PULLUP)
 163 #define IOCFG_AF_OD          IO_CONFIG(GPIO_MODE_AF_OD,     GPIO_SPEED_FREQ_LOW,  GPIO_NOPULL)
 164 #define IOCFG_IPD            IO_CONFIG(GPIO_MODE_INPUT,     GPIO_SPEED_FREQ_LOW,  GPIO_PULLDOWN)
 165 #define IOCFG_IPU            IO_CONFIG(GPIO_MODE_INPUT,     GPIO_SPEED_FREQ_LOW,  GPIO_PULLUP)
 166 #define IOCFG_IN_FLOATING    IO_CONFIG(GPIO_MODE_INPUT,     GPIO_SPEED_FREQ_LOW,  GPIO_NOPULL)
 167 #define IOCFG_IPU_25         IO_CONFIG(GPIO_MODE_INPUT,     GPIO_SPEED_FREQ_HIGH, GPIO_PULLUP)
 168
 169 #define IO_CONFIG_GET_MODE(cfg)  (((cfg) >> 0) & 0x03)
 170 #define IO_CONFIG_GET_SPEED(cfg) (((cfg) >> 2) & 0x03)
 171 #define IO_CONFIG_GET_OTYPE(cfg) (((cfg) >> 4) & 0x01)
 172 #define IO_CONFIG_GET_PULL(cfg)  (((cfg) >> 5) & 0x03)
 173
 174 #define SPI_IO_AF_CFG           IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
 175 #define SPI_IO_AF_SCK_CFG_HIGH  IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
 176 #define SPI_IO_AF_SCK_CFG_LOW   IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN)
 177 #define SPI_IO_AF_SDI_CFG       IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
 178 #define SPI_IO_CS_CFG           IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
 179 #define SPI_IO_CS_HIGH_CFG      IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
 180
 181 #define SPIDEV_COUNT 3
 182
 183 #define CHECK_SPI_RX_DATA_AVAILABLE(instance) LL_SPI_IsActiveFlag_RXNE(instance)
 184 #define SPI_RX_DATA_REGISTER(base) ((base)->DR)
 185
 186 #define MAX_SPI_PIN_SEL 2
 187
 188 #define USE_TX_IRQ_HANDLER
 189
 190 #define UART_TX_BUFFER_ATTRIBUTE /* NONE */
 191 #define UART_RX_BUFFER_ATTRIBUTE /* NONE */
 192
 193 #define PLATFORM_TRAIT_RCC 1
 194 #define UART_TRAIT_AF_PORT 1
 195
 196 #define UARTHARDWARE_MAX_PINS 4
 197
 198 #define UART_REG_RXD(base) ((base)->DATA)
 199 #define UART_REG_TXD(base) ((base)->DATA)
 200
 201 #define DMA_TRAIT_CHANNEL 1
 202
 203 #define USB_DP_PIN PA12
 204
 205 #define FLASH_CONFIG_BUFFER_TYPE uint32_t
 206 #endif