src/platform/common/stm32/bus_spi_pinconfig.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdbool.h>
  22 #include <stdint.h>
  23 #include <string.h>
  24
  25 #include "platform.h"
  26
  27 #ifdef USE_SPI
  28
  29 #include "build/debug.h"
  30
  31 #include "drivers/bus_spi.h"
  32 #include "drivers/bus_spi_impl.h"
  33 #include "drivers/dma.h"
  34 #include "drivers/exti.h"
  35 #include "drivers/io.h"
  36 #include "drivers/rcc.h"
  37
  38 #include "pg/bus_spi.h"
  39
  40 const spiHardware_t spiHardware[] = {
  41 #ifdef STM32F4
  42     {
  43         .device = SPIDEV_1,
  44         .reg = SPI1,
  45         .sckPins = {
  46             { DEFIO_TAG_E(PA5) },
  47             { DEFIO_TAG_E(PB3) },
  48         },
  49         .misoPins = {
  50             { DEFIO_TAG_E(PA6) },
  51             { DEFIO_TAG_E(PB4) },
  52         },
  53         .mosiPins = {
  54             { DEFIO_TAG_E(PA7) },
  55             { DEFIO_TAG_E(PB5) },
  56         },
  57         .af = GPIO_AF_SPI1,
  58         .rcc = RCC_APB2(SPI1),
  59     },
  60     {
  61         .device = SPIDEV_2,
  62         .reg = SPI2,
  63         .sckPins = {
  64             { DEFIO_TAG_E(PB10) },
  65             { DEFIO_TAG_E(PB13) },
  66         },
  67         .misoPins = {
  68             { DEFIO_TAG_E(PB14) },
  69             { DEFIO_TAG_E(PC2) },
  70         },
  71         .mosiPins = {
  72             { DEFIO_TAG_E(PB15) },
  73             { DEFIO_TAG_E(PC3) },
  74         },
  75         .af = GPIO_AF_SPI2,
  76         .rcc = RCC_APB1(SPI2),
  77     },
  78     {
  79         .device = SPIDEV_3,
  80         .reg = SPI3,
  81         .sckPins = {
  82             { DEFIO_TAG_E(PB3) },
  83             { DEFIO_TAG_E(PC10) },
  84         },
  85         .misoPins = {
  86             { DEFIO_TAG_E(PB4) },
  87             { DEFIO_TAG_E(PC11) },
  88         },
  89         .mosiPins = {
  90             { DEFIO_TAG_E(PB5) },
  91             { DEFIO_TAG_E(PC12) },
  92         },
  93         .af = GPIO_AF_SPI3,
  94         .rcc = RCC_APB1(SPI3),
  95     },
  96 #endif
  97 #ifdef STM32F7
  98     {
  99         .device = SPIDEV_1,
 100         .reg = SPI1,
 101         .sckPins = {
 102             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 103             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 104         },
 105         .misoPins = {
 106             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 107             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 108         },
 109         .mosiPins = {
 110             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 111             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 112         },
 113         .rcc = RCC_APB2(SPI1),
 114         .dmaIrqHandler = DMA2_ST3_HANDLER,
 115     },
 116     {
 117         .device = SPIDEV_2,
 118         .reg = SPI2,
 119         .sckPins = {
 120             { DEFIO_TAG_E(PA9), GPIO_AF5_SPI2 },
 121             { DEFIO_TAG_E(PB10), GPIO_AF5_SPI2 },
 122             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 123             { DEFIO_TAG_E(PD3), GPIO_AF5_SPI2 },
 124         },
 125         .misoPins = {
 126             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 127             { DEFIO_TAG_E(PC2), GPIO_AF5_SPI2 },
 128         },
 129         .mosiPins = {
 130             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 131             { DEFIO_TAG_E(PC1), GPIO_AF5_SPI2 },
 132             { DEFIO_TAG_E(PC3), GPIO_AF5_SPI2 },
 133         },
 134         .rcc = RCC_APB1(SPI2),
 135         .dmaIrqHandler = DMA1_ST4_HANDLER,
 136     },
 137     {
 138         .device = SPIDEV_3,
 139         .reg = SPI3,
 140         .sckPins = {
 141             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 142             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 143         },
 144         .misoPins = {
 145             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 146             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 147         },
 148         .mosiPins = {
 149             { DEFIO_TAG_E(PB2), GPIO_AF7_SPI3 },
 150             { DEFIO_TAG_E(PB5), GPIO_AF6_SPI3 },
 151             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 152             { DEFIO_TAG_E(PD6), GPIO_AF5_SPI3 },
 153         },
 154         .rcc = RCC_APB1(SPI3),
 155         .dmaIrqHandler = DMA1_ST7_HANDLER,
 156     },
 157     {
 158         .device = SPIDEV_4,
 159         .reg = SPI4,
 160         .sckPins = {
 161             { DEFIO_TAG_E(PE2), GPIO_AF5_SPI4 },
 162             { DEFIO_TAG_E(PE12), GPIO_AF5_SPI4 },
 163         },
 164         .misoPins = {
 165             { DEFIO_TAG_E(PE5), GPIO_AF5_SPI4 },
 166             { DEFIO_TAG_E(PE13), GPIO_AF5_SPI4 },
 167         },
 168         .mosiPins = {
 169             { DEFIO_TAG_E(PE6), GPIO_AF5_SPI4 },
 170             { DEFIO_TAG_E(PE14), GPIO_AF5_SPI4 },
 171         },
 172         .rcc = RCC_APB2(SPI4),
 173         .dmaIrqHandler = DMA2_ST1_HANDLER,
 174     },
 175 #endif
 176 #ifdef STM32H7
 177     {
 178         .device = SPIDEV_1,
 179         .reg = SPI1,
 180         .sckPins = {
 181             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 182             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 183         },
 184         .misoPins = {
 185             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 186             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 187             { DEFIO_TAG_E(PG9), GPIO_AF5_SPI1 },
 188         },
 189         .mosiPins = {
 190             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 191             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 192             { DEFIO_TAG_E(PD7), GPIO_AF5_SPI1 },
 193         },
 194         .rcc = RCC_APB2(SPI1),
 195         //.dmaIrqHandler = DMA2_ST3_HANDLER,
 196     },
 197     {
 198         .device = SPIDEV_2,
 199         .reg = SPI2,
 200         .sckPins = {
 201             { DEFIO_TAG_E(PA9), GPIO_AF5_SPI2 },
 202             { DEFIO_TAG_E(PA12), GPIO_AF5_SPI2 },
 203             { DEFIO_TAG_E(PB10), GPIO_AF5_SPI2 },
 204             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 205             { DEFIO_TAG_E(PD3), GPIO_AF5_SPI2 },
 206         },
 207         .misoPins = {
 208             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 209             { DEFIO_TAG_E(PC2), GPIO_AF5_SPI2 },
 210         },
 211         .mosiPins = {
 212             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 213             { DEFIO_TAG_E(PC1), GPIO_AF5_SPI2 },
 214             { DEFIO_TAG_E(PC3), GPIO_AF5_SPI2 },
 215         },
 216         .rcc = RCC_APB1L(SPI2),
 217         //.dmaIrqHandler = DMA1_ST4_HANDLER,
 218     },
 219     {
 220         .device = SPIDEV_3,
 221         .reg = SPI3,
 222         .sckPins = {
 223             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 224             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 225         },
 226         .misoPins = {
 227             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 228             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 229         },
 230         .mosiPins = {
 231             { DEFIO_TAG_E(PB2), GPIO_AF7_SPI3 },
 232             { DEFIO_TAG_E(PB5), GPIO_AF7_SPI3 },
 233             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 234             { DEFIO_TAG_E(PD6), GPIO_AF5_SPI3 },
 235         },
 236         .rcc = RCC_APB1L(SPI3),
 237         //.dmaIrqHandler = DMA1_ST7_HANDLER,
 238     },
 239     {
 240         .device = SPIDEV_4,
 241         .reg = SPI4,
 242         .sckPins = {
 243             { DEFIO_TAG_E(PE2), GPIO_AF5_SPI4 },
 244             { DEFIO_TAG_E(PE12), GPIO_AF5_SPI4 },
 245         },
 246         .misoPins = {
 247             { DEFIO_TAG_E(PE5), GPIO_AF5_SPI4 },
 248             { DEFIO_TAG_E(PE13), GPIO_AF5_SPI4 },
 249         },
 250         .mosiPins = {
 251             { DEFIO_TAG_E(PE6), GPIO_AF5_SPI4 },
 252             { DEFIO_TAG_E(PE14), GPIO_AF5_SPI4 },
 253         },
 254         .rcc = RCC_APB2(SPI4),
 255         //.dmaIrqHandler = DMA2_ST1_HANDLER,
 256     },
 257     {
 258         .device = SPIDEV_5,
 259         .reg = SPI5,
 260         .sckPins = {
 261             { DEFIO_TAG_E(PF7), GPIO_AF5_SPI5 },
 262         },
 263         .misoPins = {
 264             { DEFIO_TAG_E(PF8), GPIO_AF5_SPI5 },
 265         },
 266         .mosiPins = {
 267             { DEFIO_TAG_E(PF11), GPIO_AF5_SPI5 },
 268         },
 269         .rcc = RCC_APB2(SPI5),
 270         //.dmaIrqHandler = DMA2_ST1_HANDLER,
 271     },
 272     {
 273         .device = SPIDEV_6,
 274         .reg = SPI6,
 275         .sckPins = {
 276             { DEFIO_TAG_E(PA5), GPIO_AF8_SPI6 },
 277             { DEFIO_TAG_E(PB3), GPIO_AF8_SPI6 },
 278         },
 279         .misoPins = {
 280             { DEFIO_TAG_E(PA6), GPIO_AF8_SPI6 },
 281             { DEFIO_TAG_E(PB4), GPIO_AF8_SPI6 },
 282         },
 283         .mosiPins = {
 284             { DEFIO_TAG_E(PA7), GPIO_AF8_SPI6 },
 285             { DEFIO_TAG_E(PB5), GPIO_AF8_SPI6 },
 286         },
 287         .rcc = RCC_APB4(SPI6),
 288         //.dmaIrqHandler = DMA2_ST1_HANDLER,
 289     },
 290 #endif
 291 #ifdef STM32G4
 292     {
 293         .device = SPIDEV_1,
 294         .reg = SPI1,
 295         .sckPins = {
 296             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 297             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 298         },
 299         .misoPins = {
 300             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 301             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 302         },
 303         .mosiPins = {
 304             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 305             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 306         },
 307         .rcc = RCC_APB2(SPI1),
 308         //.dmaIrqHandler = DMA2_ST3_HANDLER,
 309     },
 310     {
 311         .device = SPIDEV_2,
 312         .reg = SPI2,
 313         .sckPins = {
 314             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 315         },
 316         .misoPins = {
 317             { DEFIO_TAG_E(PA10), GPIO_AF5_SPI2 },
 318             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 319         },
 320         .mosiPins = {
 321             { DEFIO_TAG_E(PA11), GPIO_AF5_SPI2 },
 322             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 323         },
 324         .rcc = RCC_APB11(SPI2),
 325         //.dmaIrqHandler = DMA1_ST4_HANDLER,
 326     },
 327     {
 328         .device = SPIDEV_3,
 329         .reg = SPI3,
 330         .sckPins = {
 331             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 332             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 333         },
 334         .misoPins = {
 335             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 336             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 337         },
 338         .mosiPins = {
 339             { DEFIO_TAG_E(PB5), GPIO_AF6_SPI3 },
 340             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 341         },
 342         .rcc = RCC_APB11(SPI3),
 343         //.dmaIrqHandler = DMA1_ST7_HANDLER,
 344     },
 345 #endif
 346 #ifdef AT32F4
 347     {
 348         .device = SPIDEV_1,
 349         .reg = SPI1,
 350         .sckPins = {
 351             { DEFIO_TAG_E(PA5) ,GPIO_MUX_5},
 352             { DEFIO_TAG_E(PB3) ,GPIO_MUX_5},
 353             { DEFIO_TAG_E(PE13),GPIO_MUX_4},
 354         },
 355         .misoPins = {
 356             { DEFIO_TAG_E(PA6) ,GPIO_MUX_5},
 357             { DEFIO_TAG_E(PB4) ,GPIO_MUX_5},
 358             { DEFIO_TAG_E(PE14),GPIO_MUX_4}
 359         },
 360         .mosiPins = {
 361             { DEFIO_TAG_E(PA7) ,GPIO_MUX_5},
 362             { DEFIO_TAG_E(PB5) ,GPIO_MUX_5},
 363             { DEFIO_TAG_E(PE15),GPIO_MUX_4},
 364         },
 365         .af= 0x00,
 366         .rcc = RCC_APB2(SPI1),
 367     },
 368     {
 369         .device = SPIDEV_2,
 370         .reg = SPI2,
 371         .sckPins = {
 372              { DEFIO_TAG_E(PB10), GPIO_MUX_5},
 373              { DEFIO_TAG_E(PB13) ,GPIO_MUX_5},
 374              { DEFIO_TAG_E(PC7),  GPIO_MUX_5},
 375              { DEFIO_TAG_E(PD1),  GPIO_MUX_6},
 376
 377         },
 378         .misoPins = {
 379             { DEFIO_TAG_E(PA12),  GPIO_MUX_5},
 380             { DEFIO_TAG_E(PB14),  GPIO_MUX_5},
 381             { DEFIO_TAG_E(PC2),   GPIO_MUX_5},
 382             { DEFIO_TAG_E(PD3),   GPIO_MUX_6},
 383         },
 384         .mosiPins = {
 385             { DEFIO_TAG_E(PB15),  GPIO_MUX_5},
 386             { DEFIO_TAG_E(PC1),   GPIO_MUX_7},
 387             { DEFIO_TAG_E(PC3),   GPIO_MUX_5},
 388             { DEFIO_TAG_E(PD4),   GPIO_MUX_6},
 389         },
 390         .af= 0x00,
 391         .rcc = RCC_APB1(SPI2),
 392     },
 393     {
 394         .device = SPIDEV_3,
 395         .reg = SPI3,
 396         .sckPins = {
 397             { DEFIO_TAG_E(PB3),  GPIO_MUX_6},
 398             { DEFIO_TAG_E(PB12), GPIO_MUX_7},
 399             { DEFIO_TAG_E(PC10), GPIO_MUX_6},
 400         },
 401         .misoPins = {
 402             { DEFIO_TAG_E(PB4),  GPIO_MUX_6},
 403             { DEFIO_TAG_E(PC11), GPIO_MUX_6},
 404         },
 405         .mosiPins = {
 406             { DEFIO_TAG_E(PB2),  GPIO_MUX_7},
 407             { DEFIO_TAG_E(PB5),  GPIO_MUX_6},
 408             { DEFIO_TAG_E(PC12),  GPIO_MUX_6},
 409             { DEFIO_TAG_E(PD0),  GPIO_MUX_6},
 410         },
 411         .af= 0x00,
 412         .rcc = RCC_APB1(SPI3),
 413     },
 414     {
 415         .device = SPIDEV_4,
 416         .reg = SPI4,
 417         .sckPins = {
 418             { DEFIO_TAG_E(PB7),  GPIO_MUX_6},
 419             { DEFIO_TAG_E(PB13), GPIO_MUX_6},
 420         },
 421         .misoPins = {
 422             { DEFIO_TAG_E(PA11),  GPIO_MUX_6},
 423             { DEFIO_TAG_E(PB8) ,  GPIO_MUX_6},
 424             { DEFIO_TAG_E(PD0) ,  GPIO_MUX_5},
 425         },
 426         .mosiPins = {
 427             { DEFIO_TAG_E(PA1),   GPIO_MUX_5},
 428             { DEFIO_TAG_E(PB9),   GPIO_MUX_6},
 429         },
 430         .af= 0x00,
 431         .rcc = RCC_APB2(SPI4),
 432     },
 433 #endif
 434 #ifdef APM32F4
 435     {
 436         .device = SPIDEV_1,
 437         .reg = SPI1,
 438         .sckPins = {
 439             { DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
 440             { DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
 441         },
 442         .misoPins = {
 443             { DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
 444             { DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
 445         },
 446         .mosiPins = {
 447             { DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
 448             { DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
 449         },
 450         .rcc = RCC_APB2(SPI1),
 451         .dmaIrqHandler = DMA2_ST3_HANDLER,
 452     },
 453     {
 454         .device = SPIDEV_2,
 455         .reg = SPI2,
 456         .sckPins = {
 457             { DEFIO_TAG_E(PB10), GPIO_AF5_SPI2 },
 458             { DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
 459         },
 460         .misoPins = {
 461             { DEFIO_TAG_E(PC2), GPIO_AF5_SPI2 },
 462             { DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
 463         },
 464         .mosiPins = {
 465             { DEFIO_TAG_E(PC3), GPIO_AF5_SPI2 },
 466             { DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
 467         },
 468         .rcc = RCC_APB1(SPI2),
 469         .dmaIrqHandler = DMA1_ST4_HANDLER,
 470     },
 471     {
 472         .device = SPIDEV_3,
 473         .reg = SPI3,
 474         .sckPins = {
 475             { DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
 476             { DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
 477         },
 478         .misoPins = {
 479             { DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
 480             { DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
 481         },
 482         .mosiPins = {
 483             { DEFIO_TAG_E(PB5), GPIO_AF6_SPI3 },
 484             { DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
 485         },
 486         .rcc = RCC_APB1(SPI3),
 487         .dmaIrqHandler = DMA1_ST7_HANDLER,
 488     },
 489 #endif
 490 };
 491
 492 void spiPinConfigure(const spiPinConfig_t *pConfig)
 493 {
 494     for (size_t hwindex = 0 ; hwindex < ARRAYLEN(spiHardware) ; hwindex++) {
 495         const spiHardware_t *hw = &spiHardware[hwindex];
 496
 497         if (!hw->reg) {
 498             continue;
 499         }
 500
 501         SPIDevice device = hw->device;
 502         spiDevice_t *pDev = &spiDevice[device];
 503
 504         for (int pindex = 0 ; pindex < MAX_SPI_PIN_SEL ; pindex++) {
 505             if (pConfig[device].ioTagSck == hw->sckPins[pindex].pin) {
 506                 pDev->sck = hw->sckPins[pindex].pin;
 507 #if defined(USE_PIN_AF)
 508                 pDev->sckAF = hw->sckPins[pindex].af;
 509 #endif
 510             }
 511             if (pConfig[device].ioTagMiso == hw->misoPins[pindex].pin) {
 512                 pDev->miso = hw->misoPins[pindex].pin;
 513 #if defined(USE_PIN_AF)
 514                 pDev->misoAF = hw->misoPins[pindex].af;
 515 #endif
 516             }
 517             if (pConfig[device].ioTagMosi == hw->mosiPins[pindex].pin) {
 518                 pDev->mosi = hw->mosiPins[pindex].pin;
 519 #if defined(USE_PIN_AF)
 520                 pDev->mosiAF = hw->mosiPins[pindex].af;
 521 #endif
 522             }
 523         }
 524
 525         if (pDev->sck && pDev->miso && pDev->mosi) {
 526             pDev->dev = hw->reg;
 527 #if !defined(USE_PIN_AF)
 528             pDev->af = hw->af;
 529 #endif
 530             pDev->rcc = hw->rcc;
 531             pDev->leadingEdge = false; // XXX Should be part of transfer context
 532 #if defined(USE_DMA) && defined(USE_HAL_DRIVER)
 533             pDev->dmaIrqHandler = hw->dmaIrqHandler;
 534 #endif
 535         }
 536     }
 537 }
 538 #endif