opcodes/m68k-dis.c

   1 /* Print Motorola 68k instructions.
   2    Copyright (C) 1986-2022 Free Software Foundation, Inc.
   3
   4    This file is part of the GNU opcodes library.
   5
   6    This library is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3, or (at your option)
   9    any later version.
  10
  11    It is distributed in the hope that it will be useful, but WITHOUT
  12    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  14    License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 #include "sysdep.h"
  22 #include "disassemble.h"
  23 #include "floatformat.h"
  24 #include "libiberty.h"
  25 #include "opintl.h"
  26 #include "cpu-m68k.h"
  27 #include "opcode/m68k.h"
  28
  29 /* Local function prototypes.  */
  30
  31 const char * const fpcr_names[] =
  32 {
  33   "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
  34   "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
  35 };
  36
  37 static char *const reg_names[] =
  38 {
  39   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
  40   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
  41   "%ps", "%pc"
  42 };
  43
  44 /* Name of register halves for MAC/EMAC.
  45    Seperate from reg_names since 'spu', 'fpl' look weird.  */
  46 static char *const reg_half_names[] =
  47 {
  48   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
  49   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
  50   "%ps", "%pc"
  51 };
  52
  53 /* Sign-extend an (unsigned char).  */
  54 #if __STDC__ == 1
  55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
  56 #else
  57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
  58 #endif
  59
  60 /* Error code of print_insn_arg's return value.  */
  61
  62 enum print_insn_arg_error
  63   {
  64     /* An invalid operand is found.  */
  65     PRINT_INSN_ARG_INVALID_OPERAND = -1,
  66
  67     /* An opcode table error.  */
  68     PRINT_INSN_ARG_INVALID_OP_TABLE = -2,
  69
  70     /* A memory error.  */
  71     PRINT_INSN_ARG_MEMORY_ERROR = -3,
  72   };
  73
  74 /* Get a 1 byte signed integer.  */
  75 #define NEXTBYTE(p, val)                        \
  76   do                                            \
  77     {                                           \
  78       p += 2;                                   \
  79       if (!FETCH_DATA (info, p))                \
  80         return PRINT_INSN_ARG_MEMORY_ERROR;     \
  81       val = COERCE_SIGNED_CHAR (p[-1]);         \
  82     }                                           \
  83   while (0)
  84
  85 /* Get a 2 byte signed integer.  */
  86 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
  87
  88 #define NEXTWORD(p, val, ret_val)               \
  89   do                                            \
  90     {                                           \
  91       p += 2;                                   \
  92       if (!FETCH_DATA (info, p))                \
  93         return ret_val;                         \
  94       val = COERCE16 ((p[-2] << 8) + p[-1]);    \
  95     }                                           \
  96   while (0)
  97
  98 /* Get a 4 byte signed integer.  */
  99 #define COERCE32(x) (((bfd_vma) (x) ^ 0x80000000) - 0x80000000)
 100
 101 #define NEXTLONG(p, val, ret_val)                                       \
 102   do                                                                    \
 103     {                                                                   \
 104       p += 4;                                                           \
 105       if (!FETCH_DATA (info, p))                                        \
 106         return ret_val;                                                 \
 107       val = COERCE32 (((((((unsigned) p[-4] << 8) + p[-3]) << 8)        \
 108                         + p[-2]) << 8) + p[-1]);                        \
 109     }                                                                   \
 110   while (0)
 111
 112 /* Get a 4 byte unsigned integer.  */
 113 #define NEXTULONG(p, val)                                               \
 114   do                                                                    \
 115     {                                                                   \
 116       p += 4;                                                           \
 117       if (!FETCH_DATA (info, p))                                        \
 118         return PRINT_INSN_ARG_MEMORY_ERROR;                             \
 119       val = (((((((unsigned) p[-4] << 8) + p[-3]) << 8)                 \
 120                + p[-2]) << 8) + p[-1]);                                 \
 121     }                                                                   \
 122   while (0)
 123
 124 /* Get a single precision float.  */
 125 #define NEXTSINGLE(val, p)                                      \
 126   do                                                            \
 127     {                                                           \
 128       p += 4;                                                   \
 129       if (!FETCH_DATA (info, p))                                \
 130         return PRINT_INSN_ARG_MEMORY_ERROR;                     \
 131       floatformat_to_double (& floatformat_ieee_single_big,     \
 132                              (char *) p - 4, & val);            \
 133     }                                                           \
 134   while (0)
 135
 136 /* Get a double precision float.  */
 137 #define NEXTDOUBLE(val, p)                                      \
 138   do                                                            \
 139     {                                                           \
 140       p += 8;                                                   \
 141       if (!FETCH_DATA (info, p))                                \
 142         return PRINT_INSN_ARG_MEMORY_ERROR;                     \
 143       floatformat_to_double (& floatformat_ieee_double_big,     \
 144                              (char *) p - 8, & val);            \
 145     }                                                           \
 146   while (0)
 147
 148 /* Get an extended precision float.  */
 149 #define NEXTEXTEND(val, p)                              \
 150   do                                                    \
 151     {                                                   \
 152       p += 12;                                          \
 153       if (!FETCH_DATA (info, p))                        \
 154         return PRINT_INSN_ARG_MEMORY_ERROR;             \
 155       floatformat_to_double (& floatformat_m68881_ext,  \
 156                              (char *) p - 12, & val);   \
 157     }                                                   \
 158   while (0)
 159
 160 /* Need a function to convert from packed to double
 161    precision.   Actually, it's easier to print a
 162    packed number than a double anyway, so maybe
 163    there should be a special case to handle this... */
 164 #define NEXTPACKED(p, val)                      \
 165   do                                            \
 166     {                                           \
 167       p += 12;                                  \
 168       if (!FETCH_DATA (info, p))                \
 169         return PRINT_INSN_ARG_MEMORY_ERROR;     \
 170       val = 0.0;                                \
 171     }                                           \
 172   while (0)
 173
 174 \f
 175 /* Maximum length of an instruction.  */
 176 #define MAXLEN 22
 177
 178 struct private
 179 {
 180   /* Points to first byte not fetched.  */
 181   bfd_byte *max_fetched;
 182   bfd_byte the_buffer[MAXLEN];
 183   bfd_vma insn_start;
 184 };
 185
 186 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 187    to ADDR (exclusive) are valid.  Returns 1 for success, 0 on memory
 188    error.  */
 189 #define FETCH_DATA(info, addr) \
 190   ((addr) <= ((struct private *) (info->private_data))->max_fetched \
 191    ? 1 : fetch_data ((info), (addr)))
 192
 193 static int
 194 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 195 {
 196   int status;
 197   struct private *priv = (struct private *)info->private_data;
 198   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 199
 200   status = (*info->read_memory_func) (start,
 201                                       priv->max_fetched,
 202                                       addr - priv->max_fetched,
 203                                       info);
 204   if (status != 0)
 205     {
 206       (*info->memory_error_func) (status, start, info);
 207       return 0;
 208     }
 209   else
 210     priv->max_fetched = addr;
 211   return 1;
 212 }
 213 \f
 214 /* This function is used to print to the bit-bucket.  */
 215 static int
 216 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
 217                const char *format ATTRIBUTE_UNUSED,
 218                ...)
 219 {
 220   return 0;
 221 }
 222
 223 static void
 224 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
 225                      struct disassemble_info *info ATTRIBUTE_UNUSED)
 226 {
 227 }
 228
 229 /* Fetch BITS bits from a position in the instruction specified by CODE.
 230    CODE is a "place to put an argument", or 'x' for a destination
 231    that is a general address (mode and register).
 232    BUFFER contains the instruction.
 233    Returns -1 on failure.  */
 234
 235 static int
 236 fetch_arg (unsigned char *buffer,
 237            int code,
 238            int bits,
 239            disassemble_info *info)
 240 {
 241   int val = 0;
 242
 243   switch (code)
 244     {
 245     case '/': /* MAC/EMAC mask bit.  */
 246       val = buffer[3] >> 5;
 247       break;
 248
 249     case 'G': /* EMAC ACC load.  */
 250       val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
 251       break;
 252
 253     case 'H': /* EMAC ACC !load.  */
 254       val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
 255       break;
 256
 257     case ']': /* EMAC ACCEXT bit.  */
 258       val = buffer[0] >> 2;
 259       break;
 260
 261     case 'I': /* MAC/EMAC scale factor.  */
 262       val = buffer[2] >> 1;
 263       break;
 264
 265     case 'F': /* EMAC ACCx.  */
 266       val = buffer[0] >> 1;
 267       break;
 268
 269     case 'f':
 270       val = buffer[1];
 271       break;
 272
 273     case 's':
 274       val = buffer[1];
 275       break;
 276
 277     case 'd':                   /* Destination, for register or quick.  */
 278       val = (buffer[0] << 8) + buffer[1];
 279       val >>= 9;
 280       break;
 281
 282     case 'x':                   /* Destination, for general arg.  */
 283       val = (buffer[0] << 8) + buffer[1];
 284       val >>= 6;
 285       break;
 286
 287     case 'k':
 288       if (! FETCH_DATA (info, buffer + 3))
 289         return -1;
 290       val = (buffer[3] >> 4);
 291       break;
 292
 293     case 'C':
 294       if (! FETCH_DATA (info, buffer + 3))
 295         return -1;
 296       val = buffer[3];
 297       break;
 298
 299     case '1':
 300       if (! FETCH_DATA (info, buffer + 3))
 301         return -1;
 302       val = (buffer[2] << 8) + buffer[3];
 303       val >>= 12;
 304       break;
 305
 306     case '2':
 307       if (! FETCH_DATA (info, buffer + 3))
 308         return -1;
 309       val = (buffer[2] << 8) + buffer[3];
 310       val >>= 6;
 311       break;
 312
 313     case '3':
 314     case 'j':
 315       if (! FETCH_DATA (info, buffer + 3))
 316         return -1;
 317       val = (buffer[2] << 8) + buffer[3];
 318       break;
 319
 320     case '4':
 321       if (! FETCH_DATA (info, buffer + 5))
 322         return -1;
 323       val = (buffer[4] << 8) + buffer[5];
 324       val >>= 12;
 325       break;
 326
 327     case '5':
 328       if (! FETCH_DATA (info, buffer + 5))
 329         return -1;
 330       val = (buffer[4] << 8) + buffer[5];
 331       val >>= 6;
 332       break;
 333
 334     case '6':
 335       if (! FETCH_DATA (info, buffer + 5))
 336         return -1;
 337       val = (buffer[4] << 8) + buffer[5];
 338       break;
 339
 340     case '7':
 341       if (! FETCH_DATA (info, buffer + 3))
 342         return -1;
 343       val = (buffer[2] << 8) + buffer[3];
 344       val >>= 7;
 345       break;
 346
 347     case '8':
 348       if (! FETCH_DATA (info, buffer + 3))
 349         return -1;
 350       val = (buffer[2] << 8) + buffer[3];
 351       val >>= 10;
 352       break;
 353
 354     case '9':
 355       if (! FETCH_DATA (info, buffer + 3))
 356         return -1;
 357       val = (buffer[2] << 8) + buffer[3];
 358       val >>= 5;
 359       break;
 360
 361     case 'e':
 362       val = (buffer[1] >> 6);
 363       break;
 364
 365     case 'E':
 366       if (! FETCH_DATA (info, buffer + 3))
 367         return -1;
 368       val = (buffer[2] >> 1);
 369       break;
 370
 371     case 'm':
 372       val = (buffer[1] & 0x40 ? 0x8 : 0)
 373         | ((buffer[0] >> 1) & 0x7)
 374         | (buffer[3] & 0x80 ? 0x10 : 0);
 375       break;
 376
 377     case 'n':
 378       val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
 379       break;
 380
 381     case 'o':
 382       val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
 383       break;
 384
 385     case 'M':
 386       val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
 387       break;
 388
 389     case 'N':
 390       val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
 391       break;
 392
 393     case 'h':
 394       val = buffer[2] >> 2;
 395       break;
 396
 397     default:
 398       abort ();
 399     }
 400
 401   /* bits is never too big.  */
 402   return val & ((1 << bits) - 1);
 403 }
 404
 405 /* Check if an EA is valid for a particular code.  This is required
 406    for the EMAC instructions since the type of source address determines
 407    if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
 408    is a non-load EMAC instruction and the bits mean register Ry.
 409    A similar case exists for the movem instructions where the register
 410    mask is interpreted differently for different EAs.  */
 411
 412 static bool
 413 m68k_valid_ea (char code, int val)
 414 {
 415   int mode, mask;
 416 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
 417   (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
 418    | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
 419
 420   switch (code)
 421     {
 422     case '*':
 423       mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
 424       break;
 425     case '~':
 426       mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
 427       break;
 428     case '%':
 429       mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
 430       break;
 431     case ';':
 432       mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
 433       break;
 434     case '@':
 435       mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
 436       break;
 437     case '!':
 438       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
 439       break;
 440     case '&':
 441       mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
 442       break;
 443     case '$':
 444       mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
 445       break;
 446     case '?':
 447       mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
 448       break;
 449     case '/':
 450       mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
 451       break;
 452     case '|':
 453       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
 454       break;
 455     case '>':
 456       mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
 457       break;
 458     case '<':
 459       mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
 460       break;
 461     case 'm':
 462       mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
 463       break;
 464     case 'n':
 465       mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
 466       break;
 467     case 'o':
 468       mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
 469       break;
 470     case 'p':
 471       mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
 472       break;
 473     case 'q':
 474       mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
 475       break;
 476     case 'v':
 477       mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
 478       break;
 479     case 'b':
 480       mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
 481       break;
 482     case 'w':
 483       mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
 484       break;
 485     case 'y':
 486       mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
 487       break;
 488     case 'z':
 489       mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
 490       break;
 491     case '4':
 492       mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
 493       break;
 494     default:
 495       abort ();
 496     }
 497 #undef M
 498
 499   mode = (val >> 3) & 7;
 500   if (mode == 7)
 501     mode += val & 7;
 502   return (mask & (1 << mode)) != 0;
 503 }
 504
 505 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
 506    REGNO = -1 for pc, -2 for none (suppressed).  */
 507
 508 static void
 509 print_base (int regno, bfd_vma disp, disassemble_info *info)
 510 {
 511   if (regno == -1)
 512     {
 513       (*info->fprintf_func) (info->stream, "%%pc@(");
 514       (*info->print_address_func) (disp, info);
 515     }
 516   else
 517     {
 518       if (regno == -2)
 519         (*info->fprintf_func) (info->stream, "@(");
 520       else if (regno == -3)
 521         (*info->fprintf_func) (info->stream, "%%zpc@(");
 522       else
 523         (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
 524       (*info->fprintf_func) (info->stream, "%" PRIx64, (uint64_t) disp);
 525     }
 526 }
 527
 528 /* Print an indexed argument.  The base register is BASEREG (-1 for pc).
 529    P points to extension word, in buffer.
 530    ADDR is the nominal core address of that extension word.
 531    Returns NULL upon error.  */
 532
 533 static unsigned char *
 534 print_indexed (int basereg,
 535                unsigned char *p,
 536                bfd_vma addr,
 537                disassemble_info *info)
 538 {
 539   int word;
 540   static char *const scales[] = { "", ":2", ":4", ":8" };
 541   bfd_vma base_disp;
 542   bfd_vma outer_disp;
 543   char buf[40];
 544
 545   NEXTWORD (p, word, NULL);
 546
 547   /* Generate the text for the index register.
 548      Where this will be output is not yet determined.  */
 549   sprintf (buf, "%s:%c%s",
 550            reg_names[(word >> 12) & 0xf],
 551            (word & 0x800) ? 'l' : 'w',
 552            scales[(word >> 9) & 3]);
 553
 554   /* Handle the 68000 style of indexing.  */
 555
 556   if ((word & 0x100) == 0)
 557     {
 558       base_disp = word & 0xff;
 559       if ((base_disp & 0x80) != 0)
 560         base_disp -= 0x100;
 561       if (basereg == -1)
 562         base_disp += addr;
 563       print_base (basereg, base_disp, info);
 564       (*info->fprintf_func) (info->stream, ",%s)", buf);
 565       return p;
 566     }
 567
 568   /* Handle the generalized kind.  */
 569   /* First, compute the displacement to add to the base register.  */
 570   if (word & 0200)
 571     {
 572       if (basereg == -1)
 573         basereg = -3;
 574       else
 575         basereg = -2;
 576     }
 577   if (word & 0100)
 578     buf[0] = '\0';
 579   base_disp = 0;
 580   switch ((word >> 4) & 3)
 581     {
 582     case 2:
 583       NEXTWORD (p, base_disp, NULL);
 584       break;
 585     case 3:
 586       NEXTLONG (p, base_disp, NULL);
 587     }
 588   if (basereg == -1)
 589     base_disp += addr;
 590
 591   /* Handle single-level case (not indirect).  */
 592   if ((word & 7) == 0)
 593     {
 594       print_base (basereg, base_disp, info);
 595       if (buf[0] != '\0')
 596         (*info->fprintf_func) (info->stream, ",%s", buf);
 597       (*info->fprintf_func) (info->stream, ")");
 598       return p;
 599     }
 600
 601   /* Two level.  Compute displacement to add after indirection.  */
 602   outer_disp = 0;
 603   switch (word & 3)
 604     {
 605     case 2:
 606       NEXTWORD (p, outer_disp, NULL);
 607       break;
 608     case 3:
 609       NEXTLONG (p, outer_disp, NULL);
 610     }
 611
 612   print_base (basereg, base_disp, info);
 613   if ((word & 4) == 0 && buf[0] != '\0')
 614     {
 615       (*info->fprintf_func) (info->stream, ",%s", buf);
 616       buf[0] = '\0';
 617     }
 618   (*info->fprintf_func) (info->stream, ")@(%" PRIx64, (uint64_t) outer_disp);
 619   if (buf[0] != '\0')
 620     (*info->fprintf_func) (info->stream, ",%s", buf);
 621   (*info->fprintf_func) (info->stream, ")");
 622
 623   return p;
 624 }
 625
 626 #define FETCH_ARG(size, val)                            \
 627   do                                                    \
 628     {                                                   \
 629       val = fetch_arg (buffer, place, size, info);      \
 630       if (val < 0)                                      \
 631         return PRINT_INSN_ARG_MEMORY_ERROR;             \
 632     }                                                   \
 633   while (0)
 634
 635 /* Returns number of bytes "eaten" by the operand, or
 636    return enum print_insn_arg_error.  ADDR is the pc for this arg to be
 637    relative to.  */
 638
 639 static int
 640 print_insn_arg (const char *d,
 641                 unsigned char *buffer,
 642                 unsigned char *p0,
 643                 bfd_vma addr,
 644                 disassemble_info *info)
 645 {
 646   int val = 0;
 647   int place = d[1];
 648   unsigned char *p = p0;
 649   int regno;
 650   const char *regname;
 651   unsigned char *p1;
 652   double flval;
 653   int flt_p;
 654   bfd_signed_vma disp;
 655   unsigned int uval;
 656
 657   switch (*d)
 658     {
 659     case 'c':           /* Cache identifier.  */
 660       {
 661         static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
 662         FETCH_ARG (2, val);
 663         (*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]);
 664         break;
 665       }
 666
 667     case 'a':           /* Address register indirect only. Cf. case '+'.  */
 668       {
 669         FETCH_ARG (3, val);
 670         (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]);
 671         break;
 672       }
 673
 674     case '_':           /* 32-bit absolute address for move16.  */
 675       {
 676         NEXTULONG (p, uval);
 677         (*info->print_address_func) (uval, info);
 678         break;
 679       }
 680
 681     case 'C':
 682       (*info->fprintf_func) (info->stream, "%%ccr");
 683       break;
 684
 685     case 'S':
 686       (*info->fprintf_func) (info->stream, "%%sr");
 687       break;
 688
 689     case 'U':
 690       (*info->fprintf_func) (info->stream, "%%usp");
 691       break;
 692
 693     case 'E':
 694       (*info->fprintf_func) (info->stream, "%%acc");
 695       break;
 696
 697     case 'G':
 698       (*info->fprintf_func) (info->stream, "%%macsr");
 699       break;
 700
 701     case 'H':
 702       (*info->fprintf_func) (info->stream, "%%mask");
 703       break;
 704
 705     case 'J':
 706       {
 707         /* FIXME: There's a problem here, different m68k processors call the
 708            same address different names.  The tables below try to get it right
 709            using info->mach, but only for v4e.  */
 710         struct regname { char * name; int value; };
 711         static const struct regname names[] =
 712           {
 713             {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
 714             {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
 715             {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
 716             {"%rgpiobar", 0x009}, {"%acr4",0x00c},
 717             {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
 718             {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
 719             {"%msp", 0x803}, {"%isp", 0x804},
 720             {"%pc", 0x80f},
 721             /* Reg c04 is sometimes called flashbar or rambar.
 722                Reg c05 is also sometimes called rambar.  */
 723             {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
 724
 725             /* reg c0e is sometimes called mbar2 or secmbar.
 726                reg c0f is sometimes called mbar.  */
 727             {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
 728
 729             /* Should we be calling this psr like we do in case 'Y'?  */
 730             {"%mmusr",0x805},
 731
 732             {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
 733
 734             /* Fido added these.  */
 735             {"%cac", 0xffe}, {"%mbo", 0xfff}
 736         };
 737         /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least.  */
 738         static const struct regname names_v4e[] =
 739           {
 740             {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
 741             {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
 742           };
 743         unsigned int arch_mask;
 744
 745         arch_mask = bfd_m68k_mach_to_features (info->mach);
 746         FETCH_ARG (12, val);
 747         if (arch_mask & (mcfisa_b | mcfisa_c))
 748           {
 749             for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
 750               if (names_v4e[regno].value == val)
 751                 {
 752                   (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
 753                   break;
 754                 }
 755             if (regno >= 0)
 756               break;
 757           }
 758         for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
 759           if (names[regno].value == val)
 760             {
 761               (*info->fprintf_func) (info->stream, "%s", names[regno].name);
 762               break;
 763             }
 764         if (regno < 0)
 765           (*info->fprintf_func) (info->stream, "0x%x", val);
 766       }
 767       break;
 768
 769     case 'Q':
 770       FETCH_ARG (3, val);
 771       /* 0 means 8, except for the bkpt instruction... */
 772       if (val == 0 && d[1] != 's')
 773         val = 8;
 774       (*info->fprintf_func) (info->stream, "#%d", val);
 775       break;
 776
 777     case 'x':
 778       FETCH_ARG (3, val);
 779       /* 0 means -1.  */
 780       if (val == 0)
 781         val = -1;
 782       (*info->fprintf_func) (info->stream, "#%d", val);
 783       break;
 784
 785     case 'j':
 786       FETCH_ARG (3, val);
 787       (*info->fprintf_func) (info->stream, "#%d", val+1);
 788       break;
 789
 790     case 'K':
 791       FETCH_ARG (9, val);
 792       (*info->fprintf_func) (info->stream, "#%d", val);
 793       break;
 794
 795     case 'M':
 796       if (place == 'h')
 797         {
 798           static char *const scalefactor_name[] = { "<<", ">>" };
 799
 800           FETCH_ARG (1, val);
 801           (*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]);
 802         }
 803       else
 804         {
 805           FETCH_ARG (8, val);
 806           if (val & 0x80)
 807             val = val - 0x100;
 808           (*info->fprintf_func) (info->stream, "#%d", val);
 809         }
 810       break;
 811
 812     case 'T':
 813       FETCH_ARG (4, val);
 814       (*info->fprintf_func) (info->stream, "#%d", val);
 815       break;
 816
 817     case 'D':
 818       FETCH_ARG (3, val);
 819       (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
 820       break;
 821
 822     case 'A':
 823       FETCH_ARG (3, val);
 824       (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]);
 825       break;
 826
 827     case 'R':
 828       FETCH_ARG (4, val);
 829       (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
 830       break;
 831
 832     case 'r':
 833       FETCH_ARG (4, regno);
 834       if (regno > 7)
 835         (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
 836       else
 837         (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
 838       break;
 839
 840     case 'F':
 841       FETCH_ARG (3, val);
 842       (*info->fprintf_func) (info->stream, "%%fp%d", val);
 843       break;
 844
 845     case 'O':
 846       FETCH_ARG (6, val);
 847       if (val & 0x20)
 848         (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
 849       else
 850         (*info->fprintf_func) (info->stream, "%d", val);
 851       break;
 852
 853     case '+':
 854       FETCH_ARG (3, val);
 855       (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]);
 856       break;
 857
 858     case '-':
 859       FETCH_ARG (3, val);
 860       (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]);
 861       break;
 862
 863     case 'k':
 864       if (place == 'k')
 865         {
 866           FETCH_ARG (3, val);
 867           (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]);
 868         }
 869       else if (place == 'C')
 870         {
 871           FETCH_ARG (7, val);
 872           if (val > 63)         /* This is a signed constant.  */
 873             val -= 128;
 874           (*info->fprintf_func) (info->stream, "{#%d}", val);
 875         }
 876       else
 877         return PRINT_INSN_ARG_INVALID_OPERAND;
 878       break;
 879
 880     case '#':
 881     case '^':
 882       p1 = buffer + (*d == '#' ? 2 : 4);
 883       if (place == 's')
 884         FETCH_ARG (4, val);
 885       else if (place == 'C')
 886         FETCH_ARG (7, val);
 887       else if (place == '8')
 888         FETCH_ARG (3, val);
 889       else if (place == '3')
 890         FETCH_ARG (8, val);
 891       else if (place == 'b')
 892         NEXTBYTE (p1, val);
 893       else if (place == 'w' || place == 'W')
 894         NEXTWORD (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
 895       else if (place == 'l')
 896         NEXTLONG (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
 897       else
 898         return PRINT_INSN_ARG_INVALID_OP_TABLE;
 899
 900       (*info->fprintf_func) (info->stream, "#%d", val);
 901       break;
 902
 903     case 'B':
 904       if (place == 'b')
 905         NEXTBYTE (p, disp);
 906       else if (place == 'B')
 907         disp = COERCE_SIGNED_CHAR (buffer[1]);
 908       else if (place == 'w' || place == 'W')
 909         NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 910       else if (place == 'l' || place == 'L' || place == 'C')
 911         NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 912       else if (place == 'g')
 913         {
 914           NEXTBYTE (buffer, disp);
 915           if (disp == 0)
 916             NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 917           else if (disp == -1)
 918             NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 919         }
 920       else if (place == 'c')
 921         {
 922           if (buffer[1] & 0x40)         /* If bit six is one, long offset.  */
 923             NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 924           else
 925             NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 926         }
 927       else
 928         return PRINT_INSN_ARG_INVALID_OP_TABLE;
 929
 930       (*info->print_address_func) (addr + disp, info);
 931       break;
 932
 933     case 'd':
 934       {
 935         int val1;
 936
 937         NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
 938         FETCH_ARG (3, val1);
 939         (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val);
 940         break;
 941       }
 942
 943     case 's':
 944       FETCH_ARG (3, val);
 945       (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
 946       break;
 947
 948     case 'e':
 949       FETCH_ARG (2, val);
 950       (*info->fprintf_func) (info->stream, "%%acc%d", val);
 951       break;
 952
 953     case 'g':
 954       FETCH_ARG (1, val);
 955       (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23");
 956       break;
 957
 958     case 'i':
 959       FETCH_ARG (2, val);
 960       if (val == 1)
 961         (*info->fprintf_func) (info->stream, "<<");
 962       else if (val == 3)
 963         (*info->fprintf_func) (info->stream, ">>");
 964       else
 965         return PRINT_INSN_ARG_INVALID_OPERAND;
 966       break;
 967
 968     case 'I':
 969       /* Get coprocessor ID... */
 970       val = fetch_arg (buffer, 'd', 3, info);
 971       if (val < 0)
 972         return PRINT_INSN_ARG_MEMORY_ERROR;
 973       if (val != 1)                             /* Unusual coprocessor ID?  */
 974         (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
 975       break;
 976
 977     case '4':
 978     case '*':
 979     case '~':
 980     case '%':
 981     case ';':
 982     case '@':
 983     case '!':
 984     case '$':
 985     case '?':
 986     case '/':
 987     case '&':
 988     case '|':
 989     case '<':
 990     case '>':
 991     case 'm':
 992     case 'n':
 993     case 'o':
 994     case 'p':
 995     case 'q':
 996     case 'v':
 997     case 'b':
 998     case 'w':
 999     case 'y':
1000     case 'z':
1001       if (place == 'd')
1002         {
1003           val = fetch_arg (buffer, 'x', 6, info);
1004           if (val < 0)
1005             return PRINT_INSN_ARG_MEMORY_ERROR;
1006           val = ((val & 7) << 3) + ((val >> 3) & 7);
1007         }
1008       else
1009         {
1010           val = fetch_arg (buffer, 's', 6, info);
1011           if (val < 0)
1012             return PRINT_INSN_ARG_MEMORY_ERROR;
1013         }
1014
1015       /* If the <ea> is invalid for *d, then reject this match.  */
1016       if (!m68k_valid_ea (*d, val))
1017         return PRINT_INSN_ARG_INVALID_OPERAND;
1018
1019       /* Get register number assuming address register.  */
1020       regno = (val & 7) + 8;
1021       regname = reg_names[regno];
1022       switch (val >> 3)
1023         {
1024         case 0:
1025           (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1026           break;
1027
1028         case 1:
1029           (*info->fprintf_func) (info->stream, "%s", regname);
1030           break;
1031
1032         case 2:
1033           (*info->fprintf_func) (info->stream, "%s@", regname);
1034           break;
1035
1036         case 3:
1037           (*info->fprintf_func) (info->stream, "%s@+", regname);
1038           break;
1039
1040         case 4:
1041           (*info->fprintf_func) (info->stream, "%s@-", regname);
1042           break;
1043
1044         case 5:
1045           NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1046           (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1047           break;
1048
1049         case 6:
1050           p = print_indexed (regno, p, addr, info);
1051           if (p == NULL)
1052             return PRINT_INSN_ARG_MEMORY_ERROR;
1053           break;
1054
1055         case 7:
1056           switch (val & 7)
1057             {
1058             case 0:
1059               NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1060               (*info->print_address_func) (val, info);
1061               break;
1062
1063             case 1:
1064               NEXTULONG (p, uval);
1065               (*info->print_address_func) (uval, info);
1066               break;
1067
1068             case 2:
1069               NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1070               (*info->fprintf_func) (info->stream, "%%pc@(");
1071               (*info->print_address_func) (addr + val, info);
1072               (*info->fprintf_func) (info->stream, ")");
1073               break;
1074
1075             case 3:
1076               p = print_indexed (-1, p, addr, info);
1077               if (p == NULL)
1078                 return PRINT_INSN_ARG_MEMORY_ERROR;
1079               break;
1080
1081             case 4:
1082               flt_p = 1;        /* Assume it's a float... */
1083               switch (place)
1084               {
1085                 case 'b':
1086                   NEXTBYTE (p, val);
1087                   flt_p = 0;
1088                   break;
1089
1090                 case 'w':
1091                   NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1092                   flt_p = 0;
1093                   break;
1094
1095                 case 'l':
1096                   NEXTLONG (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1097                   flt_p = 0;
1098                   break;
1099
1100                 case 'f':
1101                   NEXTSINGLE (flval, p);
1102                   break;
1103
1104                 case 'F':
1105                   NEXTDOUBLE (flval, p);
1106                   break;
1107
1108                 case 'x':
1109                   NEXTEXTEND (flval, p);
1110                   break;
1111
1112                 case 'p':
1113                   NEXTPACKED (p, flval);
1114                   break;
1115
1116                 default:
1117                   return PRINT_INSN_ARG_INVALID_OPERAND;
1118               }
1119               if (flt_p)        /* Print a float? */
1120                 (*info->fprintf_func) (info->stream, "#0e%g", flval);
1121               else
1122                 (*info->fprintf_func) (info->stream, "#%d", val);
1123               break;
1124
1125             default:
1126               return PRINT_INSN_ARG_INVALID_OPERAND;
1127             }
1128         }
1129
1130       /* If place is '/', then this is the case of the mask bit for
1131          mac/emac loads. Now that the arg has been printed, grab the
1132          mask bit and if set, add a '&' to the arg.  */
1133       if (place == '/')
1134         {
1135           FETCH_ARG (1, val);
1136           if (val)
1137             info->fprintf_func (info->stream, "&");
1138         }
1139       break;
1140
1141     case 'L':
1142     case 'l':
1143         if (place == 'w')
1144           {
1145             char doneany;
1146             p1 = buffer + 2;
1147             NEXTWORD (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
1148             /* Move the pointer ahead if this point is farther ahead
1149                than the last.  */
1150             p = p1 > p ? p1 : p;
1151             if (val == 0)
1152               {
1153                 (*info->fprintf_func) (info->stream, "#0");
1154                 break;
1155               }
1156             if (*d == 'l')
1157               {
1158                 int newval = 0;
1159
1160                 for (regno = 0; regno < 16; ++regno)
1161                   if (val & (0x8000 >> regno))
1162                     newval |= 1 << regno;
1163                 val = newval;
1164               }
1165             val &= 0xffff;
1166             doneany = 0;
1167             for (regno = 0; regno < 16; ++regno)
1168               if (val & (1 << regno))
1169                 {
1170                   int first_regno;
1171
1172                   if (doneany)
1173                     (*info->fprintf_func) (info->stream, "/");
1174                   doneany = 1;
1175                   (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1176                   first_regno = regno;
1177                   while (val & (1 << (regno + 1)))
1178                     ++regno;
1179                   if (regno > first_regno)
1180                     (*info->fprintf_func) (info->stream, "-%s",
1181                                            reg_names[regno]);
1182                 }
1183           }
1184         else if (place == '3')
1185           {
1186             /* `fmovem' insn.  */
1187             char doneany;
1188
1189             FETCH_ARG (8, val);
1190             if (val == 0)
1191               {
1192                 (*info->fprintf_func) (info->stream, "#0");
1193                 break;
1194               }
1195             if (*d == 'l')
1196               {
1197                 int newval = 0;
1198
1199                 for (regno = 0; regno < 8; ++regno)
1200                   if (val & (0x80 >> regno))
1201                     newval |= 1 << regno;
1202                 val = newval;
1203               }
1204             val &= 0xff;
1205             doneany = 0;
1206             for (regno = 0; regno < 8; ++regno)
1207               if (val & (1 << regno))
1208                 {
1209                   int first_regno;
1210                   if (doneany)
1211                     (*info->fprintf_func) (info->stream, "/");
1212                   doneany = 1;
1213                   (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1214                   first_regno = regno;
1215                   while (val & (1 << (regno + 1)))
1216                     ++regno;
1217                   if (regno > first_regno)
1218                     (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1219                 }
1220           }
1221         else if (place == '8')
1222           {
1223             FETCH_ARG (3, val);
1224             /* fmoveml for FP status registers.  */
1225             (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
1226           }
1227         else
1228           return PRINT_INSN_ARG_INVALID_OP_TABLE;
1229       break;
1230
1231     case 'X':
1232       place = '8';
1233       /* Fall through.  */
1234     case 'Y':
1235     case 'Z':
1236     case 'W':
1237     case '0':
1238     case '1':
1239     case '2':
1240     case '3':
1241       {
1242         char *name = 0;
1243
1244         FETCH_ARG (5, val);
1245         switch (val)
1246           {
1247           case 2: name = "%tt0"; break;
1248           case 3: name = "%tt1"; break;
1249           case 0x10: name = "%tc"; break;
1250           case 0x11: name = "%drp"; break;
1251           case 0x12: name = "%srp"; break;
1252           case 0x13: name = "%crp"; break;
1253           case 0x14: name = "%cal"; break;
1254           case 0x15: name = "%val"; break;
1255           case 0x16: name = "%scc"; break;
1256           case 0x17: name = "%ac"; break;
1257           case 0x18: name = "%psr"; break;
1258           case 0x19: name = "%pcsr"; break;
1259           case 0x1c:
1260           case 0x1d:
1261             {
1262               int break_reg = ((buffer[3] >> 2) & 7);
1263
1264               (*info->fprintf_func)
1265                 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1266                  break_reg);
1267             }
1268             break;
1269           default:
1270             (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1271           }
1272         if (name)
1273           (*info->fprintf_func) (info->stream, "%s", name);
1274       }
1275       break;
1276
1277     case 'f':
1278       {
1279         int fc;
1280
1281         FETCH_ARG (5, fc);
1282         if (fc == 1)
1283           (*info->fprintf_func) (info->stream, "%%dfc");
1284         else if (fc == 0)
1285           (*info->fprintf_func) (info->stream, "%%sfc");
1286         else
1287           /* xgettext:c-format */
1288           (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1289       }
1290       break;
1291
1292     case 'V':
1293       (*info->fprintf_func) (info->stream, "%%val");
1294       break;
1295
1296     case 't':
1297       {
1298         int level;
1299
1300         FETCH_ARG (3, level);
1301         (*info->fprintf_func) (info->stream, "%d", level);
1302       }
1303       break;
1304
1305     case 'u':
1306       {
1307         short is_upper = 0;
1308         int reg;
1309
1310         FETCH_ARG (5, reg);
1311         if (reg & 0x10)
1312           {
1313             is_upper = 1;
1314             reg &= 0xf;
1315           }
1316         (*info->fprintf_func) (info->stream, "%s%s",
1317                                reg_half_names[reg],
1318                                is_upper ? "u" : "l");
1319       }
1320       break;
1321
1322     default:
1323       return PRINT_INSN_ARG_INVALID_OP_TABLE;
1324     }
1325
1326   return p - p0;
1327 }
1328
1329 /* Try to match the current instruction to best and if so, return the
1330    number of bytes consumed from the instruction stream, else zero.
1331    Return -1 on memory error.  */
1332
1333 static int
1334 match_insn_m68k (bfd_vma memaddr,
1335                  disassemble_info * info,
1336                  const struct m68k_opcode * best)
1337 {
1338   unsigned char *save_p;
1339   unsigned char *p;
1340   const char *d;
1341   const char *args = best->args;
1342
1343   struct private *priv = (struct private *) info->private_data;
1344   bfd_byte *buffer = priv->the_buffer;
1345   fprintf_ftype save_printer = info->fprintf_func;
1346   void (* save_print_address) (bfd_vma, struct disassemble_info *)
1347     = info->print_address_func;
1348
1349   if (*args == '.')
1350     args++;
1351
1352   /* Point at first word of argument data,
1353      and at descriptor for first argument.  */
1354   p = buffer + 2;
1355
1356   /* Figure out how long the fixed-size portion of the instruction is.
1357      The only place this is stored in the opcode table is
1358      in the arguments--look for arguments which specify fields in the 2nd
1359      or 3rd words of the instruction.  */
1360   for (d = args; *d; d += 2)
1361     {
1362       /* I don't think it is necessary to be checking d[0] here;
1363          I suspect all this could be moved to the case statement below.  */
1364       if (d[0] == '#')
1365         {
1366           if (d[1] == 'l' && p - buffer < 6)
1367             p = buffer + 6;
1368           else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1369             p = buffer + 4;
1370         }
1371
1372       if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1373         p = buffer + 4;
1374
1375       switch (d[1])
1376         {
1377         case '1':
1378         case '2':
1379         case '3':
1380         case '7':
1381         case '8':
1382         case '9':
1383         case 'i':
1384           if (p - buffer < 4)
1385             p = buffer + 4;
1386           break;
1387         case '4':
1388         case '5':
1389         case '6':
1390           if (p - buffer < 6)
1391             p = buffer + 6;
1392           break;
1393         default:
1394           break;
1395         }
1396     }
1397
1398   /* pflusha is an exceptions.  It takes no arguments but is two words
1399      long.  Recognize it by looking at the lower 16 bits of the mask.  */
1400   if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1401     p = buffer + 4;
1402
1403   /* lpstop is another exception.  It takes a one word argument but is
1404      three words long.  */
1405   if (p - buffer < 6
1406       && (best->match & 0xffff) == 0xffff
1407       && args[0] == '#'
1408       && args[1] == 'w')
1409     {
1410       /* Copy the one word argument into the usual location for a one
1411          word argument, to simplify printing it.  We can get away with
1412          this because we know exactly what the second word is, and we
1413          aren't going to print anything based on it.  */
1414       p = buffer + 6;
1415       if (!FETCH_DATA (info, p))
1416         return -1;
1417       buffer[2] = buffer[4];
1418       buffer[3] = buffer[5];
1419     }
1420
1421   if (!FETCH_DATA (info, p))
1422     return -1;
1423
1424   save_p = p;
1425   info->print_address_func = dummy_print_address;
1426   info->fprintf_func = (fprintf_ftype) dummy_printer;
1427
1428   /* We scan the operands twice.  The first time we don't print anything,
1429      but look for errors.  */
1430   for (d = args; *d; d += 2)
1431     {
1432       int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1433
1434       if (eaten >= 0)
1435         p += eaten;
1436       else if (eaten == PRINT_INSN_ARG_INVALID_OPERAND
1437                || eaten == PRINT_INSN_ARG_MEMORY_ERROR)
1438         {
1439           info->fprintf_func = save_printer;
1440           info->print_address_func = save_print_address;
1441           return eaten == PRINT_INSN_ARG_MEMORY_ERROR ? -1 : 0;
1442         }
1443       else
1444         {
1445           /* We must restore the print functions before trying to print the
1446              error message.  */
1447           info->fprintf_func = save_printer;
1448           info->print_address_func = save_print_address;
1449           info->fprintf_func (info->stream,
1450                               /* xgettext:c-format */
1451                               _("<internal error in opcode table: %s %s>\n"),
1452                               best->name, best->args);
1453           return 2;
1454         }
1455     }
1456
1457   p = save_p;
1458   info->fprintf_func = save_printer;
1459   info->print_address_func = save_print_address;
1460
1461   d = args;
1462
1463   info->fprintf_func (info->stream, "%s", best->name);
1464
1465   if (*d)
1466     info->fprintf_func (info->stream, " ");
1467
1468   while (*d)
1469     {
1470       p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1471       d += 2;
1472
1473       if (*d && *(d - 2) != 'I' && *d != 'k')
1474         info->fprintf_func (info->stream, ",");
1475     }
1476
1477   return p - buffer;
1478 }
1479
1480 /* Try to interpret the instruction at address MEMADDR as one that
1481    can execute on a processor with the features given by ARCH_MASK.
1482    If successful, print the instruction to INFO->STREAM and return
1483    its length in bytes.  Return 0 otherwise.  Return -1 on memory
1484    error.  */
1485
1486 static int
1487 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1488                 unsigned int arch_mask)
1489 {
1490   int i;
1491   const char *d;
1492   static const struct m68k_opcode **opcodes[16];
1493   static int numopcodes[16];
1494   int val;
1495   int major_opcode;
1496
1497   struct private *priv = (struct private *) info->private_data;
1498   bfd_byte *buffer = priv->the_buffer;
1499
1500   if (!opcodes[0])
1501     {
1502       /* Speed up the matching by sorting the opcode
1503          table on the upper four bits of the opcode.  */
1504       const struct m68k_opcode **opc_pointer[16];
1505
1506       /* First count how many opcodes are in each of the sixteen buckets.  */
1507       for (i = 0; i < m68k_numopcodes; i++)
1508         numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1509
1510       /* Then create a sorted table of pointers
1511          that point into the unsorted table.  */
1512       opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1513                                 * m68k_numopcodes);
1514       opcodes[0] = opc_pointer[0];
1515
1516       for (i = 1; i < 16; i++)
1517         {
1518           opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1519           opcodes[i] = opc_pointer[i];
1520         }
1521
1522       for (i = 0; i < m68k_numopcodes; i++)
1523         *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1524     }
1525
1526   if (!FETCH_DATA (info, buffer + 2))
1527     return -1;
1528   major_opcode = (buffer[0] >> 4) & 15;
1529
1530   for (i = 0; i < numopcodes[major_opcode]; i++)
1531     {
1532       const struct m68k_opcode *opc = opcodes[major_opcode][i];
1533       unsigned long opcode = opc->opcode;
1534       unsigned long match = opc->match;
1535       const char *args = opc->args;
1536
1537       if (*args == '.')
1538         args++;
1539
1540       if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1541           && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1542           /* Only fetch the next two bytes if we need to.  */
1543           && (((0xffff & match) == 0)
1544               ||
1545               (FETCH_DATA (info, buffer + 4)
1546                && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1547                && ((0xff & buffer[3] & match) == (0xff & opcode)))
1548               )
1549           && (opc->arch & arch_mask) != 0)
1550         {
1551           /* Don't use for printout the variants of divul and divsl
1552              that have the same register number in two places.
1553              The more general variants will match instead.  */
1554           for (d = args; *d; d += 2)
1555             if (d[1] == 'D')
1556               break;
1557
1558           /* Don't use for printout the variants of most floating
1559              point coprocessor instructions which use the same
1560              register number in two places, as above.  */
1561           if (*d == '\0')
1562             for (d = args; *d; d += 2)
1563               if (d[1] == 't')
1564                 break;
1565
1566           /* Don't match fmovel with more than one register;
1567              wait for fmoveml.  */
1568           if (*d == '\0')
1569             {
1570               for (d = args; *d; d += 2)
1571                 {
1572                   if (d[0] == 's' && d[1] == '8')
1573                     {
1574                       val = fetch_arg (buffer, d[1], 3, info);
1575                       if (val < 0)
1576                         return 0;
1577                       if ((val & (val - 1)) != 0)
1578                         break;
1579                     }
1580                 }
1581             }
1582
1583           /* Don't match FPU insns with non-default coprocessor ID.  */
1584           if (*d == '\0')
1585             {
1586               for (d = args; *d; d += 2)
1587                 {
1588                   if (d[0] == 'I')
1589                     {
1590                       val = fetch_arg (buffer, 'd', 3, info);
1591                       if (val != 1)
1592                         break;
1593                     }
1594                 }
1595             }
1596
1597           if (*d == '\0')
1598             if ((val = match_insn_m68k (memaddr, info, opc)))
1599               return val;
1600         }
1601     }
1602   return 0;
1603 }
1604
1605 /* Print the m68k instruction at address MEMADDR in debugged memory,
1606    on INFO->STREAM.  Returns length of the instruction, in bytes.  */
1607
1608 int
1609 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1610 {
1611   unsigned int arch_mask;
1612   struct private priv;
1613   int val;
1614
1615   bfd_byte *buffer = priv.the_buffer;
1616
1617   info->private_data = & priv;
1618   /* Tell objdump to use two bytes per chunk
1619      and six bytes per line for displaying raw data.  */
1620   info->bytes_per_chunk = 2;
1621   info->bytes_per_line = 6;
1622   info->display_endian = BFD_ENDIAN_BIG;
1623   priv.max_fetched = priv.the_buffer;
1624   priv.insn_start = memaddr;
1625
1626   arch_mask = bfd_m68k_mach_to_features (info->mach);
1627   if (!arch_mask)
1628     {
1629       /* First try printing an m680x0 instruction.  Try printing a Coldfire
1630          one if that fails.  */
1631       val = m68k_scan_mask (memaddr, info, m68k_mask);
1632       if (val <= 0)
1633         val = m68k_scan_mask (memaddr, info, mcf_mask);
1634     }
1635   else
1636     {
1637       val = m68k_scan_mask (memaddr, info, arch_mask);
1638     }
1639
1640   if (val == 0)
1641     /* Handle undefined instructions.  */
1642     info->fprintf_func (info->stream, ".short 0x%04x", (buffer[0] << 8) + buffer[1]);
1643
1644   return val ? val : 2;
1645 }