| blob | 3582711d9620054219c014a5c8e8d8b0104e138f |
1 /* PowerPC-specific support for 32-bit ELF
2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* The assembler should generate a full set of section symbols even
23 when they appear unused. The linux kernel build tool recordmcount
24 needs them. */
25 #define TARGET_KEEP_UNUSED_SECTION_SYMBOLS true
28 #include <stdarg.h>
39 /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
40 #define OCTETS_PER_BYTE(ABFD, SEC) 1
43 {
45 split16d_type
46 }
47 split16_format_type;
49 /* RELA relocations are used here. */
51 static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
53 static bfd_reloc_status_type ppc_elf_unhandled_reloc
56 /* Branch prediction bit for branch taken relocs. */
57 #define BRANCH_PREDICT_BIT 0x200000
58 /* Mask to set RA in memory instructions. */
59 #define RA_REGISTER_MASK 0x001f0000
60 /* Value to shift register by to insert RA. */
61 #define RA_REGISTER_SHIFT 16
63 /* The name of the dynamic interpreter. This is put in the .interp
64 section. */
67 /* For old-style PLT. */
68 /* The number of single-slot PLT entries (the rest use two slots). */
69 #define PLT_NUM_SINGLE_ENTRIES 8192
71 /* For new-style .glink and .plt. */
72 #define GLINK_PLTRESOLVE 16*4
73 #define GLINK_ENTRY_SIZE(htab, h) \
74 ((4*4 \
75 + (h != NULL \
76 && h == htab->tls_get_addr \
77 && !htab->params->no_tls_get_addr_opt ? 8*4 : 0) \
78 + (1u << htab->params->plt_stub_align) - 1) \
79 & -(1u << htab->params->plt_stub_align))
81 /* VxWorks uses its own plt layout, filled in by the static linker. */
83 /* The standard VxWorks PLT entry. */
84 #define VXWORKS_PLT_ENTRY_SIZE 32
85 static const bfd_vma ppc_elf_vxworks_plt_entry
87 {
96 };
97 static const bfd_vma ppc_elf_vxworks_pic_plt_entry
99 {
108 };
110 /* The initial VxWorks PLT entry. */
111 #define VXWORKS_PLT_INITIAL_ENTRY_SIZE 32
112 static const bfd_vma ppc_elf_vxworks_plt0_entry
114 {
123 };
124 static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
126 {
135 };
137 /* For executables, we have some additional relocations in
138 .rela.plt.unloaded, for the kernel loader. */
140 /* The number of non-JMP_SLOT relocations per PLT0 slot. */
141 #define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
142 /* The number of relocations in the PLTResolve slot. */
143 #define VXWORKS_PLTRESOLVE_RELOCS 2
144 /* The number of relocations in the PLTResolve slot when creating
145 a shared library. */
146 #define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
148 /* Some instructions. */
149 #define ADDIS_11_11 0x3d6b0000
150 #define ADDIS_11_30 0x3d7e0000
151 #define ADDIS_12_12 0x3d8c0000
152 #define ADDI_11_11 0x396b0000
153 #define ADD_0_11_11 0x7c0b5a14
154 #define ADD_3_12_2 0x7c6c1214
155 #define ADD_11_0_11 0x7d605a14
156 #define B 0x48000000
157 #define BA 0x48000002
158 #define BCL_20_31 0x429f0005
159 #define BCTR 0x4e800420
160 #define BEQLR 0x4d820020
161 #define CMPWI_11_0 0x2c0b0000
162 #define LIS_11 0x3d600000
163 #define LIS_12 0x3d800000
164 #define LWZU_0_12 0x840c0000
165 #define LWZ_0_12 0x800c0000
166 #define LWZ_11_3 0x81630000
167 #define LWZ_11_11 0x816b0000
168 #define LWZ_11_30 0x817e0000
169 #define LWZ_12_3 0x81830000
170 #define LWZ_12_12 0x818c0000
171 #define MR_0_3 0x7c601b78
172 #define MR_3_0 0x7c030378
173 #define MFLR_0 0x7c0802a6
174 #define MFLR_12 0x7d8802a6
175 #define MTCTR_0 0x7c0903a6
176 #define MTCTR_11 0x7d6903a6
177 #define MTLR_0 0x7c0803a6
178 #define NOP 0x60000000
179 #define SUB_11_11_12 0x7d6c5850
181 /* Offset of tp and dtp pointers from start of TLS block. */
182 #define TP_OFFSET 0x7000
183 #define DTP_OFFSET 0x8000
185 /* The value of a defined global symbol. */
186 #define SYM_VAL(SYM) \
187 ((SYM)->root.u.def.section->output_section->vma \
188 + (SYM)->root.u.def.section->output_offset \
189 + (SYM)->root.u.def.value)
190 \f
191 /* Relocation HOWTO's. */
192 /* Like other ELF RELA targets that don't apply multiple
193 field-altering relocations to the same localation, src_mask is
194 always zero and pcrel_offset is the same as pc_relative.
195 PowerPC can always use a zero bitpos, even when the field is not at
196 the LSB. For example, a REL24 could use rightshift=2, bisize=24
197 and bitpos=2 which matches the ABI description, or as we do here,
198 rightshift=0, bitsize=26 and bitpos=0. */
199 #define HOW(type, size, bitsize, mask, rightshift, pc_relative, \
200 complain, special_func) \
201 HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \
202 complain_overflow_ ## complain, special_func, \
203 #type, false, 0, mask, pc_relative)
208 /* This reloc does nothing. */
210 bfd_elf_generic_reloc),
212 /* A standard 32 bit relocation. */
214 bfd_elf_generic_reloc),
216 /* An absolute 26 bit branch; the lower two bits must be zero.
217 FIXME: we don't check that, we just clear them. */
219 bfd_elf_generic_reloc),
221 /* A standard 16 bit relocation. */
223 bfd_elf_generic_reloc),
225 /* A 16 bit relocation without overflow. */
227 bfd_elf_generic_reloc),
229 /* The high order 16 bits of an address. */
231 bfd_elf_generic_reloc),
233 /* The high order 16 bits of an address, plus 1 if the contents of
234 the low 16 bits, treated as a signed number, is negative. */
236 ppc_elf_addr16_ha_reloc),
238 /* An absolute 16 bit branch; the lower two bits must be zero.
239 FIXME: we don't check that, we just clear them. */
241 bfd_elf_generic_reloc),
243 /* An absolute 16 bit branch, for which bit 10 should be set to
244 indicate that the branch is expected to be taken. The lower two
245 bits must be zero. */
247 bfd_elf_generic_reloc),
249 /* An absolute 16 bit branch, for which bit 10 should be set to
250 indicate that the branch is not expected to be taken. The lower
251 two bits must be zero. */
253 bfd_elf_generic_reloc),
255 /* A relative 26 bit branch; the lower two bits must be zero. */
257 bfd_elf_generic_reloc),
259 /* A relative 16 bit branch; the lower two bits must be zero. */
261 bfd_elf_generic_reloc),
263 /* A relative 16 bit branch. Bit 10 should be set to indicate that
264 the branch is expected to be taken. The lower two bits must be
265 zero. */
267 bfd_elf_generic_reloc),
269 /* A relative 16 bit branch. Bit 10 should be set to indicate that
270 the branch is not expected to be taken. The lower two bits must
271 be zero. */
273 bfd_elf_generic_reloc),
275 /* Like R_PPC_ADDR16, but referring to the GOT table entry for the
276 symbol. */
278 ppc_elf_unhandled_reloc),
280 /* Like R_PPC_ADDR16_LO, but referring to the GOT table entry for
281 the symbol. */
283 ppc_elf_unhandled_reloc),
285 /* Like R_PPC_ADDR16_HI, but referring to the GOT table entry for
286 the symbol. */
288 ppc_elf_unhandled_reloc),
290 /* Like R_PPC_ADDR16_HA, but referring to the GOT table entry for
291 the symbol. */
293 ppc_elf_unhandled_reloc),
295 /* Like R_PPC_REL24, but referring to the procedure linkage table
296 entry for the symbol. */
298 ppc_elf_unhandled_reloc),
300 /* This is used only by the dynamic linker. The symbol should exist
301 both in the object being run and in some shared library. The
302 dynamic linker copies the data addressed by the symbol from the
303 shared library into the object, because the object being
304 run has to have the data at some particular address. */
306 ppc_elf_unhandled_reloc),
308 /* Like R_PPC_ADDR32, but used when setting global offset table
309 entries. */
311 ppc_elf_unhandled_reloc),
313 /* Marks a procedure linkage table entry for a symbol. */
315 ppc_elf_unhandled_reloc),
317 /* Used only by the dynamic linker. When the object is run, this
318 longword is set to the load address of the object, plus the
319 addend. */
321 bfd_elf_generic_reloc),
323 /* Like R_PPC_REL24, but uses the value of the symbol within the
324 object rather than the final value. Normally used for
325 _GLOBAL_OFFSET_TABLE_. */
327 bfd_elf_generic_reloc),
329 /* Like R_PPC_ADDR32, but may be unaligned. */
331 bfd_elf_generic_reloc),
333 /* Like R_PPC_ADDR16, but may be unaligned. */
335 bfd_elf_generic_reloc),
337 /* 32-bit PC relative */
339 bfd_elf_generic_reloc),
341 /* 32-bit relocation to the symbol's procedure linkage table.
342 FIXME: not supported. */
344 ppc_elf_unhandled_reloc),
346 /* 32-bit PC relative relocation to the symbol's procedure linkage table.
347 FIXME: not supported. */
349 ppc_elf_unhandled_reloc),
351 /* Like R_PPC_ADDR16_LO, but referring to the PLT table entry for
352 the symbol. */
354 ppc_elf_unhandled_reloc),
356 /* Like R_PPC_ADDR16_HI, but referring to the PLT table entry for
357 the symbol. */
359 ppc_elf_unhandled_reloc),
361 /* Like R_PPC_ADDR16_HA, but referring to the PLT table entry for
362 the symbol. */
364 ppc_elf_unhandled_reloc),
366 /* A sign-extended 16 bit value relative to _SDA_BASE_, for use with
367 small data items. */
369 ppc_elf_unhandled_reloc),
371 /* 16-bit section relative relocation. */
373 ppc_elf_unhandled_reloc),
375 /* 16-bit lower half section relative relocation. */
377 ppc_elf_unhandled_reloc),
379 /* 16-bit upper half section relative relocation. */
381 ppc_elf_unhandled_reloc),
383 /* 16-bit upper half adjusted section relative relocation. */
385 ppc_elf_unhandled_reloc),
387 /* Marker relocs for TLS. */
389 bfd_elf_generic_reloc),
392 bfd_elf_generic_reloc),
395 bfd_elf_generic_reloc),
397 /* Marker relocs on inline plt call instructions. */
399 bfd_elf_generic_reloc),
402 bfd_elf_generic_reloc),
404 /* Computes the load module index of the load module that contains the
405 definition of its TLS sym. */
407 ppc_elf_unhandled_reloc),
409 /* Computes a dtv-relative displacement, the difference between the value
410 of sym+add and the base address of the thread-local storage block that
411 contains the definition of sym, minus 0x8000. */
413 ppc_elf_unhandled_reloc),
415 /* A 16 bit dtprel reloc. */
417 ppc_elf_unhandled_reloc),
419 /* Like DTPREL16, but no overflow. */
421 ppc_elf_unhandled_reloc),
423 /* Like DTPREL16_LO, but next higher group of 16 bits. */
425 ppc_elf_unhandled_reloc),
427 /* Like DTPREL16_HI, but adjust for low 16 bits. */
429 ppc_elf_unhandled_reloc),
431 /* Computes a tp-relative displacement, the difference between the value of
432 sym+add and the value of the thread pointer (r13). */
434 ppc_elf_unhandled_reloc),
436 /* A 16 bit tprel reloc. */
438 ppc_elf_unhandled_reloc),
440 /* Like TPREL16, but no overflow. */
442 ppc_elf_unhandled_reloc),
444 /* Like TPREL16_LO, but next higher group of 16 bits. */
446 ppc_elf_unhandled_reloc),
448 /* Like TPREL16_HI, but adjust for low 16 bits. */
450 ppc_elf_unhandled_reloc),
452 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
453 with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset
454 to the first entry. */
456 ppc_elf_unhandled_reloc),
458 /* Like GOT_TLSGD16, but no overflow. */
460 ppc_elf_unhandled_reloc),
462 /* Like GOT_TLSGD16_LO, but next higher group of 16 bits. */
464 ppc_elf_unhandled_reloc),
466 /* Like GOT_TLSGD16_HI, but adjust for low 16 bits. */
468 ppc_elf_unhandled_reloc),
470 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
471 with values (sym+add)@dtpmod and zero, and computes the offset to the
472 first entry. */
474 ppc_elf_unhandled_reloc),
476 /* Like GOT_TLSLD16, but no overflow. */
478 ppc_elf_unhandled_reloc),
480 /* Like GOT_TLSLD16_LO, but next higher group of 16 bits. */
482 ppc_elf_unhandled_reloc),
484 /* Like GOT_TLSLD16_HI, but adjust for low 16 bits. */
486 ppc_elf_unhandled_reloc),
488 /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes
489 the offset to the entry. */
491 ppc_elf_unhandled_reloc),
493 /* Like GOT_DTPREL16, but no overflow. */
495 ppc_elf_unhandled_reloc),
497 /* Like GOT_DTPREL16_LO, but next higher group of 16 bits. */
499 ppc_elf_unhandled_reloc),
501 /* Like GOT_DTPREL16_HI, but adjust for low 16 bits. */
503 ppc_elf_unhandled_reloc),
505 /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the
506 offset to the entry. */
508 ppc_elf_unhandled_reloc),
510 /* Like GOT_TPREL16, but no overflow. */
512 ppc_elf_unhandled_reloc),
514 /* Like GOT_TPREL16_LO, but next higher group of 16 bits. */
516 ppc_elf_unhandled_reloc),
518 /* Like GOT_TPREL16_HI, but adjust for low 16 bits. */
520 ppc_elf_unhandled_reloc),
522 /* The remaining relocs are from the Embedded ELF ABI, and are not
523 in the SVR4 ELF ABI. */
525 /* 32 bit value resulting from the addend minus the symbol. */
527 ppc_elf_unhandled_reloc),
529 /* 16 bit value resulting from the addend minus the symbol. */
531 ppc_elf_unhandled_reloc),
533 /* 16 bit value resulting from the addend minus the symbol. */
535 ppc_elf_unhandled_reloc),
537 /* The high order 16 bits of the addend minus the symbol. */
539 ppc_elf_unhandled_reloc),
541 /* The high order 16 bits of the result of the addend minus the address,
542 plus 1 if the contents of the low 16 bits, treated as a signed number,
543 is negative. */
545 ppc_elf_unhandled_reloc),
547 /* 16 bit value resulting from allocating a 4 byte word to hold an
548 address in the .sdata section, and returning the offset from
549 _SDA_BASE_ for that relocation. */
551 ppc_elf_unhandled_reloc),
553 /* 16 bit value resulting from allocating a 4 byte word to hold an
554 address in the .sdata2 section, and returning the offset from
555 _SDA2_BASE_ for that relocation. */
557 ppc_elf_unhandled_reloc),
559 /* A sign-extended 16 bit value relative to _SDA2_BASE_, for use with
560 small data items. */
562 ppc_elf_unhandled_reloc),
564 /* Relocate against either _SDA_BASE_ or _SDA2_BASE_, filling in the 16 bit
565 signed offset from the appropriate base, and filling in the register
566 field with the appropriate register (0, 2, or 13). */
568 ppc_elf_unhandled_reloc),
570 /* Relocation not handled: R_PPC_EMB_MRKREF */
571 /* Relocation not handled: R_PPC_EMB_RELSEC16 */
572 /* Relocation not handled: R_PPC_EMB_RELST_LO */
573 /* Relocation not handled: R_PPC_EMB_RELST_HI */
574 /* Relocation not handled: R_PPC_EMB_RELST_HA */
575 /* Relocation not handled: R_PPC_EMB_BIT_FLD */
577 /* PC relative relocation against either _SDA_BASE_ or _SDA2_BASE_, filling
578 in the 16 bit signed offset from the appropriate base, and filling in the
579 register field with the appropriate register (0, 2, or 13). */
581 ppc_elf_unhandled_reloc),
583 /* A relative 8 bit branch. */
585 bfd_elf_generic_reloc),
587 /* A relative 15 bit branch. */
589 bfd_elf_generic_reloc),
591 /* A relative 24 bit branch. */
593 bfd_elf_generic_reloc),
595 /* The 16 LSBS in split16a format. */
597 ppc_elf_unhandled_reloc),
599 /* The 16 LSBS in split16d format. */
601 ppc_elf_unhandled_reloc),
603 /* Bits 16-31 split16a format. */
605 ppc_elf_unhandled_reloc),
607 /* Bits 16-31 split16d format. */
609 ppc_elf_unhandled_reloc),
611 /* Bits 16-31 (High Adjusted) in split16a format. */
613 ppc_elf_unhandled_reloc),
615 /* Bits 16-31 (High Adjusted) in split16d format. */
617 ppc_elf_unhandled_reloc),
619 /* This reloc is like R_PPC_EMB_SDA21 but only applies to e_add16i
620 instructions. If the register base is 0 then the linker changes
621 the e_add16i to an e_li instruction. */
623 ppc_elf_unhandled_reloc),
625 /* Like R_PPC_VLE_SDA21 but ignore overflow. */
627 ppc_elf_unhandled_reloc),
629 /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
631 ppc_elf_unhandled_reloc),
633 /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
635 ppc_elf_unhandled_reloc),
637 /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
639 ppc_elf_unhandled_reloc),
641 /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
643 ppc_elf_unhandled_reloc),
645 /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
647 ppc_elf_unhandled_reloc),
649 /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
651 ppc_elf_unhandled_reloc),
653 /* e_li split20 format. */
655 ppc_elf_unhandled_reloc),
658 ppc_elf_unhandled_reloc),
660 /* A 16 bit relative relocation. */
662 bfd_elf_generic_reloc),
664 /* A 16 bit relative relocation without overflow. */
666 bfd_elf_generic_reloc),
668 /* The high order 16 bits of a relative address. */
670 bfd_elf_generic_reloc),
672 /* The high order 16 bits of a relative address, plus 1 if the contents of
673 the low 16 bits, treated as a signed number, is negative. */
675 ppc_elf_addr16_ha_reloc),
677 /* Like R_PPC_REL16_HA but for split field in addpcis. */
679 ppc_elf_addr16_ha_reloc),
681 /* A split-field reloc for addpcis, non-relative (gas internal use only). */
683 ppc_elf_addr16_ha_reloc),
685 /* GNU extension to record C++ vtable hierarchy. */
687 NULL),
689 /* GNU extension to record C++ vtable member usage. */
691 NULL),
693 /* Phony reloc to handle AIX style TOC entries. */
695 ppc_elf_unhandled_reloc),
696 };
697 \f
698 /* Initialize the ppc_elf_howto_table, so that linear accesses can be done. */
700 static void
702 {
707 i++)
708 {
714 }
715 }
719 bfd_reloc_code_real_type code)
720 {
723 /* Initialize howto table if not already done. */
728 {
862 }
865 };
870 {
875 i++)
881 }
883 /* Set the howto pointer for a PowerPC ELF reloc. */
885 static bool
889 {
892 /* Initialize howto table if not already done. */
898 {
899 /* xgettext:c-format */
904 }
908 /* Just because the above assert didn't trigger doesn't mean that
909 ELF32_R_TYPE (dst->r_info) is necessarily a valid relocation. */
911 {
912 /* xgettext:c-format */
918 }
921 }
923 /* Handle the R_PPC_ADDR16_HA and R_PPC_REL16_HA relocs. */
925 static bfd_reloc_status_type
933 {
936 bfd_size_type octets;
937 bfd_vma value;
940 {
943 }
971 }
973 static bfd_reloc_status_type
981 {
982 /* If this is a relocatable link (output_bfd test tells us), just
983 call the generic function. Any adjustment will be done at final
984 link time. */
990 {
997 }
999 }
1000 \f
1001 /* Sections created by the linker. */
1004 {
1005 /* Pointer to the bfd section. */
1007 /* Section name. */
1009 /* Associated bss section name. */
1011 /* Associated symbol name. */
1013 /* Associated symbol. */
1017 /* Linked list of allocated pointer entries. This hangs off of the
1018 symbol lists, and provides allows us to return different pointers,
1019 based on different addend's. */
1022 {
1023 /* next allocated pointer for this symbol */
1025 /* offset of pointer from beginning of section */
1026 bfd_vma offset;
1027 /* addend used */
1028 bfd_vma addend;
1029 /* which linker section this is */
1033 struct ppc_elf_obj_tdata
1034 {
1037 /* A mapping from local symbols to offsets into the various linker
1038 sections added. This is index by the symbol index. */
1041 /* Flags used to auto-detect plt type. */
1044 };
1046 #define ppc_elf_tdata(bfd) \
1047 ((struct ppc_elf_obj_tdata *) (bfd)->tdata.any)
1049 #define elf_local_ptr_offsets(bfd) \
1050 (ppc_elf_tdata (bfd)->linker_section_pointers)
1052 #define is_ppc_elf(bfd) \
1053 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
1054 && elf_object_id (bfd) == PPC32_ELF_DATA)
1056 /* Override the generic function because we store some extras. */
1058 static bool
1060 {
1062 PPC32_ELF_DATA);
1063 }
1065 /* When defaulting arch/mach, decode apuinfo to find a better match. */
1067 bool
1069 {
1076 {
1083 }
1086 {
1091 {
1096 {
1099 {
1125 }
1126 }
1128 }
1129 }
1132 {
1137 {
1140 }
1141 }
1143 }
1145 /* Fix bad default arch selected for a 32 bit input bfd when the
1146 default is 64 bit. Also select arch based on apuinfo. */
1148 static bool
1150 {
1155 {
1159 {
1160 /* Relies on arch after 64 bit default being 32 bit default. */
1163 }
1164 }
1166 }
1168 /* Function to set whether a module needs the -mrelocatable bit set. */
1170 static bool
1172 {
1179 }
1181 /* Support for core dump NOTE sections. */
1183 static bool
1185 {
1190 {
1195 /* pr_cursig */
1198 /* pr_pid */
1201 /* pr_reg */
1206 }
1208 /* Make a ".reg/999" section. */
1211 }
1213 static bool
1215 {
1217 {
1228 }
1230 /* Note that for some reason, a spurious space is tacked
1231 onto the end of the args in some (at least one anyway)
1232 implementations, so strip it off if it exists. */
1234 {
1240 }
1243 }
1247 {
1249 {
1254 {
1261 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1262 DIAGNOSTIC_PUSH;
1263 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
1264 -Wstringop-truncation:
1265 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
1266 */
1267 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
1268 #endif
1270 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1271 DIAGNOSTIC_POP;
1272 #endif
1276 }
1279 {
1298 }
1299 }
1300 }
1302 static flagword
1304 {
1310 }
1312 /* Return address for Ith PLT stub in section PLT, for relocation REL
1313 or (bfd_vma) -1 if it should not be included. */
1315 static bfd_vma
1319 {
1321 }
1323 /* Handle a PowerPC specific section when reading an object file. This
1324 is called when bfd_section_from_shdr finds a section with an unknown
1325 type. */
1327 static bool
1332 {
1334 flagword flags;
1355 }
1357 /* Set up any other section flags and such that may be necessary. */
1359 static bool
1363 {
1368 }
1370 /* If we have .sbss2 or .PPC.EMB.sbss0 output sections, we
1371 need to bump up the number of section headers. */
1373 static int
1376 {
1389 }
1391 /* Modify the segment map for VLE executables. */
1393 bool
1396 {
1399 /* At this point in the link, output sections have already been sorted by
1400 LMA and assigned to segments. All that is left to do is to ensure
1401 there is no mixing of VLE & non-VLE sections in a text segment.
1402 If we find that case, we split the segment.
1403 We maintain the original output section order. */
1406 {
1416 {
1420 {
1425 }
1426 }
1429 {
1435 {
1441 }
1443 }
1444 /* If we're splitting a segment which originally contained rw
1445 sections then those sections might now only be in one of the
1446 two parts. So always set p_flags if splitting, even if we
1447 are being called for objcopy with p_flags_valid set. */
1449 {
1452 }
1456 /* Sections 0..j-1 stay in this (current) segment,
1457 the remainder are put in a new segment.
1458 The scan resumes with the new segment. */
1474 }
1477 }
1479 /* Add extra PPC sections -- Note, for now, make .sbss2 and
1480 .PPC.EMB.sbss0 a normal section, and not a bss section so
1481 that the linker doesn't crater when trying to make more than
1482 2 sections. */
1485 {
1496 };
1498 /* This is what we want for new plt/got. */
1504 {
1507 /* See if this is one of the special sections. */
1514 {
1518 }
1521 }
1522 \f
1523 /* Very simple linked list structure for recording apuinfo values. */
1525 {
1528 }
1529 apuinfo_list;
1534 static void
1536 {
1539 }
1541 static void
1543 {
1547 {
1551 }
1560 }
1562 static unsigned
1564 {
1569 entry;
1574 }
1578 {
1584 ;
1587 }
1589 static void
1591 {
1595 {
1599 }
1602 }
1604 /* Scan the input BFDs and create a linked list of
1605 the APUinfo values that will need to be emitted. */
1607 static void
1609 {
1623 /* Read in the input sections contents. */
1625 {
1632 /* xgettext:c-format */
1640 {
1646 }
1650 {
1651 /* xgettext:c-format */
1654 }
1656 /* Verify the contents of the header. Note - we have to
1657 extract the values this way in order to allow for a
1658 host whose endian-ness is different from the target. */
1670 /* Get the number of bytes used for apuinfo entries. */
1675 /* Scan the apuinfo section, building a list of apuinfo numbers. */
1678 }
1683 {
1684 /* Compute the size of the output section. */
1687 /* Set the output section size, if it exists. */
1691 {
1693 /* xgettext:c-format */
1695 }
1696 }
1698 fail:
1703 }
1705 /* Prevent the output section from accumulating the input sections'
1706 contents. We have already stored this in our linked list structure. */
1708 static bool
1713 {
1715 }
1717 /* Finally we can generate the output section. */
1719 static void
1721 {
1726 bfd_size_type length;
1741 {
1742 _bfd_error_handler
1745 }
1747 /* Create the apuinfo header. */
1756 {
1759 }
1770 }
1772 static bool
1774 {
1777 }
1778 \f
1779 static bool
1781 {
1791 }
1793 static bool
1795 {
1800 }
1802 static long
1806 {
1811 bfd_vma stub_off;
1835 /* Call common code to handle old-style executable PLTs. */
1840 /* If this object was prelinked, the prelinker stored the address
1841 of .glink at got[1]. If it wasn't prelinked, got[1] will be zero. */
1844 {
1858 {
1859 Elf_Internal_Dyn dyn;
1866 {
1874 }
1875 }
1877 }
1879 /* Otherwise we read the first plt entry. */
1881 {
1884 }
1889 /* The .glink section usually does not survive the final
1890 link; search for the section (usually .text) where the
1891 glink stubs now reside. */
1896 /* Determine glink PLT resolver by reading the relative branch
1897 from the first glink stub. */
1900 {
1903 /* The first glink stub may either branch to the resolver ... */
1908 /* ... or fall through a bunch of NOPs. */
1915 {
1918 }
1919 }
1922 /* If the stubs are those for -shared/-pie then we might have
1923 multiple stubs for each plt entry. If that is the case then
1924 there is no way to associate stubs with their plt entries short
1925 of figuring out the GOT pointer value used in the stub.
1926 The offsets tested here need to cover all possible values of
1927 GLINK_ENTRY_SIZE for other than __tls_get_addr_opt. */
1942 {
1946 }
1961 {
1968 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
1969 we are defining a symbol, ensure one of them is set. */
1981 {
1986 }
1991 }
1993 /* Add a symbol at the start of the glink branch table. */
2002 s++;
2003 count++;
2006 {
2007 /* Add a symbol for the glink PLT resolver. */
2016 s++;
2017 count++;
2018 }
2021 }
2022 \f
2023 /* The following functions are specific to the ELF linker, while
2024 functions above are used generally. They appear in this file more
2025 or less in the order in which they are called. eg.
2026 ppc_elf_check_relocs is called early in the link process,
2027 ppc_elf_finish_dynamic_sections is one of the last functions
2028 called. */
2030 /* Track PLT entries needed for a given symbol. We might need more
2031 than one glink entry per symbol when generating a pic binary. */
2032 struct plt_entry
2033 {
2036 /* -fPIC uses multiple GOT sections, one per file, called ".got2".
2037 This field stores the offset into .got2 used to initialise the
2038 GOT pointer reg. It will always be at least 32768. (Current
2039 gcc always uses an offset of 32768, but ld -r will pack .got2
2040 sections together resulting in larger offsets). */
2041 bfd_vma addend;
2043 /* The .got2 section. */
2046 /* PLT refcount or offset. */
2047 union
2048 {
2049 bfd_signed_vma refcount;
2050 bfd_vma offset;
2053 /* .glink stub offset. */
2054 bfd_vma glink_offset;
2055 };
2057 /* Of those relocs that might be copied as dynamic relocs, this
2058 function selects those that must be copied when linking a shared
2059 library or PIE, even when the symbol is local. */
2061 static int
2064 {
2066 {
2068 /* Only relative relocs can be resolved when the object load
2069 address isn't fixed. DTPREL32 is excluded because the
2070 dynamic linker needs to differentiate global dynamic from
2071 local dynamic __tls_index pairs when PPC_OPT_TLS is set. */
2086 /* These relocations are relative but in a shared library the
2087 linker doesn't know the thread pointer base. */
2089 }
2090 }
2092 /* If ELIMINATE_COPY_RELOCS is non-zero, the linker will try to avoid
2093 copying dynamic variables from a shared lib into an app's dynbss
2094 section, and instead use a dynamic relocation to point into the
2095 shared lib. */
2096 #define ELIMINATE_COPY_RELOCS 1
2098 /* Used to track dynamic relocations for local symbols. */
2099 struct ppc_dyn_relocs
2100 {
2103 /* The input section of the reloc. */
2106 /* Total number of relocs copied for the input section. */
2109 /* Whether this entry is for STT_GNU_IFUNC symbols. */
2111 };
2113 /* PPC ELF linker hash entry. */
2115 struct ppc_elf_link_hash_entry
2116 {
2119 /* If this symbol is used in the linker created sections, the processor
2120 specific backend uses this field to map the field into the offset
2121 from the beginning of the section. */
2124 /* Contexts in which symbol is used in the GOT.
2125 Bits are or'd into the mask as the corresponding relocs are
2126 encountered during check_relocs, with TLS_TLS being set when any
2127 of the other TLS bits are set. tls_optimize clears bits when
2128 optimizing to indicate the corresponding GOT entry type is not
2129 needed. If set, TLS_TLS is never cleared. tls_optimize may also
2130 set TLS_GDIE when a GD reloc turns into an IE one.
2131 These flags are also kept for local symbols. */
2141 /* The above field is also used to mark function symbols. In which
2142 case TLS_TLS will be 0. */
2147 /* Nonzero if we have seen a small data relocation referring to this
2148 symbol. */
2151 /* Flag use of given relocations. */
2154 };
2156 #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
2158 /* PPC ELF linker hash table. */
2160 struct ppc_elf_link_hash_table
2161 {
2164 /* Various options passed from the linker. */
2167 /* Short-cuts to get to dynamic linker sections. */
2177 /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */
2180 /* Shortcut to __tls_get_addr. */
2183 /* The bfd that forced an old-style PLT. */
2186 /* TLS local dynamic got entry handling. */
2188 bfd_signed_vma refcount;
2189 bfd_vma offset;
2192 /* Offset of branch table to PltResolve function in glink. */
2193 bfd_vma glink_pltresolve;
2195 /* Size of reserved GOT entries. */
2197 /* Non-zero if allocating the header left a gap. */
2200 /* The type of PLT we have chosen to use. */
2203 /* Whether there exist local gnu indirect function resolvers,
2204 referenced by dynamic relocations. */
2208 /* Set if tls optimization is enabled. */
2211 /* Set if inline plt calls should be converted to direct calls. */
2214 /* The size of PLT entries. */
2216 /* The distance between adjacent PLT slots. */
2218 /* The size of the first PLT entry. */
2220 };
2222 /* Rename some of the generic section flags to better document how they
2223 are used for ppc32. The flags are only valid for ppc32 elf objects. */
2225 /* Nonzero if this section has TLS related relocations. */
2226 #define has_tls_reloc sec_flg0
2228 /* Nonzero if this section has a call to __tls_get_addr lacking marker
2229 relocs. */
2230 #define nomark_tls_get_addr sec_flg1
2232 /* Flag set when PLTCALL relocs are detected. */
2233 #define has_pltcall sec_flg2
2235 /* Get the PPC ELF linker hash table from a link_info structure. */
2237 #define ppc_elf_hash_table(p) \
2238 ((is_elf_hash_table ((p)->hash) \
2239 && elf_hash_table_id (elf_hash_table (p)) == PPC32_ELF_DATA) \
2240 ? (struct ppc_elf_link_hash_table *) (p)->hash : NULL)
2242 /* Create an entry in a PPC ELF linker hash table. */
2248 {
2249 /* Allocate the structure if it has not already been allocated by a
2250 subclass. */
2252 {
2257 }
2259 /* Call the allocation method of the superclass. */
2262 {
2266 }
2269 }
2271 /* Create a PPC ELF linker hash table. */
2275 {
2277 static struct ppc_elf_params default_params
2285 ppc_elf_link_hash_newfunc,
2287 PPC32_ELF_DATA))
2288 {
2291 }
2313 }
2315 /* Hook linker params into hash table. */
2317 void
2319 {
2325 }
2327 /* Create .got and the related sections. */
2329 static bool
2331 {
2339 {
2340 /* The powerpc .got has a blrl instruction in it. Mark it
2341 executable. */
2346 }
2349 }
2351 /* Create a special linker section, used for R_PPC_EMB_SDAI16 and
2352 R_PPC_EMB_SDA2I16 pointers. These sections become part of .sdata
2353 and .sdata2. Create _SDA_BASE_ and _SDA2_BASE too. */
2355 static bool
2358 flagword flags,
2360 {
2371 /* Define the sym on the first section of this name. */
2379 }
2381 static bool
2383 {
2386 flagword flags;
2401 {
2409 }
2426 /* Local plt entries. */
2430 flags);
2436 {
2439 htab->relpltlocal
2444 }
2455 }
2457 /* We have to create .dynsbss and .rela.sbss here so that they get mapped
2458 to output sections (just like _bfd_elf_create_dynamic_sections has
2459 to create .dynbss and .rela.bss). */
2461 static bool
2463 {
2466 flagword flags;
2488 {
2496 }
2505 /* The VxWorks PLT is a loaded section with contents. */
2508 }
2510 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2512 static void
2516 {
2533 /* If we were called to copy over info for a weak sym, that's all. */
2538 {
2540 {
2544 /* Add reloc counts against the indirect sym to the direct sym
2545 list. Merge any entries against the same section. */
2547 {
2552 {
2557 }
2560 }
2562 }
2566 }
2568 /* Copy over the GOT refcount entries that we may have already seen to
2569 the symbol which just became indirect. */
2573 /* And plt entries. */
2575 {
2577 {
2582 {
2587 {
2591 }
2594 }
2596 }
2600 }
2603 {
2611 }
2612 }
2614 /* Hook called by the linker routine which adds symbols from an object
2615 file. We use it to put .comm items in .sbss, and not .bss. */
2617 static bool
2625 {
2630 {
2631 /* Common symbols less than or equal to -G nn bytes are automatically
2632 put into .sbss. */
2637 {
2645 flags);
2648 }
2652 }
2655 }
2656 \f
2657 /* Find a linker generated pointer with a given addend and type. */
2660 elf_find_pointer_linker_section
2662 bfd_vma addend,
2664 {
2670 }
2672 /* Allocate a pointer to live in a linker created section. */
2674 static bool
2679 {
2683 bfd_size_type amt;
2687 /* Is this a global symbol? */
2689 {
2692 /* Has this symbol already been allocated? If so, our work is done. */
2696 lsect))
2700 }
2701 else
2702 {
2705 /* Allocation of a pointer to a local symbol. */
2708 /* Allocate a table to hold the local symbols if first time. */
2710 {
2721 }
2723 /* Has this symbol already been allocated? If so, our work is done. */
2726 lsect))
2730 }
2732 /* Allocate space for a pointer in the linker section, and allocate
2733 a new pointer record from internal memory. */
2751 #ifdef DEBUG
2756 #endif
2759 }
2766 {
2772 {
2782 }
2790 }
2792 static bool
2795 {
2804 {
2814 }
2817 }
2821 {
2830 }
2832 static bool
2834 {
2846 }
2848 /* Relocs on inline plt call sequence insns prior to the call. */
2850 static bool
2852 {
2857 }
2859 /* Like bfd_reloc_offset_in_range but without a howto. Return true
2860 iff a field of SIZE bytes at OFFSET is within SEC limits. */
2862 static bool
2864 {
2866 }
2868 static void
2870 {
2871 _bfd_error_handler
2872 /* xgettext:c-format */
2874 abfd,
2877 }
2879 /* Look through the relocs for a section during the first phase, and
2880 allocate space in the global offset table or procedure linkage
2881 table. */
2883 static bool
2888 {
2900 #ifdef DEBUG
2903 #endif
2907 /* Initialize howto table if not already done. */
2913 {
2918 }
2928 {
2936 bfd_vma addend;
2940 {
2945 }
2946 else
2947 {
2953 }
2955 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
2956 This shows up in particular in an R_PPC_ADDR32 in the eabi
2957 startup code. */
2961 {
2967 }
2973 {
2975 {
2978 }
2979 }
2981 {
2983 {
2984 /* Set PLT_IFUNC flag for this sym, no GOT entry yet. */
2990 /* STT_GNU_IFUNC symbols must have a PLT entry;
2991 In a non-pie executable even when there are
2992 no plt calls. */
2998 {
3010 }
3011 }
3012 }
3018 {
3022 /* We have a new-style __tls_get_addr call with a marker
3023 reloc. */
3024 ;
3025 else
3026 /* Mark this section as having an old-style call. */
3028 }
3031 {
3034 /* These special tls relocs tie a call to __tls_get_addr with
3035 its parameter symbol. */
3038 else
3075 dogottls:
3077 /* Fall through. */
3079 /* GOT16 relocations */
3084 /* This symbol requires a global offset table entry. */
3086 {
3091 }
3093 {
3096 }
3097 else
3098 /* This is a global offset table entry for a local symbol. */
3102 /* We may also need a plt entry if the symbol turns out to be
3103 an ifunc. */
3105 {
3108 }
3111 /* Indirect .sdata relocation. */
3118 {
3121 }
3124 /* Indirect .sdata2 relocation. */
3127 {
3130 }
3136 {
3139 }
3144 /* Fall through. */
3153 {
3156 }
3173 {
3176 }
3179 {
3182 }
3190 {
3193 }
3213 /* Fall through. */
3220 pltentry:
3221 #ifdef DEBUG
3223 #endif
3224 /* This symbol requires a procedure linkage table entry. */
3226 {
3231 }
3232 else
3233 {
3238 }
3250 /* The following relocations don't need to propagate the
3251 relocation if linking a shared object since they are
3252 section relative. */
3272 /* These are just markers. */
3283 /* These should only appear in dynamic objects. */
3291 /* These aren't handled yet. We'll report an error later. */
3300 /* This refers only to functions defined in the shared library. */
3303 {
3306 }
3313 /* This relocation describes the C++ object vtable hierarchy.
3314 Reconstruct it for later use during GC. */
3320 /* This relocation describes which C++ vtable entries are actually
3321 used. Record for later use during GC. */
3330 /* Fall through. */
3331 /* We shouldn't really be seeing TPREL32. */
3339 /* Nor these. */
3350 {
3351 /* Old -fPIC gcc code has .long LCTOC1-LCFx just before
3352 the start of a function, which assembles to a REL32
3353 reference to .got2. If we detect one of these, then
3354 force the old PLT layout because the linker cannot
3355 reliably deduce the GOT pointer value needed for
3356 PLT call stubs. */
3361 {
3364 }
3365 }
3368 /* fall through */
3378 {
3379 /* We may need a plt entry if the symbol turns out to be
3380 a function defined in a dynamic object. */
3384 /* We may need a copy reloc too. */
3391 }
3401 {
3403 {
3406 }
3408 }
3409 /* fall through */
3416 {
3417 /* We may need a plt entry if the symbol turns out to be
3418 a function defined in a dynamic object. */
3423 }
3425 dodyn:
3426 /* Set up information for symbols that might need dynamic
3427 relocations. At this point in linking we have read all
3428 the input files and resolved most symbols, but have not
3429 yet decided whether symbols are dynamic or finalized
3430 symbol flags. In some cases we might be setting dynamic
3431 reloc info for symbols that do not end up needing such.
3432 That's OK, adjust_dynamic_symbol and allocate_dynrelocs
3433 work together with this code. */
3441 {
3442 #ifdef DEBUG
3444 "ppc_elf_check_relocs needs to "
3448 #endif
3450 {
3454 sreloc = _bfd_elf_make_dynamic_reloc_section
3459 }
3461 /* If this is a global symbol, we count the number of
3462 relocations we need for this symbol. */
3464 {
3471 {
3480 }
3484 }
3485 else
3486 {
3487 /* Track dynamic relocs needed for local syms too.
3488 We really need local syms available to do this
3489 easily. Oh well. */
3507 {
3516 }
3518 }
3519 }
3522 }
3523 }
3526 }
3527 \f
3528 /* Warn for conflicting Tag_GNU_Power_ABI_FP attributes between IBFD
3529 and OBFD, and merge non-conflicting ones. */
3530 bool
3532 {
3539 /* We only warn about shared library mismatches, because common
3540 libraries advertise support for a particular long double variant
3541 but actually support more than one variant. For example, glibc
3542 typically supports 128-bit IBM long double in the shared library
3543 but has a compatibility static archive for 64-bit long double.
3544 The linker doesn't have the smarts to see that an app using
3545 object files marked as 64-bit long double call the compatibility
3546 layer objects and only from there call into the shared library. */
3556 {
3562 ;
3564 {
3566 {
3570 }
3571 }
3573 {
3574 _bfd_error_handler
3575 /* xgettext:c-format */
3579 }
3581 {
3582 _bfd_error_handler
3583 /* xgettext:c-format */
3587 }
3589 {
3590 _bfd_error_handler
3591 /* xgettext:c-format */
3595 }
3597 {
3598 _bfd_error_handler
3599 /* xgettext:c-format */
3603 }
3608 ;
3610 {
3612 {
3616 }
3617 }
3619 {
3620 _bfd_error_handler
3621 /* xgettext:c-format */
3625 }
3627 {
3628 _bfd_error_handler
3629 /* xgettext:c-format */
3633 }
3635 {
3636 _bfd_error_handler
3637 /* xgettext:c-format */
3641 }
3643 {
3644 _bfd_error_handler
3645 /* xgettext:c-format */
3649 }
3650 }
3653 {
3656 }
3658 }
3660 /* Merge object attributes from IBFD into OBFD. Warn if
3661 there are conflicting attributes. */
3662 static bool
3664 {
3677 /* Check for conflicting Tag_GNU_Power_ABI_Vector attributes and
3678 merge non-conflicting ones. */
3683 {
3689 ;
3691 {
3695 }
3696 /* For now, allow generic to transition to AltiVec or SPE
3697 without a warning. If GCC marked files with their stack
3698 alignment and used don't-care markings for files which are
3699 not affected by the vector ABI, we could warn about this
3700 case too. */
3702 ;
3704 {
3708 }
3710 {
3711 _bfd_error_handler
3712 /* xgettext:c-format */
3717 }
3719 {
3720 _bfd_error_handler
3721 /* xgettext:c-format */
3726 }
3727 }
3729 /* Check for conflicting Tag_GNU_Power_ABI_Struct_Return attributes
3730 and merge non-conflicting ones. */
3734 {
3740 ;
3742 {
3746 }
3748 {
3749 _bfd_error_handler
3750 /* xgettext:c-format */
3755 }
3757 {
3758 _bfd_error_handler
3759 /* xgettext:c-format */
3764 }
3765 }
3767 {
3770 }
3772 /* Merge Tag_compatibility attributes and any common GNU ones. */
3774 }
3776 /* Merge backend specific data from an object file to the output
3777 object file when linking. */
3779 static bool
3781 {
3783 flagword old_flags;
3784 flagword new_flags;
3790 /* Check if we have the same endianness. */
3803 {
3804 /* First call, no flags set. */
3807 }
3809 /* Compatible flags are ok. */
3811 ;
3813 /* Incompatible flags. */
3814 else
3815 {
3816 /* Warn about -mrelocatable mismatch. Allow -mrelocatable-lib
3817 to be linked with either. */
3821 {
3823 _bfd_error_handler
3826 }
3829 {
3831 _bfd_error_handler
3834 }
3836 /* The output is -mrelocatable-lib iff both the input files are. */
3840 /* The output is -mrelocatable iff it can't be -mrelocatable-lib,
3841 but each input file is either -mrelocatable or -mrelocatable-lib. */
3847 /* Do not warn about eabi vs. V.4 mismatch, just or in the bit if
3848 any module uses it. */
3854 /* Warn about any other mismatches. */
3856 {
3858 _bfd_error_handler
3859 /* xgettext:c-format */
3863 }
3866 {
3869 }
3870 }
3873 }
3875 static bfd_reloc_status_type
3880 bfd_vma value,
3881 split16_format_type split16_format,
3883 {
3895 {
3897 {
3900 else
3901 _bfd_error_handler
3902 /* xgettext:c-format */
3905 }
3906 }
3914 {
3916 {
3919 else
3920 _bfd_error_handler
3921 /* xgettext:c-format */
3924 }
3925 }
3927 {
3931 {
3932 /* Hack for e_li. Extend sign. */
3935 }
3936 }
3937 else
3938 {
3941 }
3945 }
3947 static void
3949 {
3953 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
3954 /* Top 4 bits of value to 17..20. */
3956 /* Next 5 bits of the value to 11..15. */
3958 /* And the final 11 bits of the value to bits 21 to 31. */
3961 }
3963 \f
3964 /* Choose which PLT scheme to use, and set .plt flags appropriately.
3965 Returns -1 on error, 0 for old PLT, 1 for new PLT. */
3966 int
3969 {
3971 flagword flags;
3976 {
3990 {
3991 /* Profiling of shared libs (and pies) is not supported with
3992 secure plt, because ppc32 does profiling before a
3993 function prologue and a secure plt pic call stubs needs
3994 r30 to be set up. */
3996 }
3997 else
3998 {
4002 /* Look through the reloc flags left by ppc_elf_check_relocs.
4003 Use the old style bss plt if a file makes plt calls
4004 without using the new relocs, and if ld isn't given
4005 --secure-plt and we never see REL16 relocs. */
4010 {
4014 {
4018 }
4019 }
4021 }
4022 }
4024 {
4027 else
4029 }
4034 {
4038 /* The new PLT is a loaded section. */
4043 /* The new GOT is not executable. */
4047 }
4048 else
4049 {
4050 /* Stop an unused .glink section from affecting .text alignment. */
4054 }
4056 }
4057 \f
4058 /* Return the section that should be marked against GC for a given
4059 relocation. */
4067 {
4070 {
4074 }
4077 }
4079 static bool
4087 {
4091 {
4107 {
4113 }
4117 }
4118 else
4119 {
4124 {
4133 }
4146 {
4153 {
4159 }
4161 }
4162 }
4164 }
4165 \f
4166 /* Analyze inline PLT call relocations to see whether calls to locally
4167 defined functions can be converted to direct calls. */
4169 bool
4171 {
4181 /* A bl insn can reach -0x2000000 to 0x1fffffc. The limit is
4182 reduced somewhat to cater for possible stubs that might be added
4183 between the call and its destination. */
4189 {
4194 }
4196 /* If a "bl" can reach anywhere in local code sections, then we can
4197 convert all inline PLT sequences to direct calls when the symbol
4198 is local. */
4200 {
4203 }
4205 /* Otherwise, go looking through relocs for cases where a direct
4206 call won't reach. Mark the symbol on any such reloc to disable
4207 the optimization and keep the PLT entry as it seems likely that
4208 this will be better than creating trampolines. Note that this
4209 will disable the optimization for all inline PLT calls to a
4210 particular symbol, not just those that won't reach. The
4211 difficulty in doing a more precise optimization is that the
4212 linker needs to make a decision depending on whether a
4213 particular R_PPC_PLTCALL insn can be turned into a direct
4214 call, for each of the R_PPC_PLTSEQ and R_PPC_PLT16* insns in
4215 the sequence, and there is nothing that ties those relocs
4216 together except their symbol. */
4219 {
4232 {
4235 /* Read the relocations. */
4243 {
4258 {
4264 }
4267 {
4271 else
4281 }
4282 }
4285 }
4289 {
4292 else
4294 }
4295 }
4298 }
4300 /* Set plt output section type, htab->tls_get_addr, and call the
4301 generic ELF tls_setup function. */
4303 asection *
4305 {
4315 {
4322 {
4323 /* If glibc supports an optimized __tls_get_addr call stub,
4324 signalled by the presence of __tls_get_addr_opt, and we'll
4325 be calling __tls_get_addr via a plt call stub, then
4326 make __tls_get_addr point to __tls_get_addr_opt. */
4334 {
4340 {
4346 {
4347 /* Use __tls_get_addr_opt in dynamic relocations. */
4353 }
4355 }
4356 }
4357 }
4358 else
4360 }
4364 {
4367 }
4370 }
4372 /* Return TRUE iff REL is a branch reloc with a global symbol matching
4373 HASH. */
4375 static bool
4379 {
4385 {
4395 }
4397 }
4399 /* Run through all the TLS relocs looking for optimization
4400 opportunities. */
4402 bool
4405 {
4420 /* Make two passes through the relocs. First time check that tls
4421 relocs involved in setting up a tls_get_addr call are indeed
4422 followed by such a call. If they are not, don't do any tls
4423 optimization. On the second pass twiddle tls_mask flags to
4424 notify relocate_section that optimization can be done, and
4425 adjust got and plt refcounts. */
4428 {
4434 {
4438 /* Read the relocations. */
4446 {
4457 {
4465 }
4469 /* If this section has old-style __tls_get_addr calls
4470 without marker relocs, then check that each
4471 __tls_get_addr call reloc is preceded by a reloc
4472 that conceivably belongs to the __tls_get_addr arg
4473 setup insn. If we don't find matching arg setup
4474 relocs, don't do any tls optimization. */
4479 && !expecting_tls_get_addr
4481 {
4488 }
4492 {
4496 /* Fall through. */
4500 /* These relocs should never be against a symbol
4501 defined in a shared lib. Leave them alone if
4502 that turns out to be the case. */
4506 /* LD -> LE */
4514 /* Fall through. */
4519 /* GD -> LE */
4521 else
4522 /* GD -> IE */
4532 {
4533 /* IE -> LE */
4537 }
4538 else
4544 /* Fall through. */
4548 {
4551 {
4555 {
4564 {
4575 }
4576 }
4577 }
4579 }
4587 {
4593 {
4597 }
4599 /* addis rt,2,imm */
4602 {
4603 /* xgettext:c-format */
4608 }
4609 }
4618 }
4621 {
4631 /* Uh oh, we didn't find the expected call. We
4632 could just mark this symbol to exclude it
4633 from tls optimization but it's safer to skip
4634 the entire optimization. */
4641 }
4644 {
4647 }
4648 else
4649 {
4663 }
4665 /* If we don't have old-style __tls_get_addr calls
4666 without TLSGD/TLSLD marker relocs, and we haven't
4667 found a new-style __tls_get_addr call with a
4668 marker for this symbol, then we either have a
4669 broken object file or an -mlongcall style
4670 indirect call to __tls_get_addr without a marker.
4671 Disable optimization in this case. */
4679 {
4691 }
4696 {
4697 /* We managed to get rid of a got entry. */
4700 }
4704 }
4708 }
4709 }
4711 }
4712 \f
4713 /* Return true if we have dynamic relocs against H or any of its weak
4714 aliases, that apply to read-only sections. Cannot be used after
4715 size_dynamic_sections. */
4717 static bool
4719 {
4721 do
4722 {
4729 }
4731 /* Return whether H has pc-relative dynamic relocs. */
4733 static bool
4735 {
4742 }
4744 /* Adjust a symbol defined by a dynamic object and referenced by a
4745 regular object. The current definition is in some section of the
4746 dynamic object, but we're not including those sections. We have to
4747 change the definition to something the rest of the link can
4748 understand. */
4750 static bool
4753 {
4757 #ifdef DEBUG
4760 #endif
4762 /* Make sure we know what is going on here. */
4772 /* Deal with function syms. */
4776 {
4779 /* Discard dyn_relocs when non-pic if we've decided that a
4780 function symbol is local. */
4784 /* Clear procedure linkage table information for any symbol that
4785 won't need a .plt entry. */
4792 && local
4796 {
4797 /* A PLT entry is not required/allowed when:
4799 1. We are not using ld.so; because then the PLT entry
4800 can't be set up, so we can't use one. In this case,
4801 ppc_elf_adjust_dynamic_symbol won't even be called.
4803 2. GC has rendered the entry unused.
4805 3. We know for certain that a call to this symbol
4806 will go to this object, or will remain undefined. */
4810 }
4811 else
4812 {
4813 /* Taking a function's address in a read/write section
4814 doesn't require us to define the function symbol in the
4815 executable on a plt call stub. A dynamic reloc can
4816 be used instead, giving better runtime performance.
4817 (Calls via that function pointer don't need to bounce
4818 through the plt call stub.) Similarly, use a dynamic
4819 reloc for a weak reference when possible, allowing the
4820 resolution of the symbol to be set at load time rather
4821 than link time. */
4829 {
4831 /* If we haven't seen a branch reloc and the symbol
4832 isn't an ifunc then we don't need a plt entry. */
4835 }
4837 /* We are going to be defining the function symbol on the
4838 plt stub, so no dyn_relocs needed when non-pic. */
4840 }
4842 /* Function symbols can't have copy relocs. */
4844 }
4845 else
4848 /* If this is a weak symbol, and there is a real definition, the
4849 processor independent code will have arranged for us to see the
4850 real definition first, and we can just use the same value. */
4852 {
4862 }
4864 /* This is a reference to a symbol defined by a dynamic object which
4865 is not a function. */
4867 /* If we are creating a shared library, we must presume that the
4868 only references to the symbol are via the global offset table.
4869 For such cases we need not do anything here; the relocations will
4870 be handled correctly by relocate_section. */
4872 {
4875 }
4877 /* If there are no references to this symbol that do not use the
4878 GOT, we don't need to generate a copy reloc. */
4880 {
4883 }
4885 /* Protected variables do not work with .dynbss. The copy in
4886 .dynbss won't be used by the shared library with the protected
4887 definition for the variable. Editing to PIC, or text relocations
4888 are preferable to an incorrect program. */
4890 {
4898 }
4900 /* If -z nocopyreloc was given, we won't generate them either. */
4904 /* If we don't find any dynamic relocs in read-only sections, then
4905 we'll be keeping the dynamic relocs and avoiding the copy reloc.
4906 We can't do this if there are any small data relocations. This
4907 doesn't work on VxWorks, where we can not have dynamic
4908 relocations (other than copy and jump slot relocations) in an
4909 executable. */
4917 /* We must allocate the symbol in our .dynbss section, which will
4918 become part of the .bss section of the executable. There will be
4919 an entry for this symbol in the .dynsym section. The dynamic
4920 object will contain position independent code, so all references
4921 from the dynamic object to this symbol will go through the global
4922 offset table. The dynamic linker will use the .dynsym entry to
4923 determine the address it must put in the global offset table, so
4924 both the dynamic object and the regular object will refer to the
4925 same memory location for the variable.
4927 Of course, if the symbol is referenced using SDAREL relocs, we
4928 must instead allocate it in .sbss. */
4933 else
4938 {
4941 /* We must generate a R_PPC_COPY reloc to tell the dynamic
4942 linker to copy the initial value out of the dynamic object
4943 and into the runtime process image. */
4948 else
4953 }
4955 /* We no longer want dyn_relocs. */
4958 }
4959 \f
4960 /* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
4961 xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
4962 specifying the addend on the plt relocation. For -fpic code, the sym
4963 is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
4964 xxxxxxxx.got2.plt_pic32.<callee>. */
4966 static bool
4970 {
4979 else
4999 {
5009 }
5011 }
5013 /* Allocate NEED contiguous space in .got, and return the offset.
5014 Handles allocation of the got header when crossing 32k. */
5016 static bfd_vma
5018 {
5019 bfd_vma where;
5023 {
5026 }
5027 else
5028 {
5031 {
5034 }
5035 else
5036 {
5039 {
5042 }
5045 }
5046 }
5048 }
5050 /* Calculate size of GOT entries for symbol given its TLS_MASK.
5051 TLS_LD is excluded because those go in a special GOT slot. */
5055 {
5059 else
5060 {
5068 }
5070 }
5072 /* If H is undefined, make it dynamic if that makes sense. */
5074 static bool
5077 {
5089 }
5091 /* Choose whether to use htab->iplt or htab->pltlocal rather than the
5092 usual htab->elf.splt section for a PLT entry. */
5097 {
5101 }
5103 /* Allocate space in associated reloc sections for dynamic relocs. */
5105 static bool
5107 {
5119 || (ELIMINATE_COPY_RELOCS
5125 {
5128 /* Make sure this symbol is output as a dynamic symbol. */
5134 {
5136 /* We'll just use htab->tlsld_got.offset. This should
5137 always be the case. It's a little odd if we have
5138 a local dynamic reloc against a non-local symbol. */
5140 else
5142 }
5146 else
5147 {
5158 {
5168 }
5169 }
5170 }
5171 else
5174 /* If no dynamic sections we can't have dynamic relocs, except for
5175 IFUNCs which are handled even in static executables. */
5180 /* Discard relocs on undefined symbols that must be local. */
5185 /* Also discard relocs on undefined weak syms with non-default
5186 visibility, or when dynamic_undefined_weak says so. */
5191 ;
5193 /* In the shared -Bsymbolic case, discard space allocated for
5194 dynamic pc-relative relocs against symbols which turn out to be
5195 defined in regular objects. For the normal shared case, discard
5196 space for relocs that have become local due to symbol visibility
5197 changes. */
5199 {
5200 /* Relocs that use pc_count are those that appear on a call insn,
5201 or certain REL relocs (see must_be_dyn_reloc) that can be
5202 generated via assembly. We want calls to protected symbols to
5203 resolve directly to the function rather than going via the plt.
5204 If people want function pointer comparisons to work as expected
5205 then they should avoid writing weird assembly. */
5207 {
5211 {
5216 else
5218 }
5219 }
5222 {
5226 {
5229 else
5231 }
5232 }
5235 {
5236 /* Make sure this symbol is output as a dynamic symbol. */
5239 }
5240 }
5242 {
5243 /* For the non-pic case, discard space for relocs against
5244 symbols which turn out to need copy relocs or are not
5245 dynamic. */
5257 {
5258 /* Make sure this symbol is output as a dynamic symbol. */
5264 }
5265 else
5267 }
5269 /* Allocate space. */
5271 {
5276 }
5278 /* Handle PLT relocs. Done last, after dynindx has settled.
5279 We might need a PLT entry when the symbol
5280 a) is dynamic, or
5281 b) is an ifunc, or
5282 c) has plt16 relocs and has been processed by adjust_dynamic_symbol, or
5283 d) has plt16 relocs and we are linking statically. */
5293 {
5300 {
5310 {
5313 else
5315 }
5318 {
5320 {
5323 }
5328 else
5329 {
5332 {
5335 }
5340 {
5343 }
5349 }
5350 }
5351 else
5352 {
5354 {
5355 /* If this is the first .plt entry, make room
5356 for the special first entry. */
5360 /* The PowerPC PLT is actually composed of two
5361 parts, the first part is 2 words (for a load
5362 and a jump), and then there is a remaining
5363 word available at the end. */
5370 /* If this symbol is not defined in a regular
5371 file, and we are not generating a shared
5372 library, then set the symbol to this location
5373 in the .plt. This is to avoid text
5374 relocations, and is required to make
5375 function pointers compare as equal between
5376 the normal executable and the shared library. */
5380 {
5383 }
5385 /* Make room for this entry. */
5387 /* After the 8192nd entry, room for two entries
5388 is allocated. */
5394 }
5396 }
5398 /* We also need to make an entry in the .rela.plt section. */
5400 {
5402 {
5404 {
5407 }
5409 {
5412 }
5413 }
5414 else
5415 {
5419 {
5420 /* Allocate space for the unloaded relocations. */
5423 {
5426 {
5430 }
5435 }
5437 /* Every PLT entry has an associated GOT entry in
5438 .got.plt. */
5440 }
5441 }
5443 }
5444 }
5445 else
5449 {
5452 }
5453 }
5454 else
5455 {
5458 }
5461 }
5464 {
5475 };
5477 /* Set the sizes of the dynamic sections. */
5479 static bool
5482 {
5488 #ifdef DEBUG
5490 #endif
5496 {
5497 /* Set the contents of the .interp section to the interpreter. */
5499 {
5504 }
5505 }
5512 /* Set up .got offsets for local syms, and space for local dynamic
5513 relocs. */
5515 {
5521 bfd_size_type locsymcount;
5530 {
5537 {
5540 {
5541 /* Input section has been discarded, either because
5542 it is a copy of a linkonce section or due to
5543 linker script /DISCARD/, so we'll be discarding
5544 the relocs too. */
5545 }
5549 {
5550 /* Relocations in vxworks .tls_vars sections are
5551 handled specially by the loader. */
5552 }
5554 {
5562 {
5566 }
5567 }
5568 }
5569 }
5583 {
5588 }
5594 {
5601 else
5602 {
5608 {
5616 }
5617 }
5618 }
5619 else
5625 /* Allocate space for calls to local STT_GNU_IFUNC syms in .iplt. */
5628 {
5635 {
5640 {
5643 }
5644 else
5648 {
5651 }
5655 {
5659 }
5663 {
5665 {
5668 }
5670 {
5673 }
5675 }
5676 }
5677 else
5679 }
5683 {
5686 else
5688 }
5689 }
5691 /* Allocate space for global sym dynamic relocs. */
5695 {
5699 }
5700 else
5704 {
5707 /* If we haven't allocated the header, do so now. When we get here,
5708 for old plt/got the got size will be 0 to 32764 (not allocated),
5709 or 32780 to 65536 (header allocated). For new plt/got, the
5710 corresponding ranges are 0 to 32768 and 32780 to 65536. */
5712 {
5717 }
5720 }
5722 {
5727 }
5729 {
5737 }
5742 {
5744 /* Space for the branch table. */
5747 /* Pad out to align the start of PLTresolve. */
5753 {
5760 {
5770 }
5776 {
5786 }
5787 }
5788 }
5795 {
5799 {
5803 }
5804 }
5806 /* We've now determined the sizes of the various dynamic sections.
5807 Allocate memory for them. */
5810 {
5818 {
5819 /* We'd like to strip these sections if they aren't needed, but if
5820 we've exported dynamic symbols from them we must leave them.
5821 It's too late to tell BFD to get rid of the symbols. */
5824 /* Strip this section if we don't need it; see the
5825 comment below. */
5826 }
5836 {
5837 /* Strip these too. */
5838 }
5841 {
5843 }
5845 {
5847 {
5848 /* Remember whether there are any relocation sections. */
5851 /* We use the reloc_count field as a counter if we need
5852 to copy relocs into the output file. */
5854 }
5855 }
5856 else
5857 {
5858 /* It's not one of our sections, so don't allocate space. */
5860 }
5863 {
5864 /* If we don't need this section, strip it from the
5865 output file. This is mostly to handle .rela.bss and
5866 .rela.plt. We must create both sections in
5867 create_dynamic_sections, because they must be created
5868 before the linker maps input sections to output
5869 sections. The linker does that before
5870 adjust_dynamic_symbol is called, and it is that
5871 function which decides whether anything needs to go
5872 into these sections. */
5875 }
5880 /* Allocate memory for the section contents. */
5884 }
5887 {
5888 /* Add some entries to the .dynamic section. We fill in the
5889 values later, in ppc_elf_finish_dynamic_sections, but we
5890 must add the entries now so that we get the correct size for
5891 the .dynamic section. The DT_DEBUG entry is filled in by the
5892 dynamic linker and used by the debugger. */
5893 #define add_dynamic_entry(TAG, VAL) \
5894 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
5897 relocs))
5903 {
5911 }
5912 }
5913 #undef add_dynamic_entry
5917 {
5919 bfd_vma val;
5922 /* CIE length (rewrite in case little-endian). */
5925 /* FDE length. */
5929 /* CIE pointer. */
5933 /* Offset to .glink. Set later. */
5935 /* .glink size. */
5938 /* Augmentation. */
5943 {
5948 {
5951 }
5953 {
5957 }
5958 else
5959 {
5963 }
5966 p++;
5970 }
5973 }
5976 }
5978 /* Arrange to have _SDA_BASE_ or _SDA2_BASE_ stripped from the output
5979 if it looks like nothing is using them. */
5981 static void
5983 {
5987 {
5992 {
5995 {
5997 /* This is somewhat magic. See elf_link_output_extsym. */
6000 }
6001 }
6002 }
6003 }
6005 void
6007 {
6011 {
6014 }
6015 }
6018 /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */
6020 static bool
6022 {
6030 }
6031 \f
6032 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
6034 /* Relaxation trampolines. r12 is available for clobbering (r11, is
6035 used for some functions that are allowed to break the ABI). */
6037 {
6046 };
6049 {
6054 };
6056 struct ppc_elf_relax_info
6057 {
6060 };
6062 /* This function implements long branch trampolines, and the ppc476
6063 icache bug workaround. Any section needing trampolines or patch
6064 space for the workaround has its size extended so that we can
6065 add trampolines at the end of the section. */
6067 static bool
6072 {
6073 struct one_branch_fixup
6074 {
6077 /* Final link, can use the symbol offset. For a
6078 relocatable link we use the symbol's index. */
6079 bfd_vma toff;
6080 bfd_vma trampoff;
6081 };
6099 /* No need to do anything with non-alloc or non-code sections. */
6106 /* We cannot represent the required PIC relocs in the output, so don't
6107 do anything. The linker doesn't support mixing -shared and -r
6108 anyway. */
6127 {
6129 {
6134 }
6137 }
6141 /* Space for a branch around any trampolines. */
6150 {
6151 /* Get a copy of the native relocations. */
6153 {
6158 }
6164 {
6179 {
6200 }
6202 /* Get the value of the symbol referred to by the reloc. */
6208 {
6210 ;
6213 else
6218 }
6219 else
6220 {
6225 {
6231 }
6232 else
6235 /* If this branch is to __tls_get_addr then we may later
6236 optimise away the call. We won't be needing a long-
6237 branch stub in that case. */
6241 {
6246 /* The previous reloc should be one of R_PPC_TLSGD or
6247 R_PPC_TLSLD, or for older object files, a reloc
6248 on the __tls_get_addr arg setup insn. Get tls
6249 mask bits from the symbol on that reloc. */
6251 {
6255 {
6261 }
6262 }
6263 else
6264 {
6272 tls_mask
6274 }
6276 /* The mask bits tell us if the call will be
6277 optimised away. */
6288 }
6291 }
6294 {
6302 }
6304 /* The condition here under which we call find_plt_ent must
6305 match that in relocate_section. If we call find_plt_ent here
6306 but not in relocate_section, or vice versa, then the branch
6307 destination used here may be incorrect. */
6310 {
6311 /* We know is_branch_reloc (r_type) is true. */
6315 }
6318 {
6323 }
6325 {
6333 {
6338 {
6341 }
6342 else
6343 {
6346 }
6347 }
6348 }
6350 /* If the branch and target are in the same section, you have
6351 no hope of adding stubs. We'll error out later should the
6352 branch overflow. */
6356 /* toff is used for the symbol index when the symbol is
6357 undefined and we're doing a relocatable link, so we can't
6358 support addends. It would be possible to do so by
6359 putting the addend in one_branch_fixup but addends on
6360 branches are rare so it hardly seems worth supporting. */
6367 /* There probably isn't any reason to handle symbols in
6368 SEC_MERGE sections; SEC_MERGE doesn't seem a likely
6369 attribute for a code section, and we are only looking at
6370 branches. However, implement it correctly here as a
6371 reference for other target relax_section functions. */
6373 {
6374 /* At this stage in linking, no SEC_MERGE symbol has been
6375 adjusted, so all references to such symbols need to be
6376 passed through _bfd_merged_section_offset. (Later, in
6377 relocate_section, all SEC_MERGE symbols *except* for
6378 section symbols have been adjusted.)
6380 gas may reduce relocations against symbols in SEC_MERGE
6381 sections to a relocation against the section symbol when
6382 the original addend was zero. When the reloc is against
6383 a section symbol we should include the addend in the
6384 offset passed to _bfd_merged_section_offset, since the
6385 location of interest is the original symbol. On the
6386 other hand, an access to "sym+addend" where "sym" is not
6387 a section symbol should not include the addend; Such an
6388 access is presumed to be an offset from "sym"; The
6389 location of interest is just "sym". */
6394 toff
6397 toff);
6402 }
6403 /* PLTREL24 addends are special. */
6407 /* Attempted -shared link of non-pic code loses. */
6417 /* Avoid creating a lot of unnecessary fixups when
6418 relocatable if the output section size is such that a
6419 fixup can be created at final link.
6420 The max_branch_offset adjustment allows for some number
6421 of other fixups being needed at final link. */
6427 /* If the branch is in range, no need to do anything. */
6430 /* A relocatable link may have sections moved during
6431 final link, so do not presume they remain in range. */
6433 {
6441 }
6443 /* Look for an existing fixup to this address. */
6449 {
6455 /* Oh dear, we can't reach a trampoline. Don't try to add
6456 one. We'll report an error later. */
6460 {
6463 }
6464 else
6465 {
6468 }
6472 {
6476 }
6478 /* Hijack the old relocation. Since we need two
6479 relocations for this use a "composite" reloc. */
6481 stub_rtype);
6487 /* Record the fixup so we don't do it again this section. */
6496 changes++;
6497 }
6498 else
6499 {
6504 /* Nop out the reloc, since we're finalizing things here. */
6506 }
6508 /* Get the section contents. */
6510 {
6511 /* Get cached copy if it exists. */
6514 /* Go get them off disk. */
6517 }
6519 /* Fix up the existing branch to hit the trampoline. */
6522 {
6540 }
6541 }
6544 {
6548 }
6549 }
6556 {
6566 {
6567 /* Keep space aligned, to ensure the patch code itself does
6568 not cross a page. Don't decrease size calculated on a
6569 previous pass as otherwise we might never settle on a layout. */
6573 {
6576 }
6577 /* Ensure relocate_section is called. */
6579 }
6581 }
6584 {
6589 }
6596 {
6599 else
6600 {
6601 /* Cache the symbols for elf_link_input_bfd. */
6603 }
6604 }
6608 {
6611 else
6612 {
6613 /* Cache the section contents for elf_link_input_bfd. */
6615 }
6616 }
6620 {
6621 /* Append sufficient NOP relocs so we can write out relocation
6622 information for the trampolines. */
6633 {
6637 }
6644 }
6651 error_return:
6653 {
6657 }
6665 }
6666 \f
6667 /* What to do when ld finds relocations against symbols defined in
6668 discarded sections. */
6670 static unsigned int
6672 {
6680 }
6681 \f
6682 /* Fill in the address for a pointer generated in a linker section. */
6684 static bfd_vma
6688 bfd_vma relocation,
6690 {
6696 {
6697 /* Handle global symbol. */
6703 }
6704 else
6705 {
6706 /* Handle local symbol. */
6712 }
6716 lsect);
6719 /* Offset will always be a multiple of four, so use the bottom bit
6720 as a "written" flag. */
6722 {
6727 }
6734 #ifdef DEBUG
6738 #endif
6741 }
6743 #define PPC_LO(v) ((v) & 0xffff)
6744 #define PPC_HI(v) (((v) >> 16) & 0xffff)
6745 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
6747 static void
6751 {
6754 bfd_vma plt;
6760 {
6777 }
6784 {
6798 else
6799 {
6803 }
6804 }
6805 else
6806 {
6810 }
6817 {
6820 }
6821 }
6823 /* Return true if symbol is defined statically. */
6825 static bool
6827 {
6832 }
6834 /* If INSN is an opcode that may be used with an @tls operand, return
6835 the transformed insn for TLS optimisation, otherwise return 0. If
6836 REG is non-zero only match an insn with RB or RA equal to REG. */
6838 unsigned int
6840 {
6850 else
6854 /* add -> addi. */
6860 /* load and store indexed -> dform. */
6863 /* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
6866 /* lwax -> lwa. */
6868 else
6872 }
6874 /* If INSN is an opcode that may be used with an @tprel operand, return
6875 the transformed insn for an undefined weak symbol, ie. with the
6876 thread pointer REG operand removed. Otherwise return 0. */
6878 unsigned int
6880 {
6901 {
6903 }
6908 {
6913 }
6914 else
6917 }
6919 static bool
6921 {
6926 }
6928 static bool
6930 {
6934 }
6936 /* The RELOCATE_SECTION function is called by the ELF backend linker
6937 to handle the relocations for a section.
6939 The relocs are always passed as Rela structures; if the section
6940 actually uses Rel structures, the r_addend field will always be
6941 zero.
6943 This function is responsible for adjust the section contents as
6944 necessary, and (if using Rela relocs and generating a
6945 relocatable output file) adjusting the reloc addend as
6946 necessary.
6948 This function does not have to worry about setting the reloc
6949 address or the reloc symbol index.
6951 LOCAL_SYMS is a pointer to the swapped in local symbols.
6953 LOCAL_SECTIONS is an array giving the section in the input file
6954 corresponding to the st_shndx field of each local symbol.
6956 The global hash table entry for the global symbols can be found
6957 via elf_sym_hashes (input_bfd).
6959 When generating relocatable output, this function must handle
6960 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
6961 going to be the section symbol corresponding to the output
6962 section, which means that the addend must be adjusted
6963 accordingly. */
6965 static int
6974 {
6981 Elf_Internal_Rela outrel;
6990 #ifdef DEBUG
6996 #endif
6999 {
7002 }
7006 /* Initialize howto table if not already done. */
7014 /* We have to handle relocations in vxworks .tls_vars sections
7015 specially, because the dynamic loader is 'weird'. */
7024 {
7026 bfd_vma addend;
7027 bfd_reloc_status_type r;
7034 bfd_vma relocation;
7042 again:
7052 {
7058 }
7059 else
7060 {
7069 }
7072 {
7073 /* For relocs against symbols from removed linkonce sections,
7074 or sections discarded by a linker script, we just want the
7075 section contents zeroed. Avoid any special processing. */
7086 /* For ld -r, remove relocations in debug sections against
7087 symbols defined in discarded sections. Not done for
7088 non-debug to preserve relocs in .eh_frame which the
7089 eh_frame editing code expects to be present. */
7092 wrel--;
7095 }
7098 {
7102 {
7103 /* R_PPC_PLTREL24 is rather special. If non-zero, the
7104 addend specifies the GOT pointer offset within .got2. */
7106 }
7111 }
7113 /* TLS optimizations. Replace instruction sequences and relocs
7114 based on information we collected in tls_optimize. We edit
7115 RELOCS so that --emit-relocs will output something sensible
7116 for the final instruction stream. */
7122 {
7125 local_plt
7129 }
7131 /* Ensure reloc mapping code below stays sane. */
7142 {
7151 {
7152 bfd_vma insn;
7162 }
7169 {
7170 bfd_vma insn;
7180 /* Was PPC_TLS which sits on insn boundary, now
7181 PPC_TPREL16_LO which is at low-order half-word. */
7183 }
7198 {
7199 tls_gdld_hi:
7203 else
7204 {
7208 }
7210 }
7225 {
7227 bfd_vma offset;
7229 tls_ldgd_opt:
7231 /* If not using the newer R_PPC_TLSGD/LD to mark
7232 __tls_get_addr calls, we must trust that the call
7233 stays with its arg setup insns, ie. that the next
7234 reloc is the __tls_get_addr call associated with
7235 the current reloc. Edit both insns. */
7241 /* We read the low GOT_TLS insn because we need to keep
7242 the destination reg. It may be something other than
7243 the usual r3, and moved to r3 before the call by
7244 intervening code. */
7248 {
7249 /* IE */
7254 {
7258 }
7262 }
7263 else
7264 {
7265 /* LE */
7269 {
7270 /* Was an LD reloc. */
7273 r_symndx++)
7283 }
7288 {
7294 }
7295 }
7299 {
7300 /* We changed the symbol on an LD reloc. Start over
7301 in order to get h, sym, sec etc. right. */
7303 }
7304 }
7311 {
7316 {
7320 }
7323 {
7324 /* IE */
7327 }
7328 else
7329 {
7330 /* LE */
7334 }
7337 /* Zap the reloc on the _tls_get_addr call too. */
7340 }
7347 {
7351 {
7355 }
7359 r_symndx++)
7375 /* Zap the reloc on the _tls_get_addr call too. */
7379 }
7381 }
7383 /* Handle other relocations that tweak non-addend part of insn. */
7386 {
7390 /* Branch taken prediction relocations. */
7394 /* Fall through. */
7396 /* Branch not taken prediction relocations. */
7400 {
7411 /* Invert 'y' bit if not the default. */
7416 }
7421 {
7428 {
7430 {
7431 /* Convert addis to lis. */
7435 }
7436 }
7442 }
7444 }
7453 {
7454 /* Convert lis;addi or lis;load/store accessing a protected
7455 variable defined in a shared library to PIC. */
7460 {
7465 {
7467 bfd_vma off;
7468 bfd_vma got_addr;
7492 /* Convert lis to lwz, loading address from GOT. */
7502 /* Use one of the spare relocs, so --emit-relocs
7503 output is reasonable. */
7510 /* Continue on as if we had a got reloc, to output
7511 dynamic reloc. */
7513 }
7514 else
7515 _bfd_error_handler
7516 /* xgettext:c-format */
7521 }
7525 {
7546 {
7547 /* Arrange to apply the reloc addend, if any. */
7551 }
7552 else
7553 _bfd_error_handler
7554 /* xgettext:c-format */
7559 }
7560 }
7564 {
7568 {
7571 }
7574 {
7580 }
7589 {
7598 }
7600 {
7607 {
7608 /* Uh oh, we are going to create a pic glink stub
7609 for an ifunc (here for h == NULL and later in
7610 finish_dynamic_symbol for h != NULL), and
7611 apparently are using code compiled with
7612 -mbss-plt. The difficulty is that -mbss-plt code
7613 gives no indication via a magic PLTREL24 addend
7614 whether r30 is equal to _GLOBAL_OFFSET_TABLE_ or
7615 is pointing into a .got2 section (and how far
7616 into .got2). */
7618 /* xgettext:c-format */
7621 }
7631 else
7635 }
7636 }
7646 {
7648 de_fault:
7650 /* xgettext:c-format */
7653 else
7654 /* xgettext:c-format */
7671 /* GOT16 relocations. Like an ADDR16 using the symbol's
7672 address in the GOT as relocation value instead of the
7673 symbol's value itself. Also, create a GOT entry for the
7674 symbol and put the symbol value there. */
7708 dogot:
7709 {
7710 /* Relocation is to the entry for this symbol in the global
7711 offset table. */
7712 bfd_vma off;
7724 {
7729 /* This is actually a static link, or it is a
7730 -Bsymbolic link and the symbol is defined
7731 locally, or the symbol was forced to be local
7732 because of a version file. */
7733 ;
7734 else
7735 {
7738 }
7740 }
7741 else
7742 {
7746 }
7748 /* The offset must always be a multiple of 4. We use the
7749 least significant bit to record whether we have already
7750 processed this entry. */
7754 else
7755 {
7767 /* We might have multiple got entries for this sym.
7768 Initialize them all. */
7769 do
7770 {
7774 {
7777 }
7779 {
7782 }
7784 {
7787 }
7789 {
7792 }
7794 /* Generate relocs for the dynamic linker. */
7805 {
7810 {
7816 }
7822 {
7825 {
7832 outrel.r_info
7834 }
7835 }
7844 else
7847 {
7850 {
7853 else
7855 }
7856 }
7861 }
7863 /* Init the .got section contents if we're not
7864 emitting a reloc. */
7865 else
7866 {
7870 {
7873 else
7874 {
7877 else
7881 }
7884 {
7888 }
7889 }
7892 }
7897 }
7902 }
7908 {
7910 {
7915 {
7919 {
7922 }
7923 }
7924 }
7925 }
7927 /* If here for a picfixup, we're done. */
7933 + off
7936 /* Addends on got relocations don't make much sense.
7937 x+off@got is actually x@got+off, and since the got is
7938 generated by a hash table traversal, the value in the
7939 got at entry m+n bears little relation to the entry m. */
7942 /* xgettext:c-format */
7946 sym_name);
7947 }
7950 /* Relocations that need no special processing. */
7952 /* It makes no sense to point a local relocation
7953 at a symbol not in this object. */
7955 {
7958 input_bfd,
7959 input_section,
7963 }
7965 {
7966 /* @local on an ifunc does not really make sense since
7967 the ifunc resolver can take you anywhere. More
7968 seriously, calls to ifuncs must go through a plt call
7969 stub, and for pic the plt call stubs uses r30 to
7970 access the PLT. The problem is that a call that is
7971 local won't have the +32k reloc addend trick marking
7972 -fPIC code, so the linker won't know whether r30 is
7973 _GLOBAL_OFFSET_TABLE_ or pointing into a .got2 section. */
7974 /* xgettext:c-format */
7978 }
7989 /* Relocations that may need to be propagated if this is a shared
7990 object. */
7999 {
8000 /* Make this relocation against an undefined weak symbol
8001 resolve to zero. This is really just a tweak, since
8002 code using weak externs ought to check that they are
8003 defined before using them. */
8010 }
8013 /* The TPREL16 relocs shouldn't really be used in shared
8014 libs or with non-local symbols as that will result in
8015 DT_TEXTREL being set, but support them anyway. */
8043 /* fall through */
8061 /* If these relocations are not to a named symbol, they can be
8062 handled right here, no need to bother the dynamic linker. */
8066 /* fall through */
8074 /* fall through */
8076 dodyn:
8088 {
8094 #ifdef DEBUG
8099 #endif
8101 /* When generating a shared object, these relocations
8102 are copied into the output file to be resolved at run
8103 time. */
8106 input_section,
8114 /* Optimize unaligned reloc use. */
8125 {
8131 }
8132 else
8133 {
8137 {
8139 {
8140 /* If we get here when building a static
8141 executable, then the libc startup function
8142 responsible for applying indirect function
8143 relocations is going to complain about
8144 the reloc type.
8145 If we get here when building a dynamic
8146 executable, it will be because we have
8147 a text relocation. The dynamic loader
8148 will set the text segment writable and
8149 non-executable to apply text relocations.
8150 So we'll segfault when trying to run the
8151 indirection function to resolve the reloc. */
8153 /* xgettext:c-format */
8158 sym_name);
8160 }
8162 ;
8164 {
8167 }
8168 else
8169 {
8172 /* We are turning this relocation into one
8173 against a section symbol. It would be
8174 proper to subtract the symbol's value,
8175 osec->vma, from the emitted reloc addend,
8176 but ld.so expects buggy relocs.
8177 FIXME: Why not always use a zero index? */
8180 {
8183 }
8184 else
8185 {
8188 {
8191 }
8193 }
8195 /* ld.so doesn't expect buggy TLS relocs.
8196 Don't leave the symbol value in the
8197 addend for them. */
8200 }
8203 }
8206 else
8208 }
8212 {
8218 }
8229 /* This reloc will be computed at runtime. Clear the memory
8230 so that it contains a predictable value for prelink. */
8232 {
8236 }
8237 }
8243 {
8248 {
8252 }
8258 else
8262 }
8263 /* Fall through. */
8271 {
8278 {
8288 }
8289 else
8290 {
8293 }
8299 /* First insn is HA, second is LO. */
8312 {
8317 }
8319 /* Rewrite the reloc and convert one of the trailing nop
8320 relocs to describe this relocation. */
8322 /* The relocs are at the bottom 2 bytes */
8330 }
8331 else
8335 /* Indirect .sdata relocation. */
8339 {
8342 }
8343 relocation
8349 /* Indirect .sdata2 relocation. */
8353 {
8356 }
8357 relocation
8363 /* Handle the TOC16 reloc. We want to use the offset within the .got
8364 section, not the actual VMA. This is appropriate when generating
8365 an embedded ELF object, for which the .got section acts like the
8366 AIX .toc section. */
8369 {
8372 }
8381 {
8388 {
8389 /* We didn't make a PLT entry for this symbol. This
8390 happens when statically linking PIC code, or when
8391 using -Bsymbolic. */
8392 }
8393 else
8394 {
8395 /* Relocation is to the entry for this symbol in the
8396 procedure linkage table. */
8402 else
8406 }
8407 }
8409 /* R_PPC_PLTREL24 is rather special. If non-zero, the
8410 addend specifies the GOT pointer offset within .got2.
8411 Don't apply it to the relocation field. */
8426 {
8431 }
8434 {
8440 {
8446 {
8449 else
8451 }
8456 {
8463 else
8466 }
8467 }
8468 }
8472 /* Relocate against _SDA_BASE_. */
8474 {
8481 {
8484 }
8490 {
8491 _bfd_error_handler
8492 /* xgettext:c-format */
8495 input_bfd,
8496 sym_name,
8498 name);
8499 }
8500 }
8503 /* Relocate against _SDA2_BASE_. */
8505 {
8512 {
8515 }
8521 {
8522 _bfd_error_handler
8523 /* xgettext:c-format */
8526 input_bfd,
8527 sym_name,
8529 name);
8530 }
8531 }
8538 split16a_type,
8546 split16d_type,
8554 split16a_type,
8562 split16d_type,
8570 split16a_type,
8578 split16d_type,
8582 /* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
8588 {
8591 }
8592 else
8593 {
8600 {
8603 }
8608 {
8611 }
8614 {
8617 }
8620 {
8622 }
8623 else
8624 {
8625 _bfd_error_handler
8626 /* xgettext:c-format */
8629 input_bfd,
8630 sym_name,
8632 name);
8637 }
8640 {
8642 {
8645 }
8647 }
8652 /* The PowerPC Embedded Application Binary Interface
8653 version 1.0 insanely chose to specify R_PPC_EMB_SDA21
8654 operating on a 24-bit field at r_offset. GNU as and
8655 GNU ld have always assumed R_PPC_EMB_SDA21 operates on
8656 a 32-bit bit insn at r_offset. Cope with object file
8657 producers that possibly comply with the EABI in
8658 generating an odd r_offset for big-endian objects. */
8666 {
8670 /* Force e_li insn, keeping RT from original insn. */
8674 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
8675 /* Top 4 bits of value to 17..20. */
8677 /* Next 5 bits of the value to 11..15. */
8679 /* And the final 11 bits of the value to bits 21 to 31. */
8689 }
8690 /* Fill in register field. */
8693 }
8704 else
8705 {
8706 bfd_vma value;
8711 {
8714 }
8723 else
8724 {
8725 _bfd_error_handler
8726 /* xgettext:c-format */
8729 input_bfd,
8730 sym_name,
8732 name);
8737 }
8740 {
8743 }
8750 split16a_type,
8756 split16d_type,
8759 {
8764 split16a_type,
8766 }
8768 {
8773 split16d_type,
8775 }
8777 {
8782 split16a_type,
8784 }
8786 {
8791 split16d_type,
8793 }
8794 else
8796 }
8802 else
8803 {
8805 relocation);
8807 }
8810 /* Relocate against the beginning of the section. */
8816 {
8819 }
8823 /* Negative relocations. */
8845 /* xgettext:c-format */
8852 }
8855 {
8864 {
8867 }
8874 {
8880 }
8882 }
8885 {
8891 {
8893 {
8901 }
8902 }
8914 {
8916 {
8922 }
8923 }
8930 }
8932 /* Do any further special processing. */
8934 {
8946 /* It's just possible that this symbol is a weak symbol
8947 that's not actually defined anywhere. In that case,
8948 'sec' would be NULL, and we should leave the symbol
8949 alone (it will be set to zero elsewhere in the link). */
8952 /* Fall through. */
8960 /* Add 0x10000 if sign bit in 0:15 is set.
8961 Bits 0:15 are not used. */
8985 {
8986 /* The 32-bit ABI lacks proper relocations to deal with
8987 certain 64-bit instructions. Prevent damage to bits
8988 that make up part of the insn opcode. */
8998 else
9004 {
9007 /* xgettext:c-format */
9013 }
9014 }
9016 }
9018 #ifdef DEBUG
9023 sym_name,
9024 r_symndx,
9027 #endif
9034 {
9036 /* xgettext:c-format */
9040 sym_name);
9042 }
9044 /* 16-bit fields in insns mostly have signed values, but a
9045 few insns have 16-bit unsigned values. Really, we should
9046 have different reloc types. */
9051 {
9055 {
9065 }
9067 {
9071 }
9072 }
9075 {
9076 /* Split field reloc isn't handled by _bfd_final_link_relocate. */
9079 else
9080 {
9093 }
9094 }
9095 else
9099 report_reloc:
9101 {
9103 {
9104 /* On code like "if (foo) foo();" don't report overflow
9105 on a branch to zero when foo is undefined. */
9114 }
9115 else
9116 {
9118 /* xgettext:c-format */
9123 }
9124 }
9125 copy_reloc:
9128 }
9131 {
9138 {
9139 /* It is too late to remove an empty reloc section. Leave
9140 one NONE reloc.
9141 ??? What is wrong with an empty section??? */
9144 wrel++;
9145 }
9150 }
9152 #ifdef DEBUG
9154 #endif
9160 {
9161 /* Branch around the trampolines. */
9164 }
9171 {
9176 {
9185 {
9188 }
9189 }
9191 /* The idea is: Replace the last instruction on a page with a
9192 branch to a patch area. Put the insn there followed by a
9193 branch back to the next page. Complicated a little by
9194 needing to handle moved conditional branches, and by not
9195 wanting to touch data-in-text. */
9204 {
9211 /* Do we have a data reloc at this offset? If so, leave
9212 the word alone. */
9218 {
9224 else
9225 {
9227 {
9236 }
9238 }
9239 }
9243 /* Some instructions can be left alone too. Unconditional
9244 branches, except for bcctr with BO=0x14 (bctr, bctrl),
9245 avoid the icache failure.
9247 The problem occurs due to prefetch across a page boundary
9248 where stale instructions can be fetched from the next
9249 page, and the mechanism for flushing these bad
9250 instructions fails under certain circumstances. The
9251 unconditional branches:
9252 1) Branch: b, bl, ba, bla,
9253 2) Branch Conditional: bc, bca, bcl, bcla,
9254 3) Branch Conditional to Link Register: bclr, bclrl,
9255 where (2) and (3) have BO=0x14 making them unconditional,
9256 prevent the bad prefetch because the prefetch itself is
9257 affected by these instructions. This happens even if the
9258 instruction is not executed.
9260 A bctr example:
9261 .
9262 . lis 9,new_page@ha
9263 . addi 9,9,new_page@l
9264 . mtctr 9
9265 . bctr
9266 . nop
9267 . nop
9268 . new_page:
9269 .
9270 The bctr is not predicted taken due to ctr not being
9271 ready, so prefetch continues on past the bctr into the
9272 new page which might have stale instructions. If they
9273 fail to be flushed, then they will be executed after the
9274 bctr executes. Either of the following modifications
9275 prevent the bad prefetch from happening in the first
9276 place:
9277 .
9278 . lis 9,new_page@ha lis 9,new_page@ha
9279 . addi 9,9,new_page@l addi 9,9,new_page@l
9280 . mtctr 9 mtctr 9
9281 . bctr bctr
9282 . nop b somewhere_else
9283 . b somewhere_else nop
9284 . new_page: new_page:
9285 . */
9304 {
9307 /* If the insn we are patching had a reloc, adjust the
9308 reloc r_offset so that the reloc applies to the moved
9309 location. This matters for -r and --emit-relocs. */
9311 {
9314 /* Keep the relocs sorted by r_offset. */
9317 }
9320 /* Adjust REL16 addends too. */
9322 {
9331 }
9333 /* If we are building a PIE or shared library with
9334 non-PIC objects, perhaps we had a dynamic reloc too?
9335 If so, the dynamic reloc must move with the insn. */
9338 {
9340 bfd_vma soffset;
9347 {
9355 else
9356 {
9358 {
9362 }
9367 }
9368 }
9369 }
9370 }
9371 else
9376 {
9383 {
9391 else
9399 }
9401 {
9410 }
9411 else
9412 {
9414 {
9419 }
9432 }
9433 }
9434 else
9435 {
9442 }
9445 }
9446 }
9449 }
9450 \f
9451 /* Write out the PLT relocs and entries for H. */
9453 static bool
9455 {
9464 {
9468 {
9469 Elf_Internal_Rela rela;
9471 bfd_vma reloc_index;
9477 else
9478 {
9484 }
9486 /* This symbol has an entry in the procedure linkage table.
9487 Set it up. */
9489 {
9490 bfd_vma got_offset;
9493 /* The first three entries in .got.plt are reserved. */
9496 /* Use the right PLT. */
9500 /* Fill in the .plt on VxWorks. */
9502 {
9509 }
9510 else
9511 {
9520 }
9527 /* This instruction is an immediate load. The value loaded is
9528 the byte offset of the R_PPC_JMP_SLOT relocation from the
9529 start of the .rela.plt section. The value is stored in the
9530 low-order 16 bits of the load instruction. */
9531 /* NOTE: It appears that this is now an index rather than a
9532 prescaled offset. */
9536 /* This instruction is a PC-relative branch whose target is
9537 the start of the PLT section. The address of this branch
9538 instruction is 20 bytes beyond the start of this PLT entry.
9539 The address is encoded in bits 6-29, inclusive. The value
9540 stored is right-shifted by two bits, permitting a 26-bit
9541 offset. */
9551 /* Fill in the GOT entry corresponding to this PLT slot with
9552 the address immediately after the "bctr" instruction
9553 in this PLT entry. */
9560 {
9561 /* Fill in a couple of entries in .rela.plt.unloaded. */
9567 /* Provide the @ha relocation for the first instruction. */
9572 R_PPC_ADDR16_HA);
9577 /* Provide the @l relocation for the second instruction. */
9582 R_PPC_ADDR16_LO);
9587 /* Provide a relocation for the GOT entry corresponding to this
9588 PLT slot. Point it at the middle of the .plt entry. */
9593 R_PPC_ADDR32);
9596 }
9598 /* VxWorks uses non-standard semantics for R_PPC_JMP_SLOT.
9599 In particular, the offset for the relocation is not the
9600 address of the PLT entry for this function, as specified
9601 by the ABI. Instead, the offset is set to the address of
9602 the GOT slot for this function. See EABI 4.4.4.1. */
9607 }
9608 else
9609 {
9612 {
9614 {
9617 }
9618 else
9619 {
9622 }
9627 }
9630 {
9633 }
9634 else
9635 {
9641 {
9642 /* We don't need to fill in the .plt. The ppc dynamic
9643 linker will fill it in. */
9644 }
9645 else
9646 {
9652 }
9653 }
9654 }
9657 {
9658 /* Fill in the entry in the .rela.plt section. */
9660 {
9663 else
9668 }
9669 else
9670 {
9676 }
9678 }
9680 }
9683 {
9688 {
9691 else
9693 }
9699 /* We only need one non-PIC glink stub. */
9701 }
9702 else
9704 }
9706 }
9708 /* Finish up PLT handling. */
9710 bool
9712 {
9722 {
9726 bfd_size_type locsymcount;
9744 {
9746 {
9751 bfd_vma val;
9752 Elf_Internal_Rela rela;
9757 {
9761 }
9768 {
9773 }
9774 else
9775 {
9778 {
9781 }
9782 else
9783 {
9787 }
9788 }
9800 }
9801 }
9805 {
9808 else
9810 }
9811 }
9813 }
9815 /* Finish up dynamic symbol handling. We set the contents of various
9816 dynamic sections here. */
9818 static bool
9823 {
9827 #ifdef DEBUG
9830 #endif
9836 {
9838 {
9839 /* Mark the symbol as undefined, rather than as
9840 defined in the .plt section. Leave the value if
9841 there were any relocations where pointer equality
9842 matters (this is a clue for the dynamic linker, to
9843 make function pointer comparisons work between an
9844 application and shared library), otherwise set it
9845 to zero. */
9850 {
9851 /* This breaks function pointer comparisons, but
9852 that is better than breaking tests for a NULL
9853 function pointer. */
9855 }
9856 }
9857 else
9858 {
9859 /* Set the value of ifunc symbols in a non-pie
9860 executable to the glink entry. This is to avoid
9861 text relocations. We can't do this for ifunc in
9862 allocate_dynrelocs, as we do for normal dynamic
9863 function symbols with plt entries, because we need
9864 to keep the original value around for the ifunc
9865 relocation. */
9866 sym->st_shndx
9867 = (_bfd_elf_section_from_bfd_section
9872 }
9874 }
9877 {
9879 Elf_Internal_Rela rela;
9882 /* This symbols needs a copy reloc. Set it up. */
9884 #ifdef DEBUG
9886 #endif
9894 else
9903 }
9905 #ifdef DEBUG
9907 #endif
9910 }
9911 \f
9912 static enum elf_reloc_type_class
9916 {
9923 {
9932 }
9933 }
9934 \f
9935 /* Finish up the dynamic sections. */
9937 static bool
9940 {
9943 bfd_vma got;
9947 #ifdef DEBUG
9949 #endif
9960 {
9968 {
9969 Elf_Internal_Dyn dyn;
9975 {
9979 else
10013 }
10016 }
10017 }
10021 {
10024 {
10029 {
10030 /* Add a blrl instruction at _GLOBAL_OFFSET_TABLE_-4
10031 so that a function can easily find the address of
10032 _GLOBAL_OFFSET_TABLE_. */
10036 }
10039 {
10044 }
10045 }
10046 else
10047 {
10048 /* xgettext:c-format */
10055 }
10058 }
10060 /* Fill in the first entry in the VxWorks procedure linkage table. */
10065 {
10067 /* Use the right PLT. */
10069 ? ppc_elf_vxworks_pic_plt0_entry
10073 {
10080 }
10081 else
10082 {
10085 }
10094 {
10095 Elf_Internal_Rela rela;
10100 /* Output the @ha relocation for the first instruction. */
10109 /* Output the @l relocation for the second instruction. */
10118 /* Fix up the remaining relocations. They may have the wrong
10119 symbol index for _G_O_T_ or _P_L_T_ depending on the order
10120 in which symbols were output. */
10122 {
10123 Elf_Internal_Rela rel;
10139 }
10140 }
10141 }
10146 {
10149 bfd_vma res0;
10151 /*
10152 * PIC glink code is the following:
10153 *
10154 * # ith PLT code stub.
10155 * addis 11,30,(plt+(i-1)*4-got)@ha
10156 * lwz 11,(plt+(i-1)*4-got)@l(11)
10157 * mtctr 11
10158 * bctr
10159 *
10160 * # A table of branches, one for each plt entry.
10161 * # The idea is that the plt call stub loads ctr and r11 with these
10162 * # addresses, so (r11 - res_0) gives the plt index * 4.
10163 * res_0: b PLTresolve
10164 * res_1: b PLTresolve
10165 * .
10166 * # Some number of entries towards the end can be nops
10167 * res_n_m3: nop
10168 * res_n_m2: nop
10169 * res_n_m1:
10170 *
10171 * PLTresolve:
10172 * addis 11,11,(1f-res_0)@ha
10173 * mflr 0
10174 * bcl 20,31,1f
10175 * 1: addi 11,11,(1b-res_0)@l
10176 * mflr 12
10177 * mtlr 0
10178 * sub 11,11,12 # r11 = index * 4
10179 * addis 12,12,(got+4-1b)@ha
10180 * lwz 0,(got+4-1b)@l(12) # got[1] address of dl_runtime_resolve
10181 * lwz 12,(got+8-1b)@l(12) # got[2] contains the map address
10182 * mtctr 0
10183 * add 0,11,11
10184 * add 11,0,11 # r11 = index * 12 = reloc offset.
10185 * bctr
10186 *
10187 * Non-PIC glink code is a little simpler.
10188 *
10189 * # ith PLT code stub.
10190 * lis 11,(plt+(i-1)*4)@ha
10191 * lwz 11,(plt+(i-1)*4)@l(11)
10192 * mtctr 11
10193 * bctr
10194 *
10195 * The branch table is the same, then comes
10196 *
10197 * PLTresolve:
10198 * lis 12,(got+4)@ha
10199 * addis 11,11,(-res_0)@ha
10200 * lwz 0,(got+4)@l(12) # got[1] address of dl_runtime_resolve
10201 * addi 11,11,(-res_0)@l # r11 = index * 4
10202 * mtctr 0
10203 * add 0,11,11
10204 * lwz 12,(got+8)@l(12) # got[2] contains the map address
10205 * add 11,0,11 # r11 = index * 12 = reloc offset.
10206 * bctr
10207 */
10209 /* Build the branch table, one for each plt entry (less one),
10210 and perhaps some padding. */
10216 {
10219 }
10221 {
10224 }
10231 {
10232 /* Ensure that a call stub at the end of a page doesn't
10233 result in prefetch over the end of the page into the
10234 glink branch table. */
10236 bfd_vma page_addr;
10243 {
10244 /* We have a plt call stub that may need fixing. */
10251 {
10252 /* By alignment, we know that there must be at least
10253 one other call stub before this one. */
10257 else
10259 }
10260 }
10261 }
10263 /* Last comes the PLTresolve stub. */
10266 {
10267 bfd_vma bcl;
10290 {
10295 }
10296 else
10297 {
10302 }
10306 }
10307 else
10308 {
10315 else
10326 else
10328 }
10335 {
10339 }
10341 }
10345 {
10347 bfd_vma val;
10350 /* FDE length. */
10352 /* CIE pointer. */
10354 /* Offset to .glink. */
10367 }
10370 }
10371 \f
10372 #define TARGET_LITTLE_SYM powerpc_elf32_le_vec
10374 #define TARGET_BIG_SYM powerpc_elf32_vec
10376 #define ELF_ARCH bfd_arch_powerpc
10377 #define ELF_TARGET_ID PPC32_ELF_DATA
10378 #define ELF_MACHINE_CODE EM_PPC
10379 #define ELF_MAXPAGESIZE 0x10000
10380 #define ELF_COMMONPAGESIZE 0x1000
10381 #define elf_info_to_howto ppc_elf_info_to_howto
10383 #ifdef EM_CYGNUS_POWERPC
10384 #define ELF_MACHINE_ALT1 EM_CYGNUS_POWERPC
10385 #endif
10387 #ifdef EM_PPC_OLD
10388 #define ELF_MACHINE_ALT2 EM_PPC_OLD
10389 #endif
10391 #define elf_backend_plt_not_loaded 1
10392 #define elf_backend_want_dynrelro 1
10393 #define elf_backend_can_gc_sections 1
10394 #define elf_backend_can_refcount 1
10395 #define elf_backend_rela_normal 1
10396 #define elf_backend_caches_rawsize 1
10398 #define bfd_elf32_mkobject ppc_elf_mkobject
10399 #define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
10400 #define bfd_elf32_bfd_relax_section ppc_elf_relax_section
10401 #define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
10402 #define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
10403 #define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
10404 #define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
10405 #define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
10407 #define elf_backend_object_p ppc_elf_object_p
10408 #define elf_backend_gc_mark_hook ppc_elf_gc_mark_hook
10409 #define elf_backend_section_from_shdr ppc_elf_section_from_shdr
10410 #define elf_backend_relocate_section ppc_elf_relocate_section
10411 #define elf_backend_create_dynamic_sections ppc_elf_create_dynamic_sections
10412 #define elf_backend_check_relocs ppc_elf_check_relocs
10413 #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible
10414 #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol
10415 #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol
10416 #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook
10417 #define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections
10418 #define elf_backend_hash_symbol ppc_elf_hash_symbol
10419 #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol
10420 #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
10421 #define elf_backend_fake_sections ppc_elf_fake_sections
10422 #define elf_backend_additional_program_headers ppc_elf_additional_program_headers
10423 #define elf_backend_modify_segment_map ppc_elf_modify_segment_map
10424 #define elf_backend_grok_prstatus ppc_elf_grok_prstatus
10425 #define elf_backend_grok_psinfo ppc_elf_grok_psinfo
10426 #define elf_backend_write_core_note ppc_elf_write_core_note
10427 #define elf_backend_reloc_type_class ppc_elf_reloc_type_class
10428 #define elf_backend_begin_write_processing ppc_elf_begin_write_processing
10429 #define elf_backend_final_write_processing ppc_elf_final_write_processing
10430 #define elf_backend_write_section ppc_elf_write_section
10431 #define elf_backend_get_sec_type_attr ppc_elf_get_sec_type_attr
10432 #define elf_backend_plt_sym_val ppc_elf_plt_sym_val
10433 #define elf_backend_action_discarded ppc_elf_action_discarded
10434 #define elf_backend_init_index_section _bfd_elf_init_1_index_section
10435 #define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
10439 /* FreeBSD Target */
10441 #undef TARGET_LITTLE_SYM
10442 #undef TARGET_LITTLE_NAME
10444 #undef TARGET_BIG_SYM
10445 #define TARGET_BIG_SYM powerpc_elf32_fbsd_vec
10446 #undef TARGET_BIG_NAME
10449 #undef ELF_OSABI
10450 #define ELF_OSABI ELFOSABI_FREEBSD
10452 #undef elf32_bed
10453 #define elf32_bed elf32_powerpc_fbsd_bed
10457 /* VxWorks Target */
10459 #undef TARGET_LITTLE_SYM
10460 #undef TARGET_LITTLE_NAME
10462 #undef TARGET_BIG_SYM
10463 #define TARGET_BIG_SYM powerpc_elf32_vxworks_vec
10464 #undef TARGET_BIG_NAME
10467 #undef ELF_OSABI
10469 #undef ELF_TARGET_OS
10470 #define ELF_TARGET_OS is_vxworks
10472 /* VxWorks uses the elf default section flags for .plt. */
10475 {
10483 }
10485 /* Like ppc_elf_link_hash_table_create, but overrides
10486 appropriately for VxWorks. */
10489 {
10494 {
10501 }
10503 }
10505 /* Tweak magic VxWorks symbols as they are loaded. */
10506 static bool
10514 {
10516 valp))
10520 }
10522 static bool
10524 {
10527 }
10529 /* On VxWorks, we emit relocations against _PROCEDURE_LINKAGE_TABLE_, so
10530 define it. */
10531 #undef elf_backend_want_plt_sym
10532 #define elf_backend_want_plt_sym 1
10533 #undef elf_backend_want_got_plt
10534 #define elf_backend_want_got_plt 1
10535 #undef elf_backend_got_symbol_offset
10536 #define elf_backend_got_symbol_offset 0
10537 #undef elf_backend_plt_not_loaded
10538 #define elf_backend_plt_not_loaded 0
10539 #undef elf_backend_plt_readonly
10540 #define elf_backend_plt_readonly 1
10541 #undef elf_backend_got_header_size
10542 #define elf_backend_got_header_size 12
10543 #undef elf_backend_dtrel_excludes_plt
10544 #define elf_backend_dtrel_excludes_plt 1
10546 #undef bfd_elf32_get_synthetic_symtab
10548 #undef bfd_elf32_bfd_link_hash_table_create
10549 #define bfd_elf32_bfd_link_hash_table_create \
10550 ppc_elf_vxworks_link_hash_table_create
10551 #undef elf_backend_add_symbol_hook
10552 #define elf_backend_add_symbol_hook \
10553 ppc_elf_vxworks_add_symbol_hook
10554 #undef elf_backend_link_output_symbol_hook
10555 #define elf_backend_link_output_symbol_hook \
10556 elf_vxworks_link_output_symbol_hook
10557 #undef elf_backend_final_write_processing
10558 #define elf_backend_final_write_processing \
10559 ppc_elf_vxworks_final_write_processing
10560 #undef elf_backend_get_sec_type_attr
10561 #define elf_backend_get_sec_type_attr \
10562 ppc_elf_vxworks_get_sec_type_attr
10563 #undef elf_backend_emit_relocs
10564 #define elf_backend_emit_relocs \
10565 elf_vxworks_emit_relocs
10567 #undef elf32_bed
10568 #define elf32_bed ppc_elf_vxworks_bed