1 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
3 * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
5 2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
7 * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
9 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
11 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
12 macros, use local variables for info struct member accesses,
13 update the type of the variable used to hold the instruction
15 (print_insn_mips, print_mips16_insn_arg): Likewise.
16 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
17 local variables for info struct member accesses.
18 (print_insn_micromips): Add GET_OP_S local macro.
19 (_print_insn_mips): Update the type of the variable used to hold
22 2012-08-13 Ian Bolton <ian.bolton@arm.com>
23 Laurent Desnogues <laurent.desnogues@arm.com>
24 Jim MacArthur <jim.macarthur@arm.com>
25 Marcus Shawcroft <marcus.shawcroft@arm.com>
26 Nigel Stephens <nigel.stephens@arm.com>
27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
28 Richard Earnshaw <rearnsha@arm.com>
29 Sofiane Naci <sofiane.naci@arm.com>
30 Tejas Belagod <tejas.belagod@arm.com>
31 Yufeng Zhang <yufeng.zhang@arm.com>
33 * Makefile.am: Add AArch64.
34 * Makefile.in: Regenerate.
35 * aarch64-asm.c: New file.
36 * aarch64-asm.h: New file.
37 * aarch64-dis.c: New file.
38 * aarch64-dis.h: New file.
39 * aarch64-gen.c: New file.
40 * aarch64-opc.c: New file.
41 * aarch64-opc.h: New file.
42 * aarch64-tbl.h: New file.
43 * configure.in: Add AArch64.
44 * configure: Regenerate.
45 * disassemble.c: Add AArch64.
46 * aarch64-asm-2.c: New file (automatically generated).
47 * aarch64-dis-2.c: New file (automatically generated).
48 * aarch64-opc-2.c: New file (automatically generated).
49 * po/POTFILES.in: Regenerate.
51 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
53 * micromips-opc.c (micromips_opcodes): Update comment.
54 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
55 instructions for IOCT as appropriate.
56 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
58 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
59 the result of a check for the -Wno-missing-field-initializers
61 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
62 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
64 (mips16-opc.lo): Likewise.
65 (micromips-opc.lo): Likewise.
66 * aclocal.m4: Regenerate.
67 * configure: Regenerate.
68 * Makefile.in: Regenerate.
70 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
73 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
74 * i386-init.h: Regenerated.
76 2012-08-09 Nick Clifton <nickc@redhat.com>
78 * po/vi.po: Updated Vietnamese translation.
80 2012-08-07 Roland McGrath <mcgrathr@google.com>
82 * i386-dis.c (reg_table): Fill out REG_0F0D table with
83 AMD-reserved cases as "prefetch".
84 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
85 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
86 (reg_table): Use those under REG_0F18.
87 (mod_table): Add those cases as "nop/reserved".
89 2012-08-07 Jan Beulich <jbeulich@suse.com>
91 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
93 2012-08-06 Roland McGrath <mcgrathr@google.com>
95 * i386-dis.c (print_insn): Print spaces between multiple excess
96 prefixes. Return actual number of excess prefixes consumed,
99 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
101 2012-08-06 Roland McGrath <mcgrathr@google.com>
102 Victor Khimenko <khim@google.com>
103 H.J. Lu <hongjiu.lu@intel.com>
105 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
106 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
107 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
108 (OP_E_register): Likewise.
109 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
111 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
113 * configure.in: Formatting.
114 * configure: Regenerate.
116 2012-08-01 Alan Modra <amodra@gmail.com>
118 * h8300-dis.c: Fix printf arg warnings.
119 * i960-dis.c: Likewise.
120 * mips-dis.c: Likewise.
121 * pdp11-dis.c: Likewise.
122 * sh-dis.c: Likewise.
123 * v850-dis.c: Likewise.
124 * configure.in: Formatting.
125 * configure: Regenerate.
126 * rl78-decode.c: Regenerate.
127 * po/POTFILES.in: Regenerate.
129 2012-07-31 Chao-Ying Fu <fu@mips.com>
130 Catherine Moore <clm@codesourcery.com>
131 Maciej W. Rozycki <macro@codesourcery.com>
133 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
134 (DSP_VOLA): Likewise.
135 (D32, D33): Likewise.
136 (micromips_opcodes): Add DSP ASE instructions.
137 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
138 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
140 2012-07-31 Jan Beulich <jbeulich@suse.com>
142 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
143 instruction group. Mark as requiring AVX2.
144 * i386-tbl.h: Re-generate.
146 2012-07-30 Nick Clifton <nickc@redhat.com>
148 * po/opcodes.pot: Updated template.
149 * po/es.po: Updated Spanish translation.
150 * po/fi.po: Updated Finnish translation.
152 2012-07-27 Mike Frysinger <vapier@gentoo.org>
154 * configure.in (BFD_VERSION): Run bfd/configure --version and
155 parse the output of that.
156 * configure: Regenerate.
158 2012-07-25 James Lemke <jwlemke@codesourcery.com>
160 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
162 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
163 Dr David Alan Gilbert <dave@treblig.org>
166 * arm-dis.c: Add necessary casts for printing integer values.
167 Use %s when printing string values.
168 * hppa-dis.c: Likewise.
169 * m68k-dis.c: Likewise.
170 * microblaze-dis.c: Likewise.
171 * mips-dis.c: Likewise.
172 * sparc-dis.c: Likewise.
174 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
177 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
178 (VEX_LEN_0FXOP_08_CD): Likewise.
179 (VEX_LEN_0FXOP_08_CE): Likewise.
180 (VEX_LEN_0FXOP_08_CF): Likewise.
181 (VEX_LEN_0FXOP_08_EC): Likewise.
182 (VEX_LEN_0FXOP_08_ED): Likewise.
183 (VEX_LEN_0FXOP_08_EE): Likewise.
184 (VEX_LEN_0FXOP_08_EF): Likewise.
185 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
186 vpcomub, vpcomuw, vpcomud, vpcomuq.
187 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
188 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
189 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
192 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
194 * i386-dis.c (PREFIX_0F38F6): New.
195 (prefix_table): Add adcx, adox instructions.
196 (three_byte_table): Use PREFIX_0F38F6.
197 (mod_table): Add rdseed instruction.
198 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
199 (cpu_flags): Likewise.
200 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
201 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
202 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
204 * i386-tbl.h: Regenerate.
205 * i386-init.h: Likewise.
207 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
209 * mips-dis.c: Remove gratuitous newline.
211 2012-07-05 Sean Keys <skeys@ipdatasys.com>
213 * xgate-dis.c: Removed an IF statement that will
214 always be false due to overlapping operand masks.
215 * xgate-opc.c: Corrected 'com' opcode entry and
218 2012-07-02 Roland McGrath <mcgrathr@google.com>
220 * i386-opc.tbl: Add RepPrefixOk to nop.
221 * i386-tbl.h: Regenerate.
223 2012-06-28 Nick Clifton <nickc@redhat.com>
225 * po/vi.po: Updated Vietnamese translation.
227 2012-06-22 Roland McGrath <mcgrathr@google.com>
229 * i386-opc.tbl: Add RepPrefixOk to ret.
230 * i386-tbl.h: Regenerate.
232 * i386-opc.h (RepPrefixOk): New enum constant.
233 (i386_opcode_modifier): New bitfield 'repprefixok'.
234 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
235 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
236 instructions that have IsString.
237 * i386-tbl.h: Regenerate.
239 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
241 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
242 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
243 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
244 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
245 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
246 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
247 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
248 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
249 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
251 2012-05-19 Alan Modra <amodra@gmail.com>
253 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
254 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
256 2012-05-18 Alan Modra <amodra@gmail.com>
258 * ia64-opc.c: Remove #include "ansidecl.h".
259 * z8kgen.c: Include sysdep.h first.
261 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
262 * bfin-dis.c: Likewise.
263 * i860-dis.c: Likewise.
264 * ia64-dis.c: Likewise.
265 * ia64-gen.c: Likewise.
266 * m68hc11-dis.c: Likewise.
267 * mmix-dis.c: Likewise.
268 * msp430-dis.c: Likewise.
269 * or32-dis.c: Likewise.
270 * rl78-dis.c: Likewise.
271 * rx-dis.c: Likewise.
272 * tic4x-dis.c: Likewise.
273 * tilegx-opc.c: Likewise.
274 * tilepro-opc.c: Likewise.
275 * rx-decode.c: Regenerate.
277 2012-05-17 James Lemke <jwlemke@codesourcery.com>
279 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
281 2012-05-17 James Lemke <jwlemke@codesourcery.com>
283 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
285 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
286 Nick Clifton <nickc@redhat.com>
289 * configure.in: Add check that sysdep.h has been included before
290 any system header files.
291 * configure: Regenerate.
292 * config.in: Regenerate.
293 * sysdep.h: Generate an error if included before config.h.
294 * alpha-opc.c: Include sysdep.h before any other header file.
295 * alpha-dis.c: Likewise.
296 * avr-dis.c: Likewise.
297 * cgen-opc.c: Likewise.
298 * cr16-dis.c: Likewise.
299 * cris-dis.c: Likewise.
300 * crx-dis.c: Likewise.
301 * d10v-dis.c: Likewise.
302 * d10v-opc.c: Likewise.
303 * d30v-dis.c: Likewise.
304 * d30v-opc.c: Likewise.
305 * h8500-dis.c: Likewise.
306 * i370-dis.c: Likewise.
307 * i370-opc.c: Likewise.
308 * m10200-dis.c: Likewise.
309 * m10300-dis.c: Likewise.
310 * micromips-opc.c: Likewise.
311 * mips-opc.c: Likewise.
312 * mips61-opc.c: Likewise.
313 * moxie-dis.c: Likewise.
314 * or32-opc.c: Likewise.
315 * pj-dis.c: Likewise.
316 * ppc-dis.c: Likewise.
317 * ppc-opc.c: Likewise.
318 * s390-dis.c: Likewise.
319 * sh-dis.c: Likewise.
320 * sh64-dis.c: Likewise.
321 * sparc-dis.c: Likewise.
322 * sparc-opc.c: Likewise.
323 * spu-dis.c: Likewise.
324 * tic30-dis.c: Likewise.
325 * tic54x-dis.c: Likewise.
326 * tic80-dis.c: Likewise.
327 * tic80-opc.c: Likewise.
328 * tilegx-dis.c: Likewise.
329 * tilepro-dis.c: Likewise.
330 * v850-dis.c: Likewise.
331 * v850-opc.c: Likewise.
332 * vax-dis.c: Likewise.
333 * w65-dis.c: Likewise.
334 * xgate-dis.c: Likewise.
335 * xtensa-dis.c: Likewise.
336 * rl78-decode.opc: Likewise.
337 * rl78-decode.c: Regenerate.
338 * rx-decode.opc: Likewise.
339 * rx-decode.c: Regenerate.
341 2012-05-17 Alan Modra <amodra@gmail.com>
343 * ppc_dis.c: Don't include elf/ppc.h.
345 2012-05-16 Meador Inge <meadori@codesourcery.com>
347 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
350 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
351 Stephane Carrez <stcarrez@nerim.fr>
353 * configure.in: Add S12X and XGATE co-processor support to m68hc11
355 * disassemble.c: Likewise.
356 * configure: Regenerate.
357 * m68hc11-dis.c: Make objdump output more consistent, use hex
358 instead of decimal and use 0x prefix for hex.
359 * m68hc11-opc.c: Add S12X and XGATE opcodes.
361 2012-05-14 James Lemke <jwlemke@codesourcery.com>
363 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
364 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
365 (vle_opcd_indices): New array.
366 (lookup_vle): New function.
367 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
368 (print_insn_powerpc): Likewise.
369 * ppc-opc.c: Likewise.
371 2012-05-14 Catherine Moore <clm@codesourcery.com>
372 Maciej W. Rozycki <macro@codesourcery.com>
373 Rhonda Wittels <rhonda@codesourcery.com>
374 Nathan Froyd <froydnj@codesourcery.com>
376 * ppc-opc.c (insert_arx, extract_arx): New functions.
377 (insert_ary, extract_ary): New functions.
378 (insert_li20, extract_li20): New functions.
379 (insert_rx, extract_rx): New functions.
380 (insert_ry, extract_ry): New functions.
381 (insert_sci8, extract_sci8): New functions.
382 (insert_sci8n, extract_sci8n): New functions.
383 (insert_sd4h, extract_sd4h): New functions.
384 (insert_sd4w, extract_sd4w): New functions.
385 (insert_vlesi, extract_vlesi): New functions.
386 (insert_vlensi, extract_vlensi): New functions.
387 (insert_vleui, extract_vleui): New functions.
388 (insert_vleil, extract_vleil): New functions.
389 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
390 (BI16, BI32, BO32, B8): New.
391 (B15, B24, CRD32, CRS): New.
392 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
393 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
394 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
395 (SH6_MASK): Use PPC_OPSHIFT_INV.
396 (SI8, UI5, OIMM5, UI7, BO16): New.
397 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
398 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
400 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
401 (OPVUP, OPVUP_MASK OPVUP): New
402 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
403 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
404 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
405 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
406 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
407 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
408 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
409 (SE_IM5, SE_IM5_MASK): New.
410 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
411 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
412 (BO32DNZ, BO32DZ): New.
413 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
415 (powerpc_opcodes): Add new VLE instructions. Update existing
416 instruction to include PPCVLE if supported.
417 * ppc-dis.c (ppc_opts): Add vle entry.
418 (get_powerpc_dialect): New function.
419 (powerpc_init_dialect): VLE support.
420 (print_insn_big_powerpc): Call get_powerpc_dialect.
421 (print_insn_little_powerpc): Likewise.
422 (operand_value_powerpc): Handle negative shift counts.
423 (print_insn_powerpc): Handle 2-byte instruction lengths.
425 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
428 * configure.in: Invoke ACX_HEADER_STRING.
429 * configure: Regenerate.
430 * config.in: Regenerate.
431 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
432 string.h and strings.h.
434 2012-05-11 Nick Clifton <nickc@redhat.com>
437 * arm-dis.c (print_insn): Fix detection of instruction mode in
438 files containing multiple executable sections.
440 2012-05-03 Sean Keys <skeys@ipdatasys.com>
442 * Makefile.in, configure: regenerate
443 * disassemble.c (disassembler): Recognize ARCH_XGATE.
444 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
446 * configure.in: Recognize xgate.
447 * xgate-dis.c, xgate-opc.c: New files for support of xgate
448 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
449 and opcode generation for xgate.
451 2012-04-30 DJ Delorie <dj@redhat.com>
453 * rx-decode.opc (MOV): Do not sign-extend immediates which are
454 already the maximum bit size.
455 * rx-decode.c: Regenerate.
457 2012-04-27 David S. Miller <davem@davemloft.net>
459 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
460 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
462 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
463 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
465 * sparc-opc.c (CBCOND): New define.
466 (CBCOND_XCC): Likewise.
467 (cbcond): New helper macro.
468 (sparc_opcodes): Add compare-and-branch instructions.
470 * sparc-dis.c (print_insn_sparc): Handle ')'.
471 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
473 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
474 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
476 2012-04-12 David S. Miller <davem@davemloft.net>
478 * sparc-dis.c (X_DISP10): Define.
479 (print_insn_sparc): Handle '='.
481 2012-04-01 Mike Frysinger <vapier@gentoo.org>
483 * bfin-dis.c (fmtconst): Replace decimal handling with a single
484 sprintf call and the '*' field width.
486 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
488 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
490 2012-03-16 Alan Modra <amodra@gmail.com>
492 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
493 (powerpc_opcd_indices): Bump array size.
494 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
495 corresponding to unused opcodes to following entry.
496 (lookup_powerpc): New function, extracted and optimised from..
497 (print_insn_powerpc): ..here.
499 2012-03-15 Alan Modra <amodra@gmail.com>
500 James Lemke <jwlemke@codesourcery.com>
502 * disassemble.c (disassemble_init_for_target): Handle ppc init.
503 * ppc-dis.c (private): New var.
504 (powerpc_init_dialect): Don't return calloc failure, instead use
506 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
507 (powerpc_opcd_indices): New array.
508 (disassemble_init_powerpc): New function.
509 (print_insn_big_powerpc): Don't init dialect here.
510 (print_insn_little_powerpc): Likewise.
511 (print_insn_powerpc): Start search using powerpc_opcd_indices.
513 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
515 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
516 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
517 (PPCVEC2, PPCTMR, E6500): New short names.
518 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
519 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
520 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
521 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
522 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
523 optional operands on sync instruction for E6500 target.
525 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
527 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
529 2012-02-27 Alan Modra <amodra@gmail.com>
531 * mt-dis.c: Regenerate.
533 2012-02-27 Alan Modra <amodra@gmail.com>
535 * v850-opc.c (extract_v8): Rearrange to make it obvious this
536 is the inverse of corresponding insert function.
537 (extract_d22, extract_u9, extract_r4): Likewise.
538 (extract_d9): Correct sign extension.
539 (extract_d16_15): Don't assume "long" is 32 bits, and don't
540 rely on implementation defined behaviour for shift right of
542 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
543 (extract_d23): Likewise, and correct mask.
545 2012-02-27 Alan Modra <amodra@gmail.com>
547 * crx-dis.c (print_arg): Mask constant to 32 bits.
548 * crx-opc.c (cst4_map): Use int array.
550 2012-02-27 Alan Modra <amodra@gmail.com>
552 * arc-dis.c (BITS): Don't use shifts to mask off bits.
553 (FIELDD): Sign extend with xor,sub.
555 2012-02-25 Walter Lee <walt@tilera.com>
557 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
558 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
559 TILEPRO_OPC_LW_TLS_SN.
561 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
563 * i386-opc.h (HLEPrefixNone): New.
564 (HLEPrefixLock): Likewise.
565 (HLEPrefixAny): Likewise.
566 (HLEPrefixRelease): Likewise.
568 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
570 * i386-dis.c (HLE_Fixup1): New.
571 (HLE_Fixup2): Likewise.
572 (HLE_Fixup3): Likewise.
579 (MOD_C6_REG_7): Likewise.
580 (MOD_C7_REG_7): Likewise.
581 (RM_C6_REG_7): Likewise.
582 (RM_C7_REG_7): Likewise.
583 (XACQUIRE_PREFIX): Likewise.
584 (XRELEASE_PREFIX): Likewise.
585 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
586 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
587 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
588 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
589 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
590 MOD_C6_REG_7 and MOD_C7_REG_7.
591 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
592 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
594 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
595 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
597 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
599 (cpu_flags): Add CpuHLE and CpuRTM.
600 (opcode_modifiers): Add HLEPrefixOk.
602 * i386-opc.h (CpuHLE): New.
604 (HLEPrefixOk): Likewise.
605 (i386_cpu_flags): Add cpuhle and cpurtm.
606 (i386_opcode_modifier): Add hleprefixok.
608 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
609 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
610 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
611 operand. Add xacquire, xrelease, xabort, xbegin, xend and
613 * i386-init.h: Regenerated.
614 * i386-tbl.h: Likewise.
616 2012-01-24 DJ Delorie <dj@redhat.com>
618 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
619 * rl78-decode.c: Regenerate.
621 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
624 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
626 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
628 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
629 register and move them after pmove with PSR/PCSR register.
631 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
633 * i386-dis.c (mod_table): Add vmfunc.
635 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
636 (cpu_flags): CpuVMFUNC.
638 * i386-opc.h (CpuVMFUNC): New.
639 (i386_cpu_flags): Add cpuvmfunc.
641 * i386-opc.tbl: Add vmfunc.
642 * i386-init.h: Regenerated.
643 * i386-tbl.h: Likewise.
645 For older changes see ChangeLog-2011
651 version-control: never