| blob | e73539afa2b1d17e92b52b2f3297d3b7f1a23ea2 |
1 /* PowerPC-specific support for 32-bit ELF
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 /* This file is based on a preliminary PowerPC ELF ABI. The
24 information may not match the final PowerPC ELF ABI. It includes
25 suggestions from the in-progress Embedded PowerPC ABI, and that
26 information may also not match. */
29 #include <stdarg.h>
41 {
43 split16d_type
44 }
45 split16_format_type;
47 /* RELA relocations are used here. */
49 static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
51 static bfd_reloc_status_type ppc_elf_unhandled_reloc
54 /* Branch prediction bit for branch taken relocs. */
55 #define BRANCH_PREDICT_BIT 0x200000
56 /* Mask to set RA in memory instructions. */
57 #define RA_REGISTER_MASK 0x001f0000
58 /* Value to shift register by to insert RA. */
59 #define RA_REGISTER_SHIFT 16
61 /* The name of the dynamic interpreter. This is put in the .interp
62 section. */
65 /* For old-style PLT. */
66 /* The number of single-slot PLT entries (the rest use two slots). */
67 #define PLT_NUM_SINGLE_ENTRIES 8192
69 /* For new-style .glink and .plt. */
70 #define GLINK_PLTRESOLVE 16*4
71 #define GLINK_ENTRY_SIZE(htab, h) \
72 ((4*4 \
73 + (h != NULL \
74 && h == htab->tls_get_addr \
75 && !htab->params->no_tls_get_addr_opt ? 8*4 : 0) \
76 + (1u << htab->params->plt_stub_align) - 1) \
77 & -(1u << htab->params->plt_stub_align))
79 /* VxWorks uses its own plt layout, filled in by the static linker. */
81 /* The standard VxWorks PLT entry. */
82 #define VXWORKS_PLT_ENTRY_SIZE 32
83 static const bfd_vma ppc_elf_vxworks_plt_entry
85 {
94 };
95 static const bfd_vma ppc_elf_vxworks_pic_plt_entry
97 {
106 };
108 /* The initial VxWorks PLT entry. */
109 #define VXWORKS_PLT_INITIAL_ENTRY_SIZE 32
110 static const bfd_vma ppc_elf_vxworks_plt0_entry
112 {
121 };
122 static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
124 {
133 };
135 /* For executables, we have some additional relocations in
136 .rela.plt.unloaded, for the kernel loader. */
138 /* The number of non-JMP_SLOT relocations per PLT0 slot. */
139 #define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
140 /* The number of relocations in the PLTResolve slot. */
141 #define VXWORKS_PLTRESOLVE_RELOCS 2
142 /* The number of relocations in the PLTResolve slot when creating
143 a shared library. */
144 #define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
146 /* Some instructions. */
147 #define ADDIS_11_11 0x3d6b0000
148 #define ADDIS_11_30 0x3d7e0000
149 #define ADDIS_12_12 0x3d8c0000
150 #define ADDI_11_11 0x396b0000
151 #define ADD_0_11_11 0x7c0b5a14
152 #define ADD_3_12_2 0x7c6c1214
153 #define ADD_11_0_11 0x7d605a14
154 #define B 0x48000000
155 #define BA 0x48000002
156 #define BCL_20_31 0x429f0005
157 #define BCTR 0x4e800420
158 #define BEQLR 0x4d820020
159 #define CMPWI_11_0 0x2c0b0000
160 #define LIS_11 0x3d600000
161 #define LIS_12 0x3d800000
162 #define LWZU_0_12 0x840c0000
163 #define LWZ_0_12 0x800c0000
164 #define LWZ_11_3 0x81630000
165 #define LWZ_11_11 0x816b0000
166 #define LWZ_11_30 0x817e0000
167 #define LWZ_12_3 0x81830000
168 #define LWZ_12_12 0x818c0000
169 #define MR_0_3 0x7c601b78
170 #define MR_3_0 0x7c030378
171 #define MFLR_0 0x7c0802a6
172 #define MFLR_12 0x7d8802a6
173 #define MTCTR_0 0x7c0903a6
174 #define MTCTR_11 0x7d6903a6
175 #define MTLR_0 0x7c0803a6
176 #define NOP 0x60000000
177 #define SUB_11_11_12 0x7d6c5850
179 /* Offset of tp and dtp pointers from start of TLS block. */
180 #define TP_OFFSET 0x7000
181 #define DTP_OFFSET 0x8000
183 /* The value of a defined global symbol. */
184 #define SYM_VAL(SYM) \
185 ((SYM)->root.u.def.section->output_section->vma \
186 + (SYM)->root.u.def.section->output_offset \
187 + (SYM)->root.u.def.value)
188 \f
189 /* Relocation HOWTO's. */
190 /* Like other ELF RELA targets that don't apply multiple
191 field-altering relocations to the same localation, src_mask is
192 always zero and pcrel_offset is the same as pc_relative.
193 PowerPC can always use a zero bitpos, even when the field is not at
194 the LSB. For example, a REL24 could use rightshift=2, bisize=24
195 and bitpos=2 which matches the ABI description, or as we do here,
196 rightshift=0, bitsize=26 and bitpos=0. */
197 #define HOW(type, size, bitsize, mask, rightshift, pc_relative, \
198 complain, special_func) \
199 HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \
200 complain_overflow_ ## complain, special_func, \
201 #type, FALSE, 0, mask, pc_relative)
206 /* This reloc does nothing. */
208 bfd_elf_generic_reloc),
210 /* A standard 32 bit relocation. */
212 bfd_elf_generic_reloc),
214 /* An absolute 26 bit branch; the lower two bits must be zero.
215 FIXME: we don't check that, we just clear them. */
217 bfd_elf_generic_reloc),
219 /* A standard 16 bit relocation. */
221 bfd_elf_generic_reloc),
223 /* A 16 bit relocation without overflow. */
225 bfd_elf_generic_reloc),
227 /* The high order 16 bits of an address. */
229 bfd_elf_generic_reloc),
231 /* The high order 16 bits of an address, plus 1 if the contents of
232 the low 16 bits, treated as a signed number, is negative. */
234 ppc_elf_addr16_ha_reloc),
236 /* An absolute 16 bit branch; the lower two bits must be zero.
237 FIXME: we don't check that, we just clear them. */
239 bfd_elf_generic_reloc),
241 /* An absolute 16 bit branch, for which bit 10 should be set to
242 indicate that the branch is expected to be taken. The lower two
243 bits must be zero. */
245 bfd_elf_generic_reloc),
247 /* An absolute 16 bit branch, for which bit 10 should be set to
248 indicate that the branch is not expected to be taken. The lower
249 two bits must be zero. */
251 bfd_elf_generic_reloc),
253 /* A relative 26 bit branch; the lower two bits must be zero. */
255 bfd_elf_generic_reloc),
257 /* A relative 16 bit branch; the lower two bits must be zero. */
259 bfd_elf_generic_reloc),
261 /* A relative 16 bit branch. Bit 10 should be set to indicate that
262 the branch is expected to be taken. The lower two bits must be
263 zero. */
265 bfd_elf_generic_reloc),
267 /* A relative 16 bit branch. Bit 10 should be set to indicate that
268 the branch is not expected to be taken. The lower two bits must
269 be zero. */
271 bfd_elf_generic_reloc),
273 /* Like R_PPC_ADDR16, but referring to the GOT table entry for the
274 symbol. */
276 ppc_elf_unhandled_reloc),
278 /* Like R_PPC_ADDR16_LO, but referring to the GOT table entry for
279 the symbol. */
281 ppc_elf_unhandled_reloc),
283 /* Like R_PPC_ADDR16_HI, but referring to the GOT table entry for
284 the symbol. */
286 ppc_elf_unhandled_reloc),
288 /* Like R_PPC_ADDR16_HA, but referring to the GOT table entry for
289 the symbol. */
291 ppc_elf_unhandled_reloc),
293 /* Like R_PPC_REL24, but referring to the procedure linkage table
294 entry for the symbol. */
296 ppc_elf_unhandled_reloc),
298 /* This is used only by the dynamic linker. The symbol should exist
299 both in the object being run and in some shared library. The
300 dynamic linker copies the data addressed by the symbol from the
301 shared library into the object, because the object being
302 run has to have the data at some particular address. */
304 ppc_elf_unhandled_reloc),
306 /* Like R_PPC_ADDR32, but used when setting global offset table
307 entries. */
309 ppc_elf_unhandled_reloc),
311 /* Marks a procedure linkage table entry for a symbol. */
313 ppc_elf_unhandled_reloc),
315 /* Used only by the dynamic linker. When the object is run, this
316 longword is set to the load address of the object, plus the
317 addend. */
319 bfd_elf_generic_reloc),
321 /* Like R_PPC_REL24, but uses the value of the symbol within the
322 object rather than the final value. Normally used for
323 _GLOBAL_OFFSET_TABLE_. */
325 bfd_elf_generic_reloc),
327 /* Like R_PPC_ADDR32, but may be unaligned. */
329 bfd_elf_generic_reloc),
331 /* Like R_PPC_ADDR16, but may be unaligned. */
333 bfd_elf_generic_reloc),
335 /* 32-bit PC relative */
337 bfd_elf_generic_reloc),
339 /* 32-bit relocation to the symbol's procedure linkage table.
340 FIXME: not supported. */
342 ppc_elf_unhandled_reloc),
344 /* 32-bit PC relative relocation to the symbol's procedure linkage table.
345 FIXME: not supported. */
347 ppc_elf_unhandled_reloc),
349 /* Like R_PPC_ADDR16_LO, but referring to the PLT table entry for
350 the symbol. */
352 ppc_elf_unhandled_reloc),
354 /* Like R_PPC_ADDR16_HI, but referring to the PLT table entry for
355 the symbol. */
357 ppc_elf_unhandled_reloc),
359 /* Like R_PPC_ADDR16_HA, but referring to the PLT table entry for
360 the symbol. */
362 ppc_elf_unhandled_reloc),
364 /* A sign-extended 16 bit value relative to _SDA_BASE_, for use with
365 small data items. */
367 ppc_elf_unhandled_reloc),
369 /* 16-bit section relative relocation. */
371 ppc_elf_unhandled_reloc),
373 /* 16-bit lower half section relative relocation. */
375 ppc_elf_unhandled_reloc),
377 /* 16-bit upper half section relative relocation. */
379 ppc_elf_unhandled_reloc),
381 /* 16-bit upper half adjusted section relative relocation. */
383 ppc_elf_unhandled_reloc),
385 /* Marker relocs for TLS. */
387 bfd_elf_generic_reloc),
390 bfd_elf_generic_reloc),
393 bfd_elf_generic_reloc),
395 /* Marker relocs on inline plt call instructions. */
397 bfd_elf_generic_reloc),
400 bfd_elf_generic_reloc),
402 /* Computes the load module index of the load module that contains the
403 definition of its TLS sym. */
405 ppc_elf_unhandled_reloc),
407 /* Computes a dtv-relative displacement, the difference between the value
408 of sym+add and the base address of the thread-local storage block that
409 contains the definition of sym, minus 0x8000. */
411 ppc_elf_unhandled_reloc),
413 /* A 16 bit dtprel reloc. */
415 ppc_elf_unhandled_reloc),
417 /* Like DTPREL16, but no overflow. */
419 ppc_elf_unhandled_reloc),
421 /* Like DTPREL16_LO, but next higher group of 16 bits. */
423 ppc_elf_unhandled_reloc),
425 /* Like DTPREL16_HI, but adjust for low 16 bits. */
427 ppc_elf_unhandled_reloc),
429 /* Computes a tp-relative displacement, the difference between the value of
430 sym+add and the value of the thread pointer (r13). */
432 ppc_elf_unhandled_reloc),
434 /* A 16 bit tprel reloc. */
436 ppc_elf_unhandled_reloc),
438 /* Like TPREL16, but no overflow. */
440 ppc_elf_unhandled_reloc),
442 /* Like TPREL16_LO, but next higher group of 16 bits. */
444 ppc_elf_unhandled_reloc),
446 /* Like TPREL16_HI, but adjust for low 16 bits. */
448 ppc_elf_unhandled_reloc),
450 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
451 with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset
452 to the first entry. */
454 ppc_elf_unhandled_reloc),
456 /* Like GOT_TLSGD16, but no overflow. */
458 ppc_elf_unhandled_reloc),
460 /* Like GOT_TLSGD16_LO, but next higher group of 16 bits. */
462 ppc_elf_unhandled_reloc),
464 /* Like GOT_TLSGD16_HI, but adjust for low 16 bits. */
466 ppc_elf_unhandled_reloc),
468 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
469 with values (sym+add)@dtpmod and zero, and computes the offset to the
470 first entry. */
472 ppc_elf_unhandled_reloc),
474 /* Like GOT_TLSLD16, but no overflow. */
476 ppc_elf_unhandled_reloc),
478 /* Like GOT_TLSLD16_LO, but next higher group of 16 bits. */
480 ppc_elf_unhandled_reloc),
482 /* Like GOT_TLSLD16_HI, but adjust for low 16 bits. */
484 ppc_elf_unhandled_reloc),
486 /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes
487 the offset to the entry. */
489 ppc_elf_unhandled_reloc),
491 /* Like GOT_DTPREL16, but no overflow. */
493 ppc_elf_unhandled_reloc),
495 /* Like GOT_DTPREL16_LO, but next higher group of 16 bits. */
497 ppc_elf_unhandled_reloc),
499 /* Like GOT_DTPREL16_HI, but adjust for low 16 bits. */
501 ppc_elf_unhandled_reloc),
503 /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the
504 offset to the entry. */
506 ppc_elf_unhandled_reloc),
508 /* Like GOT_TPREL16, but no overflow. */
510 ppc_elf_unhandled_reloc),
512 /* Like GOT_TPREL16_LO, but next higher group of 16 bits. */
514 ppc_elf_unhandled_reloc),
516 /* Like GOT_TPREL16_HI, but adjust for low 16 bits. */
518 ppc_elf_unhandled_reloc),
520 /* The remaining relocs are from the Embedded ELF ABI, and are not
521 in the SVR4 ELF ABI. */
523 /* 32 bit value resulting from the addend minus the symbol. */
525 ppc_elf_unhandled_reloc),
527 /* 16 bit value resulting from the addend minus the symbol. */
529 ppc_elf_unhandled_reloc),
531 /* 16 bit value resulting from the addend minus the symbol. */
533 ppc_elf_unhandled_reloc),
535 /* The high order 16 bits of the addend minus the symbol. */
537 ppc_elf_unhandled_reloc),
539 /* The high order 16 bits of the result of the addend minus the address,
540 plus 1 if the contents of the low 16 bits, treated as a signed number,
541 is negative. */
543 ppc_elf_unhandled_reloc),
545 /* 16 bit value resulting from allocating a 4 byte word to hold an
546 address in the .sdata section, and returning the offset from
547 _SDA_BASE_ for that relocation. */
549 ppc_elf_unhandled_reloc),
551 /* 16 bit value resulting from allocating a 4 byte word to hold an
552 address in the .sdata2 section, and returning the offset from
553 _SDA2_BASE_ for that relocation. */
555 ppc_elf_unhandled_reloc),
557 /* A sign-extended 16 bit value relative to _SDA2_BASE_, for use with
558 small data items. */
560 ppc_elf_unhandled_reloc),
562 /* Relocate against either _SDA_BASE_ or _SDA2_BASE_, filling in the 16 bit
563 signed offset from the appropriate base, and filling in the register
564 field with the appropriate register (0, 2, or 13). */
566 ppc_elf_unhandled_reloc),
568 /* Relocation not handled: R_PPC_EMB_MRKREF */
569 /* Relocation not handled: R_PPC_EMB_RELSEC16 */
570 /* Relocation not handled: R_PPC_EMB_RELST_LO */
571 /* Relocation not handled: R_PPC_EMB_RELST_HI */
572 /* Relocation not handled: R_PPC_EMB_RELST_HA */
573 /* Relocation not handled: R_PPC_EMB_BIT_FLD */
575 /* PC relative relocation against either _SDA_BASE_ or _SDA2_BASE_, filling
576 in the 16 bit signed offset from the appropriate base, and filling in the
577 register field with the appropriate register (0, 2, or 13). */
579 ppc_elf_unhandled_reloc),
581 /* A relative 8 bit branch. */
583 bfd_elf_generic_reloc),
585 /* A relative 15 bit branch. */
587 bfd_elf_generic_reloc),
589 /* A relative 24 bit branch. */
591 bfd_elf_generic_reloc),
593 /* The 16 LSBS in split16a format. */
595 ppc_elf_unhandled_reloc),
597 /* The 16 LSBS in split16d format. */
599 ppc_elf_unhandled_reloc),
601 /* Bits 16-31 split16a format. */
603 ppc_elf_unhandled_reloc),
605 /* Bits 16-31 split16d format. */
607 ppc_elf_unhandled_reloc),
609 /* Bits 16-31 (High Adjusted) in split16a format. */
611 ppc_elf_unhandled_reloc),
613 /* Bits 16-31 (High Adjusted) in split16d format. */
615 ppc_elf_unhandled_reloc),
617 /* This reloc is like R_PPC_EMB_SDA21 but only applies to e_add16i
618 instructions. If the register base is 0 then the linker changes
619 the e_add16i to an e_li instruction. */
621 ppc_elf_unhandled_reloc),
623 /* Like R_PPC_VLE_SDA21 but ignore overflow. */
625 ppc_elf_unhandled_reloc),
627 /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
629 ppc_elf_unhandled_reloc),
631 /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
633 ppc_elf_unhandled_reloc),
635 /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
637 ppc_elf_unhandled_reloc),
639 /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
641 ppc_elf_unhandled_reloc),
643 /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
645 ppc_elf_unhandled_reloc),
647 /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
649 ppc_elf_unhandled_reloc),
651 /* e_li split20 format. */
653 ppc_elf_unhandled_reloc),
656 ppc_elf_unhandled_reloc),
658 /* A 16 bit relative relocation. */
660 bfd_elf_generic_reloc),
662 /* A 16 bit relative relocation without overflow. */
664 bfd_elf_generic_reloc),
666 /* The high order 16 bits of a relative address. */
668 bfd_elf_generic_reloc),
670 /* The high order 16 bits of a relative address, plus 1 if the contents of
671 the low 16 bits, treated as a signed number, is negative. */
673 ppc_elf_addr16_ha_reloc),
675 /* Like R_PPC_REL16_HA but for split field in addpcis. */
677 ppc_elf_addr16_ha_reloc),
679 /* A split-field reloc for addpcis, non-relative (gas internal use only). */
681 ppc_elf_addr16_ha_reloc),
683 /* GNU extension to record C++ vtable hierarchy. */
685 NULL),
687 /* GNU extension to record C++ vtable member usage. */
689 NULL),
691 /* Phony reloc to handle AIX style TOC entries. */
693 ppc_elf_unhandled_reloc),
694 };
695 \f
696 /* Initialize the ppc_elf_howto_table, so that linear accesses can be done. */
698 static void
700 {
705 i++)
706 {
712 }
713 }
717 bfd_reloc_code_real_type code)
718 {
721 /* Initialize howto table if not already done. */
726 {
860 }
863 };
868 {
873 i++)
879 }
881 /* Set the howto pointer for a PowerPC ELF reloc. */
883 static bfd_boolean
887 {
890 /* Initialize howto table if not already done. */
896 {
897 /* xgettext:c-format */
902 }
906 /* Just because the above assert didn't trigger doesn't mean that
907 ELF32_R_TYPE (dst->r_info) is necessarily a valid relocation. */
909 {
910 /* xgettext:c-format */
916 }
919 }
921 /* Handle the R_PPC_ADDR16_HA and R_PPC_REL16_HA relocs. */
923 static bfd_reloc_status_type
931 {
934 bfd_size_type octets;
935 bfd_vma value;
938 {
941 }
965 }
967 static bfd_reloc_status_type
975 {
976 /* If this is a relocatable link (output_bfd test tells us), just
977 call the generic function. Any adjustment will be done at final
978 link time. */
984 {
989 }
991 }
992 \f
993 /* Sections created by the linker. */
996 {
997 /* Pointer to the bfd section. */
999 /* Section name. */
1001 /* Associated bss section name. */
1003 /* Associated symbol name. */
1005 /* Associated symbol. */
1009 /* Linked list of allocated pointer entries. This hangs off of the
1010 symbol lists, and provides allows us to return different pointers,
1011 based on different addend's. */
1014 {
1015 /* next allocated pointer for this symbol */
1017 /* offset of pointer from beginning of section */
1018 bfd_vma offset;
1019 /* addend used */
1020 bfd_vma addend;
1021 /* which linker section this is */
1025 struct ppc_elf_obj_tdata
1026 {
1029 /* A mapping from local symbols to offsets into the various linker
1030 sections added. This is index by the symbol index. */
1033 /* Flags used to auto-detect plt type. */
1036 };
1038 #define ppc_elf_tdata(bfd) \
1039 ((struct ppc_elf_obj_tdata *) (bfd)->tdata.any)
1041 #define elf_local_ptr_offsets(bfd) \
1042 (ppc_elf_tdata (bfd)->linker_section_pointers)
1044 #define is_ppc_elf(bfd) \
1045 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
1046 && elf_object_id (bfd) == PPC32_ELF_DATA)
1048 /* Override the generic function because we store some extras. */
1050 static bfd_boolean
1052 {
1054 PPC32_ELF_DATA);
1055 }
1057 /* When defaulting arch/mach, decode apuinfo to find a better match. */
1059 bfd_boolean
1061 {
1068 {
1075 }
1078 {
1081 {
1086 {
1089 {
1115 }
1116 }
1118 }
1119 }
1122 {
1127 {
1130 }
1131 }
1133 }
1135 /* Fix bad default arch selected for a 32 bit input bfd when the
1136 default is 64 bit. Also select arch based on apuinfo. */
1138 static bfd_boolean
1140 {
1145 {
1149 {
1150 /* Relies on arch after 64 bit default being 32 bit default. */
1153 }
1154 }
1156 }
1158 /* Function to set whether a module needs the -mrelocatable bit set. */
1160 static bfd_boolean
1162 {
1169 }
1171 /* Support for core dump NOTE sections. */
1173 static bfd_boolean
1175 {
1180 {
1185 /* pr_cursig */
1188 /* pr_pid */
1191 /* pr_reg */
1196 }
1198 /* Make a ".reg/999" section. */
1201 }
1203 static bfd_boolean
1205 {
1207 {
1218 }
1220 /* Note that for some reason, a spurious space is tacked
1221 onto the end of the args in some (at least one anyway)
1222 implementations, so strip it off if it exists. */
1224 {
1230 }
1233 }
1237 {
1239 {
1244 {
1251 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1252 DIAGNOSTIC_PUSH;
1253 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
1254 -Wstringop-truncation:
1255 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
1256 */
1257 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
1258 #endif
1260 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1261 DIAGNOSTIC_POP;
1262 #endif
1266 }
1269 {
1288 }
1289 }
1290 }
1292 static flagword
1294 {
1300 }
1302 /* Return address for Ith PLT stub in section PLT, for relocation REL
1303 or (bfd_vma) -1 if it should not be included. */
1305 static bfd_vma
1309 {
1311 }
1313 /* Handle a PowerPC specific section when reading an object file. This
1314 is called when bfd_section_from_shdr finds a section with an unknown
1315 type. */
1317 static bfd_boolean
1322 {
1324 flagword flags;
1339 }
1341 /* Set up any other section flags and such that may be necessary. */
1343 static bfd_boolean
1347 {
1352 }
1354 /* If we have .sbss2 or .PPC.EMB.sbss0 output sections, we
1355 need to bump up the number of section headers. */
1357 static int
1360 {
1373 }
1375 /* Modify the segment map for VLE executables. */
1377 bfd_boolean
1380 {
1383 /* At this point in the link, output sections have already been sorted by
1384 LMA and assigned to segments. All that is left to do is to ensure
1385 there is no mixing of VLE & non-VLE sections in a text segment.
1386 If we find that case, we split the segment.
1387 We maintain the original output section order. */
1390 {
1392 bfd_size_type amt;
1400 {
1404 {
1409 }
1410 }
1413 {
1419 {
1425 }
1427 }
1428 /* If we're splitting a segment which originally contained rw
1429 sections then those sections might now only be in one of the
1430 two parts. So always set p_flags if splitting, even if we
1431 are being called for objcopy with p_flags_valid set. */
1433 {
1436 }
1440 /* Sections 0..j-1 stay in this (current) segment,
1441 the remainder are put in a new segment.
1442 The scan resumes with the new segment. */
1458 }
1461 }
1463 /* Add extra PPC sections -- Note, for now, make .sbss2 and
1464 .PPC.EMB.sbss0 a normal section, and not a bss section so
1465 that the linker doesn't crater when trying to make more than
1466 2 sections. */
1469 {
1480 };
1482 /* This is what we want for new plt/got. */
1488 {
1491 /* See if this is one of the special sections. */
1498 {
1502 }
1505 }
1506 \f
1507 /* Very simple linked list structure for recording apuinfo values. */
1509 {
1512 }
1513 apuinfo_list;
1518 static void
1520 {
1523 }
1525 static void
1527 {
1531 {
1535 }
1544 }
1546 static unsigned
1548 {
1553 entry;
1558 }
1562 {
1568 ;
1571 }
1573 static void
1575 {
1579 {
1583 }
1586 }
1588 /* Scan the input BFDs and create a linked list of
1589 the APUinfo values that will need to be emitted. */
1591 static void
1593 {
1607 /* Read in the input sections contents. */
1609 {
1616 /* xgettext:c-format */
1624 {
1631 }
1635 {
1636 /* xgettext:c-format */
1639 }
1641 /* Verify the contents of the header. Note - we have to
1642 extract the values this way in order to allow for a
1643 host whose endian-ness is different from the target. */
1655 /* Get the number of bytes used for apuinfo entries. */
1660 /* Scan the apuinfo section, building a list of apuinfo numbers. */
1663 }
1668 {
1669 /* Compute the size of the output section. */
1672 /* Set the output section size, if it exists. */
1676 {
1678 /* xgettext:c-format */
1680 }
1681 }
1683 fail:
1689 }
1691 /* Prevent the output section from accumulating the input sections'
1692 contents. We have already stored this in our linked list structure. */
1694 static bfd_boolean
1699 {
1701 }
1703 /* Finally we can generate the output section. */
1705 static void
1707 {
1712 bfd_size_type length;
1727 {
1728 _bfd_error_handler
1731 }
1733 /* Create the apuinfo header. */
1742 {
1745 }
1756 }
1757 \f
1758 static bfd_boolean
1760 {
1770 }
1772 static bfd_boolean
1774 {
1779 }
1781 static long
1785 {
1790 bfd_vma stub_off;
1814 /* Call common code to handle old-style executable PLTs. */
1819 /* If this object was prelinked, the prelinker stored the address
1820 of .glink at got[1]. If it wasn't prelinked, got[1] will be zero. */
1823 {
1837 {
1838 Elf_Internal_Dyn dyn;
1845 {
1853 }
1854 }
1856 }
1858 /* Otherwise we read the first plt entry. */
1860 {
1863 }
1868 /* The .glink section usually does not survive the final
1869 link; search for the section (usually .text) where the
1870 glink stubs now reside. */
1875 /* Determine glink PLT resolver by reading the relative branch
1876 from the first glink stub. */
1879 {
1882 /* The first glink stub may either branch to the resolver ... */
1887 /* ... or fall through a bunch of NOPs. */
1894 {
1897 }
1898 }
1901 /* If the stubs are those for -shared/-pie then we might have
1902 multiple stubs for each plt entry. If that is the case then
1903 there is no way to associate stubs with their plt entries short
1904 of figuring out the GOT pointer value used in the stub.
1905 The offsets tested here need to cover all possible values of
1906 GLINK_ENTRY_SIZE for other than __tls_get_addr_opt. */
1921 {
1925 }
1940 {
1947 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
1948 we are defining a symbol, ensure one of them is set. */
1960 {
1965 }
1970 }
1972 /* Add a symbol at the start of the glink branch table. */
1981 s++;
1982 count++;
1985 {
1986 /* Add a symbol for the glink PLT resolver. */
1995 s++;
1996 count++;
1997 }
2000 }
2001 \f
2002 /* The following functions are specific to the ELF linker, while
2003 functions above are used generally. They appear in this file more
2004 or less in the order in which they are called. eg.
2005 ppc_elf_check_relocs is called early in the link process,
2006 ppc_elf_finish_dynamic_sections is one of the last functions
2007 called. */
2009 /* Track PLT entries needed for a given symbol. We might need more
2010 than one glink entry per symbol when generating a pic binary. */
2011 struct plt_entry
2012 {
2015 /* -fPIC uses multiple GOT sections, one per file, called ".got2".
2016 This field stores the offset into .got2 used to initialise the
2017 GOT pointer reg. It will always be at least 32768. (Current
2018 gcc always uses an offset of 32768, but ld -r will pack .got2
2019 sections together resulting in larger offsets). */
2020 bfd_vma addend;
2022 /* The .got2 section. */
2025 /* PLT refcount or offset. */
2026 union
2027 {
2028 bfd_signed_vma refcount;
2029 bfd_vma offset;
2032 /* .glink stub offset. */
2033 bfd_vma glink_offset;
2034 };
2036 /* Of those relocs that might be copied as dynamic relocs, this
2037 function selects those that must be copied when linking a shared
2038 library or PIE, even when the symbol is local. */
2040 static int
2043 {
2045 {
2047 /* Only relative relocs can be resolved when the object load
2048 address isn't fixed. DTPREL32 is excluded because the
2049 dynamic linker needs to differentiate global dynamic from
2050 local dynamic __tls_index pairs when PPC_OPT_TLS is set. */
2065 /* These relocations are relative but in a shared library the
2066 linker doesn't know the thread pointer base. */
2068 }
2069 }
2071 /* If ELIMINATE_COPY_RELOCS is non-zero, the linker will try to avoid
2072 copying dynamic variables from a shared lib into an app's dynbss
2073 section, and instead use a dynamic relocation to point into the
2074 shared lib. */
2075 #define ELIMINATE_COPY_RELOCS 1
2077 /* Used to track dynamic relocations for local symbols. */
2078 struct ppc_dyn_relocs
2079 {
2082 /* The input section of the reloc. */
2085 /* Total number of relocs copied for the input section. */
2088 /* Whether this entry is for STT_GNU_IFUNC symbols. */
2090 };
2092 /* PPC ELF linker hash entry. */
2094 struct ppc_elf_link_hash_entry
2095 {
2098 /* If this symbol is used in the linker created sections, the processor
2099 specific backend uses this field to map the field into the offset
2100 from the beginning of the section. */
2103 /* Track dynamic relocs copied for this symbol. */
2106 /* Contexts in which symbol is used in the GOT.
2107 Bits are or'd into the mask as the corresponding relocs are
2108 encountered during check_relocs, with TLS_TLS being set when any
2109 of the other TLS bits are set. tls_optimize clears bits when
2110 optimizing to indicate the corresponding GOT entry type is not
2111 needed. If set, TLS_TLS is never cleared. tls_optimize may also
2112 set TLS_TPRELGD when a GD reloc turns into a TPREL one. We use a
2113 separate flag rather than setting TPREL just for convenience in
2114 distinguishing the two cases.
2115 These flags are also kept for local symbols. */
2125 /* The above field is also used to mark function symbols. In which
2126 case TLS_TLS will be 0. */
2131 /* Nonzero if we have seen a small data relocation referring to this
2132 symbol. */
2135 /* Flag use of given relocations. */
2138 };
2140 #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
2142 /* PPC ELF linker hash table. */
2144 struct ppc_elf_link_hash_table
2145 {
2148 /* Various options passed from the linker. */
2151 /* Short-cuts to get to dynamic linker sections. */
2161 /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */
2164 /* Shortcut to __tls_get_addr. */
2167 /* The bfd that forced an old-style PLT. */
2170 /* TLS local dynamic got entry handling. */
2172 bfd_signed_vma refcount;
2173 bfd_vma offset;
2176 /* Offset of branch table to PltResolve function in glink. */
2177 bfd_vma glink_pltresolve;
2179 /* Size of reserved GOT entries. */
2181 /* Non-zero if allocating the header left a gap. */
2184 /* The type of PLT we have chosen to use. */
2187 /* True if the target system is VxWorks. */
2190 /* Whether there exist local gnu indirect function resolvers,
2191 referenced by dynamic relocations. */
2195 /* Set if tls optimization is enabled. */
2198 /* Set if inline plt calls should be converted to direct calls. */
2201 /* The size of PLT entries. */
2203 /* The distance between adjacent PLT slots. */
2205 /* The size of the first PLT entry. */
2208 /* Small local sym cache. */
2210 };
2212 /* Rename some of the generic section flags to better document how they
2213 are used for ppc32. The flags are only valid for ppc32 elf objects. */
2215 /* Nonzero if this section has TLS related relocations. */
2216 #define has_tls_reloc sec_flg0
2218 /* Nonzero if this section has a call to __tls_get_addr. */
2219 #define has_tls_get_addr_call sec_flg1
2221 /* Flag set when PLTCALL relocs are detected. */
2222 #define has_pltcall sec_flg2
2224 /* Get the PPC ELF linker hash table from a link_info structure. */
2226 #define ppc_elf_hash_table(p) \
2227 (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
2228 == PPC32_ELF_DATA ? ((struct ppc_elf_link_hash_table *) ((p)->hash)) : NULL)
2230 /* Create an entry in a PPC ELF linker hash table. */
2236 {
2237 /* Allocate the structure if it has not already been allocated by a
2238 subclass. */
2240 {
2245 }
2247 /* Call the allocation method of the superclass. */
2250 {
2255 }
2258 }
2260 /* Create a PPC ELF linker hash table. */
2264 {
2266 static struct ppc_elf_params default_params
2274 ppc_elf_link_hash_newfunc,
2276 PPC32_ELF_DATA))
2277 {
2280 }
2302 }
2304 /* Hook linker params into hash table. */
2306 void
2308 {
2314 }
2316 /* Create .got and the related sections. */
2318 static bfd_boolean
2320 {
2328 {
2329 /* The powerpc .got has a blrl instruction in it. Mark it
2330 executable. */
2335 }
2338 }
2340 /* Create a special linker section, used for R_PPC_EMB_SDAI16 and
2341 R_PPC_EMB_SDA2I16 pointers. These sections become part of .sdata
2342 and .sdata2. Create _SDA_BASE_ and _SDA2_BASE too. */
2344 static bfd_boolean
2347 flagword flags,
2349 {
2360 /* Define the sym on the first section of this name. */
2368 }
2370 static bfd_boolean
2372 {
2375 flagword flags;
2390 {
2398 }
2415 /* Local plt entries. */
2419 flags);
2425 {
2428 htab->relpltlocal
2433 }
2444 }
2446 /* We have to create .dynsbss and .rela.sbss here so that they get mapped
2447 to output sections (just like _bfd_elf_create_dynamic_sections has
2448 to create .dynbss and .rela.bss). */
2450 static bfd_boolean
2452 {
2455 flagword flags;
2477 {
2485 }
2494 /* The VxWorks PLT is a loaded section with contents. */
2497 }
2499 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2501 static void
2505 {
2522 /* If we were called to copy over info for a weak sym, that's all. */
2527 {
2529 {
2533 /* Add reloc counts against the indirect sym to the direct sym
2534 list. Merge any entries against the same section. */
2536 {
2541 {
2546 }
2549 }
2551 }
2555 }
2557 /* Copy over the GOT refcount entries that we may have already seen to
2558 the symbol which just became indirect. */
2562 /* And plt entries. */
2564 {
2566 {
2571 {
2576 {
2580 }
2583 }
2585 }
2589 }
2592 {
2600 }
2601 }
2603 /* Hook called by the linker routine which adds symbols from an object
2604 file. We use it to put .comm items in .sbss, and not .bss. */
2606 static bfd_boolean
2614 {
2619 {
2620 /* Common symbols less than or equal to -G nn bytes are automatically
2621 put into .sbss. */
2626 {
2634 flags);
2637 }
2641 }
2644 }
2645 \f
2646 /* Find a linker generated pointer with a given addend and type. */
2649 elf_find_pointer_linker_section
2651 bfd_vma addend,
2653 {
2659 }
2661 /* Allocate a pointer to live in a linker created section. */
2663 static bfd_boolean
2668 {
2672 bfd_size_type amt;
2676 /* Is this a global symbol? */
2678 {
2681 /* Has this symbol already been allocated? If so, our work is done. */
2685 lsect))
2689 }
2690 else
2691 {
2694 /* Allocation of a pointer to a local symbol. */
2697 /* Allocate a table to hold the local symbols if first time. */
2699 {
2710 }
2712 /* Has this symbol already been allocated? If so, our work is done. */
2715 lsect))
2719 }
2721 /* Allocate space for a pointer in the linker section, and allocate
2722 a new pointer record from internal memory. */
2740 #ifdef DEBUG
2745 #endif
2748 }
2755 {
2761 {
2771 }
2779 }
2781 static bfd_boolean
2784 {
2793 {
2803 }
2806 }
2810 {
2819 }
2821 static bfd_boolean
2823 {
2835 }
2837 /* Relocs on inline plt call sequence insns prior to the call. */
2839 static bfd_boolean
2841 {
2846 }
2848 static void
2850 {
2851 _bfd_error_handler
2852 /* xgettext:c-format */
2854 abfd,
2857 }
2859 /* Look through the relocs for a section during the first phase, and
2860 allocate space in the global offset table or procedure linkage
2861 table. */
2863 static bfd_boolean
2868 {
2880 /* Don't do anything special with non-loaded, non-alloced sections.
2881 In particular, any relocs in such sections should not affect GOT
2882 and PLT reference counting (ie. we don't allow them to create GOT
2883 or PLT entries), there's no possibility or desire to optimize TLS
2884 relocs, and there's not much point in propagating relocs to shared
2885 libs that the dynamic linker won't relocate. */
2889 #ifdef DEBUG
2892 #endif
2896 /* Initialize howto table if not already done. */
2902 {
2907 }
2917 {
2924 bfd_vma addend;
2929 else
2930 {
2935 }
2937 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
2938 This shows up in particular in an R_PPC_ADDR32 in the eabi
2939 startup code. */
2943 {
2949 }
2955 {
2962 {
2963 /* Set PLT_IFUNC flag for this sym, no GOT entry yet. */
2969 /* STT_GNU_IFUNC symbols must have a PLT entry;
2970 In a non-pie executable even when there are
2971 no plt calls. */
2977 {
2989 }
2990 }
2991 }
2997 {
3001 /* We have a new-style __tls_get_addr call with a marker
3002 reloc. */
3003 ;
3004 else
3005 /* Mark this section as having an old-style call. */
3007 }
3010 {
3013 /* These special tls relocs tie a call to __tls_get_addr with
3014 its parameter symbol. */
3017 else
3054 dogottls:
3056 /* Fall through. */
3058 /* GOT16 relocations */
3063 /* This symbol requires a global offset table entry. */
3065 {
3070 }
3072 {
3075 }
3076 else
3077 /* This is a global offset table entry for a local symbol. */
3081 /* We may also need a plt entry if the symbol turns out to be
3082 an ifunc. */
3084 {
3087 }
3090 /* Indirect .sdata relocation. */
3093 {
3096 }
3102 {
3105 }
3108 /* Indirect .sdata2 relocation. */
3111 {
3114 }
3120 {
3123 }
3128 /* Fall through. */
3137 {
3140 }
3157 {
3160 }
3163 {
3166 }
3174 {
3177 }
3179 {
3182 }
3191 {
3194 }
3207 /* Fall through. */
3214 pltentry:
3215 #ifdef DEBUG
3217 #endif
3218 /* This symbol requires a procedure linkage table entry. */
3220 {
3225 }
3226 else
3227 {
3232 }
3244 /* The following relocations don't need to propagate the
3245 relocation if linking a shared object since they are
3246 section relative. */
3266 /* These are just markers. */
3277 /* These should only appear in dynamic objects. */
3285 /* These aren't handled yet. We'll report an error later. */
3294 /* This refers only to functions defined in the shared library. */
3297 {
3300 }
3302 {
3306 }
3309 /* This relocation describes the C++ object vtable hierarchy.
3310 Reconstruct it for later use during GC. */
3316 /* This relocation describes which C++ vtable entries are actually
3317 used. Record for later use during GC. */
3323 /* We shouldn't really be seeing TPREL32. */
3333 /* Nor these. */
3344 {
3345 /* Old -fPIC gcc code has .long LCTOC1-LCFx just before
3346 the start of a function, which assembles to a REL32
3347 reference to .got2. If we detect one of these, then
3348 force the old PLT layout because the linker cannot
3349 reliably deduce the GOT pointer value needed for
3350 PLT call stubs. */
3361 {
3364 }
3365 }
3368 /* fall through */
3378 {
3379 /* We may need a plt entry if the symbol turns out to be
3380 a function defined in a dynamic object. */
3384 /* We may need a copy reloc too. */
3391 }
3401 {
3403 {
3406 }
3408 }
3409 /* fall through */
3416 {
3417 /* We may need a plt entry if the symbol turns out to be
3418 a function defined in a dynamic object. */
3423 }
3425 dodyn:
3426 /* If we are creating a shared library, and this is a reloc
3427 against a global symbol, or a non PC relative reloc
3428 against a local symbol, then we need to copy the reloc
3429 into the shared library. However, if we are linking with
3430 -Bsymbolic, we do not need to copy a reloc against a
3431 global symbol which is defined in an object we are
3432 including in the link (i.e., DEF_REGULAR is set). At
3433 this point we have not seen all the input files, so it is
3434 possible that DEF_REGULAR is not set now but will be set
3435 later (it is never cleared). In case of a weak definition,
3436 DEF_REGULAR may be cleared later by a strong definition in
3437 a shared library. We account for that possibility below by
3438 storing information in the dyn_relocs field of the hash
3439 table entry. A similar situation occurs when creating
3440 shared libraries and symbol visibility changes render the
3441 symbol local.
3443 If on the other hand, we are creating an executable, we
3444 may need to keep relocations for symbols satisfied by a
3445 dynamic library if we manage to avoid copy relocs for the
3446 symbol. */
3453 || (ELIMINATE_COPY_RELOCS
3458 {
3459 #ifdef DEBUG
3461 "ppc_elf_check_relocs needs to "
3465 #endif
3467 {
3471 sreloc = _bfd_elf_make_dynamic_reloc_section
3476 }
3478 /* If this is a global symbol, we count the number of
3479 relocations we need for this symbol. */
3481 {
3488 {
3497 }
3501 }
3502 else
3503 {
3504 /* Track dynamic relocs needed for local syms too.
3505 We really need local syms available to do this
3506 easily. Oh well. */
3509 bfd_boolean is_ifunc;
3530 {
3539 }
3541 }
3542 }
3545 }
3546 }
3549 }
3550 \f
3551 /* Warn for conflicting Tag_GNU_Power_ABI_FP attributes between IBFD
3552 and OBFD, and merge non-conflicting ones. */
3553 bfd_boolean
3555 {
3568 {
3574 ;
3576 {
3580 }
3582 {
3583 _bfd_error_handler
3584 /* xgettext:c-format */
3588 }
3590 {
3591 _bfd_error_handler
3592 /* xgettext:c-format */
3596 }
3598 {
3599 _bfd_error_handler
3600 /* xgettext:c-format */
3604 }
3606 {
3607 _bfd_error_handler
3608 /* xgettext:c-format */
3612 }
3617 ;
3619 {
3623 }
3625 {
3626 _bfd_error_handler
3627 /* xgettext:c-format */
3631 }
3633 {
3634 _bfd_error_handler
3635 /* xgettext:c-format */
3639 }
3641 {
3642 _bfd_error_handler
3643 /* xgettext:c-format */
3647 }
3649 {
3650 _bfd_error_handler
3651 /* xgettext:c-format */
3655 }
3656 }
3659 {
3662 }
3664 }
3666 /* Merge object attributes from IBFD into OBFD. Warn if
3667 there are conflicting attributes. */
3668 static bfd_boolean
3670 {
3674 bfd_boolean ret;
3683 /* Check for conflicting Tag_GNU_Power_ABI_Vector attributes and
3684 merge non-conflicting ones. */
3689 {
3695 ;
3697 {
3701 }
3702 /* For now, allow generic to transition to AltiVec or SPE
3703 without a warning. If GCC marked files with their stack
3704 alignment and used don't-care markings for files which are
3705 not affected by the vector ABI, we could warn about this
3706 case too. */
3708 ;
3710 {
3714 }
3716 {
3717 _bfd_error_handler
3718 /* xgettext:c-format */
3723 }
3725 {
3726 _bfd_error_handler
3727 /* xgettext:c-format */
3732 }
3733 }
3735 /* Check for conflicting Tag_GNU_Power_ABI_Struct_Return attributes
3736 and merge non-conflicting ones. */
3740 {
3746 ;
3748 {
3752 }
3754 {
3755 _bfd_error_handler
3756 /* xgettext:c-format */
3761 }
3763 {
3764 _bfd_error_handler
3765 /* xgettext:c-format */
3770 }
3771 }
3773 {
3776 }
3778 /* Merge Tag_compatibility attributes and any common GNU ones. */
3780 }
3782 /* Merge backend specific data from an object file to the output
3783 object file when linking. */
3785 static bfd_boolean
3787 {
3789 flagword old_flags;
3790 flagword new_flags;
3791 bfd_boolean error;
3796 /* Check if we have the same endianness. */
3806 {
3807 /* First call, no flags set. */
3810 }
3812 /* Compatible flags are ok. */
3814 ;
3816 /* Incompatible flags. */
3817 else
3818 {
3819 /* Warn about -mrelocatable mismatch. Allow -mrelocatable-lib
3820 to be linked with either. */
3824 {
3826 _bfd_error_handler
3829 }
3832 {
3834 _bfd_error_handler
3837 }
3839 /* The output is -mrelocatable-lib iff both the input files are. */
3843 /* The output is -mrelocatable iff it can't be -mrelocatable-lib,
3844 but each input file is either -mrelocatable or -mrelocatable-lib. */
3850 /* Do not warn about eabi vs. V.4 mismatch, just or in the bit if
3851 any module uses it. */
3857 /* Warn about any other mismatches. */
3859 {
3861 _bfd_error_handler
3862 /* xgettext:c-format */
3866 }
3869 {
3872 }
3873 }
3876 }
3878 static void
3883 bfd_vma value,
3884 split16_format_type split16_format,
3885 bfd_boolean fixup)
3886 {
3896 {
3898 {
3901 else
3902 _bfd_error_handler
3903 /* xgettext:c-format */
3906 }
3907 }
3915 {
3917 {
3920 else
3921 _bfd_error_handler
3922 /* xgettext:c-format */
3925 }
3926 }
3928 {
3932 {
3933 /* Hack for e_li. Extend sign. */
3936 }
3937 }
3938 else
3939 {
3942 }
3945 }
3947 static void
3949 {
3953 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
3954 /* Top 4 bits of value to 17..20. */
3956 /* Next 5 bits of the value to 11..15. */
3958 /* And the final 11 bits of the value to bits 21 to 31. */
3961 }
3963 \f
3964 /* Choose which PLT scheme to use, and set .plt flags appropriately.
3965 Returns -1 on error, 0 for old PLT, 1 for new PLT. */
3966 int
3969 {
3971 flagword flags;
3976 {
3990 {
3991 /* Profiling of shared libs (and pies) is not supported with
3992 secure plt, because ppc32 does profiling before a
3993 function prologue and a secure plt pic call stubs needs
3994 r30 to be set up. */
3996 }
3997 else
3998 {
4002 /* Look through the reloc flags left by ppc_elf_check_relocs.
4003 Use the old style bss plt if a file makes plt calls
4004 without using the new relocs, and if ld isn't given
4005 --secure-plt and we never see REL16 relocs. */
4010 {
4014 {
4018 }
4019 }
4021 }
4022 }
4024 {
4027 else
4029 }
4034 {
4038 /* The new PLT is a loaded section. */
4043 /* The new GOT is not executable. */
4047 }
4048 else
4049 {
4050 /* Stop an unused .glink section from affecting .text alignment. */
4054 }
4056 }
4057 \f
4058 /* Return the section that should be marked against GC for a given
4059 relocation. */
4067 {
4070 {
4074 }
4077 }
4079 static bfd_boolean
4087 {
4091 {
4107 {
4113 }
4117 }
4118 else
4119 {
4124 {
4133 }
4146 {
4153 {
4159 }
4161 }
4162 }
4164 }
4165 \f
4166 /* Analyze inline PLT call relocations to see whether calls to locally
4167 defined functions can be converted to direct calls. */
4169 bfd_boolean
4171 {
4181 /* A bl insn can reach -0x2000000 to 0x1fffffc. The limit is
4182 reduced somewhat to cater for possible stubs that might be added
4183 between the call and its destination. */
4189 {
4194 }
4196 /* If a "bl" can reach anywhere in local code sections, then we can
4197 convert all inline PLT sequences to direct calls when the symbol
4198 is local. */
4200 {
4203 }
4205 /* Otherwise, go looking through relocs for cases where a direct
4206 call won't reach. Mark the symbol on any such reloc to disable
4207 the optimization and keep the PLT entry as it seems likely that
4208 this will be better than creating trampolines. Note that this
4209 will disable the optimization for all inline PLT calls to a
4210 particular symbol, not just those that won't reach. The
4211 difficulty in doing a more precise optimization is that the
4212 linker needs to make a decision depending on whether a
4213 particular R_PPC_PLTCALL insn can be turned into a direct
4214 call, for each of the R_PPC_PLTSEQ and R_PPC_PLT16* insns in
4215 the sequence, and there is nothing that ties those relocs
4216 together except their symbol. */
4219 {
4232 {
4235 /* Read the relocations. */
4243 {
4258 {
4265 }
4268 {
4272 else
4282 }
4283 }
4286 }
4290 {
4293 else
4295 }
4296 }
4299 }
4301 /* Set plt output section type, htab->tls_get_addr, and call the
4302 generic ELF tls_setup function. */
4304 asection *
4306 {
4316 {
4323 {
4324 /* If glibc supports an optimized __tls_get_addr call stub,
4325 signalled by the presence of __tls_get_addr_opt, and we'll
4326 be calling __tls_get_addr via a plt call stub, then
4327 make __tls_get_addr point to __tls_get_addr_opt. */
4335 {
4341 {
4347 {
4348 /* Use __tls_get_addr_opt in dynamic relocations. */
4354 }
4356 }
4357 }
4358 }
4359 else
4361 }
4365 {
4368 }
4371 }
4373 /* Return TRUE iff REL is a branch reloc with a global symbol matching
4374 HASH. */
4376 static bfd_boolean
4380 {
4386 {
4396 }
4398 }
4400 /* Run through all the TLS relocs looking for optimization
4401 opportunities. */
4403 bfd_boolean
4406 {
4419 /* Make two passes through the relocs. First time check that tls
4420 relocs involved in setting up a tls_get_addr call are indeed
4421 followed by such a call. If they are not, don't do any tls
4422 optimization. On the second pass twiddle tls_mask flags to
4423 notify relocate_section that optimization can be done, and
4424 adjust got and plt refcounts. */
4427 {
4433 {
4437 /* Read the relocations. */
4445 {
4451 bfd_boolean is_local;
4456 {
4464 }
4472 /* If this section has old-style __tls_get_addr calls
4473 without marker relocs, then check that each
4474 __tls_get_addr call reloc is preceded by a reloc
4475 that conceivably belongs to the __tls_get_addr arg
4476 setup insn. If we don't find matching arg setup
4477 relocs, don't do any tls optimization. */
4482 && !expecting_tls_get_addr
4484 {
4491 }
4495 {
4499 /* Fall through. */
4503 /* These relocs should never be against a symbol
4504 defined in a shared lib. Leave them alone if
4505 that turns out to be the case. */
4509 /* LD -> LE */
4517 /* Fall through. */
4522 /* GD -> LE */
4524 else
4525 /* GD -> IE */
4535 {
4536 /* IE -> LE */
4540 }
4541 else
4548 {
4551 {
4555 {
4564 {
4575 }
4576 }
4577 }
4579 }
4587 }
4590 {
4600 /* Uh oh, we didn't find the expected call. We
4601 could just mark this symbol to exclude it
4602 from tls optimization but it's safer to skip
4603 the entire optimization. */
4610 }
4613 {
4616 }
4617 else
4618 {
4632 }
4634 /* If we don't have old-style __tls_get_addr calls
4635 without TLSGD/TLSLD marker relocs, and we haven't
4636 found a new-style __tls_get_addr call with a
4637 marker for this symbol, then we either have a
4638 broken object file or an -mlongcall style
4639 indirect call to __tls_get_addr without a marker.
4640 Disable optimization in this case. */
4648 {
4663 }
4666 {
4667 /* We managed to get rid of a got entry. */
4670 }
4674 }
4678 }
4679 }
4682 }
4683 \f
4684 /* Find dynamic relocs for H that apply to read-only sections. */
4688 {
4692 {
4697 }
4699 }
4701 /* Return true if we have dynamic relocs against H or any of its weak
4702 aliases, that apply to read-only sections. Cannot be used after
4703 size_dynamic_sections. */
4705 static bfd_boolean
4707 {
4709 do
4710 {
4717 }
4719 /* Return whether H has pc-relative dynamic relocs. */
4721 static bfd_boolean
4723 {
4730 }
4732 /* Adjust a symbol defined by a dynamic object and referenced by a
4733 regular object. The current definition is in some section of the
4734 dynamic object, but we're not including those sections. We have to
4735 change the definition to something the rest of the link can
4736 understand. */
4738 static bfd_boolean
4741 {
4745 #ifdef DEBUG
4748 #endif
4750 /* Make sure we know what is going on here. */
4760 /* Deal with function syms. */
4764 {
4767 /* Discard dyn_relocs when non-pic if we've decided that a
4768 function symbol is local. */
4772 /* Clear procedure linkage table information for any symbol that
4773 won't need a .plt entry. */
4780 && local
4784 {
4785 /* A PLT entry is not required/allowed when:
4787 1. We are not using ld.so; because then the PLT entry
4788 can't be set up, so we can't use one. In this case,
4789 ppc_elf_adjust_dynamic_symbol won't even be called.
4791 2. GC has rendered the entry unused.
4793 3. We know for certain that a call to this symbol
4794 will go to this object, or will remain undefined. */
4798 }
4799 else
4800 {
4801 /* Taking a function's address in a read/write section
4802 doesn't require us to define the function symbol in the
4803 executable on a plt call stub. A dynamic reloc can
4804 be used instead, giving better runtime performance.
4805 (Calls via that function pointer don't need to bounce
4806 through the plt call stub.) Similarly, use a dynamic
4807 reloc for a weak reference when possible, allowing the
4808 resolution of the symbol to be set at load time rather
4809 than link time. */
4817 {
4819 /* If we haven't seen a branch reloc and the symbol
4820 isn't an ifunc then we don't need a plt entry. */
4823 }
4825 /* We are going to be defining the function symbol on the
4826 plt stub, so no dyn_relocs needed when non-pic. */
4828 }
4830 /* Function symbols can't have copy relocs. */
4832 }
4833 else
4836 /* If this is a weak symbol, and there is a real definition, the
4837 processor independent code will have arranged for us to see the
4838 real definition first, and we can just use the same value. */
4840 {
4850 }
4852 /* This is a reference to a symbol defined by a dynamic object which
4853 is not a function. */
4855 /* If we are creating a shared library, we must presume that the
4856 only references to the symbol are via the global offset table.
4857 For such cases we need not do anything here; the relocations will
4858 be handled correctly by relocate_section. */
4860 {
4863 }
4865 /* If there are no references to this symbol that do not use the
4866 GOT, we don't need to generate a copy reloc. */
4868 {
4871 }
4873 /* Protected variables do not work with .dynbss. The copy in
4874 .dynbss won't be used by the shared library with the protected
4875 definition for the variable. Editing to PIC, or text relocations
4876 are preferable to an incorrect program. */
4878 {
4886 }
4888 /* If -z nocopyreloc was given, we won't generate them either. */
4892 /* If we don't find any dynamic relocs in read-only sections, then
4893 we'll be keeping the dynamic relocs and avoiding the copy reloc.
4894 We can't do this if there are any small data relocations. This
4895 doesn't work on VxWorks, where we can not have dynamic
4896 relocations (other than copy and jump slot relocations) in an
4897 executable. */
4905 /* We must allocate the symbol in our .dynbss section, which will
4906 become part of the .bss section of the executable. There will be
4907 an entry for this symbol in the .dynsym section. The dynamic
4908 object will contain position independent code, so all references
4909 from the dynamic object to this symbol will go through the global
4910 offset table. The dynamic linker will use the .dynsym entry to
4911 determine the address it must put in the global offset table, so
4912 both the dynamic object and the regular object will refer to the
4913 same memory location for the variable.
4915 Of course, if the symbol is referenced using SDAREL relocs, we
4916 must instead allocate it in .sbss. */
4921 else
4926 {
4929 /* We must generate a R_PPC_COPY reloc to tell the dynamic
4930 linker to copy the initial value out of the dynamic object
4931 and into the runtime process image. */
4936 else
4941 }
4943 /* We no longer want dyn_relocs. */
4946 }
4947 \f
4948 /* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
4949 xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
4950 specifying the addend on the plt relocation. For -fpic code, the sym
4951 is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
4952 xxxxxxxx.got2.plt_pic32.<callee>. */
4954 static bfd_boolean
4958 {
4967 else
4987 {
4997 }
4999 }
5001 /* Allocate NEED contiguous space in .got, and return the offset.
5002 Handles allocation of the got header when crossing 32k. */
5004 static bfd_vma
5006 {
5007 bfd_vma where;
5011 {
5014 }
5015 else
5016 {
5019 {
5022 }
5023 else
5024 {
5027 {
5030 }
5033 }
5034 }
5036 }
5038 /* Calculate size of GOT entries for symbol given its TLS_MASK.
5039 TLS_LD is excluded because those go in a special GOT slot. */
5043 {
5047 else
5048 {
5056 }
5058 }
5060 /* Calculate size of relocs needed for symbol given its TLS_MASK and
5061 NEEDed GOT entries. KNOWN says a TPREL offset can be calculated at
5062 link time. */
5066 {
5067 /* All the entries we allocated need relocs.
5068 Except IE in executable with a local symbol. We could also omit
5069 the DTPREL reloc on the second word of a GD entry under the same
5070 condition as that for IE, but ld.so needs to differentiate
5071 LD and GD entries. */
5076 }
5078 /* If H is undefined, make it dynamic if that makes sense. */
5080 static bfd_boolean
5083 {
5095 }
5097 /* Allocate space in associated reloc sections for dynamic relocs. */
5099 static bfd_boolean
5101 {
5106 bfd_boolean dyn;
5114 || (ELIMINATE_COPY_RELOCS
5120 {
5123 /* Make sure this symbol is output as a dynamic symbol. */
5129 {
5131 /* We'll just use htab->tlsld_got.offset. This should
5132 always be the case. It's a little odd if we have
5133 a local dynamic reloc against a non-local symbol. */
5135 else
5137 }
5141 else
5142 {
5149 {
5163 }
5164 }
5165 }
5166 else
5169 /* If no dynamic sections we can't have dynamic relocs, except for
5170 IFUNCs which are handled even in static executables. */
5175 /* Discard relocs on undefined symbols that must be local. */
5180 /* Also discard relocs on undefined weak syms with non-default
5181 visibility, or when dynamic_undefined_weak says so. */
5186 ;
5188 /* In the shared -Bsymbolic case, discard space allocated for
5189 dynamic pc-relative relocs against symbols which turn out to be
5190 defined in regular objects. For the normal shared case, discard
5191 space for relocs that have become local due to symbol visibility
5192 changes. */
5194 {
5195 /* Relocs that use pc_count are those that appear on a call insn,
5196 or certain REL relocs (see must_be_dyn_reloc) that can be
5197 generated via assembly. We want calls to protected symbols to
5198 resolve directly to the function rather than going via the plt.
5199 If people want function pointer comparisons to work as expected
5200 then they should avoid writing weird assembly. */
5202 {
5206 {
5211 else
5213 }
5214 }
5217 {
5221 {
5224 else
5226 }
5227 }
5230 {
5231 /* Make sure this symbol is output as a dynamic symbol. */
5234 }
5235 }
5237 {
5238 /* For the non-pic case, discard space for relocs against
5239 symbols which turn out to need copy relocs or are not
5240 dynamic. */
5248 {
5249 /* Make sure this symbol is output as a dynamic symbol. */
5255 }
5256 else
5258 }
5260 /* Allocate space. */
5262 {
5267 }
5269 /* Handle PLT relocs. Done last, after dynindx has settled.
5270 We might need a PLT entry when the symbol
5271 a) is dynamic, or
5272 b) is an ifunc, or
5273 c) has plt16 relocs and has been processed by adjust_dynamic_symbol, or
5274 d) has plt16 relocs and we are linking statically. */
5285 {
5292 {
5296 {
5299 else
5301 }
5304 {
5306 {
5309 }
5314 else
5315 {
5318 {
5321 }
5326 {
5329 }
5335 }
5336 }
5337 else
5338 {
5340 {
5341 /* If this is the first .plt entry, make room
5342 for the special first entry. */
5346 /* The PowerPC PLT is actually composed of two
5347 parts, the first part is 2 words (for a load
5348 and a jump), and then there is a remaining
5349 word available at the end. */
5356 /* If this symbol is not defined in a regular
5357 file, and we are not generating a shared
5358 library, then set the symbol to this location
5359 in the .plt. This is to avoid text
5360 relocations, and is required to make
5361 function pointers compare as equal between
5362 the normal executable and the shared library. */
5366 {
5369 }
5371 /* Make room for this entry. */
5373 /* After the 8192nd entry, room for two entries
5374 is allocated. */
5380 }
5382 }
5384 /* We also need to make an entry in the .rela.plt section. */
5386 {
5388 {
5390 {
5393 }
5395 {
5398 }
5399 }
5400 else
5401 {
5405 {
5406 /* Allocate space for the unloaded relocations. */
5409 {
5412 {
5416 }
5421 }
5423 /* Every PLT entry has an associated GOT entry in
5424 .got.plt. */
5426 }
5427 }
5429 }
5430 }
5431 else
5435 {
5438 }
5439 }
5440 else
5441 {
5444 }
5447 }
5449 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
5450 read-only sections. */
5452 static bfd_boolean
5454 {
5462 {
5470 /* Not an error, just cut short the traversal. */
5472 }
5474 }
5477 {
5488 };
5490 /* Set the sizes of the dynamic sections. */
5492 static bfd_boolean
5495 {
5498 bfd_boolean relocs;
5501 #ifdef DEBUG
5503 #endif
5509 {
5510 /* Set the contents of the .interp section to the interpreter. */
5512 {
5517 }
5518 }
5525 /* Set up .got offsets for local syms, and space for local dynamic
5526 relocs. */
5528 {
5534 bfd_size_type locsymcount;
5541 {
5548 {
5551 {
5552 /* Input section has been discarded, either because
5553 it is a copy of a linkonce section or due to
5554 linker script /DISCARD/, so we'll be discarding
5555 the relocs too. */
5556 }
5560 {
5561 /* Relocations in vxworks .tls_vars sections are
5562 handled specially by the loader. */
5563 }
5565 {
5573 {
5577 }
5578 }
5579 }
5580 }
5595 {
5602 else
5603 {
5606 {
5615 }
5616 }
5617 }
5618 else
5624 /* Allocate space for calls to local STT_GNU_IFUNC syms in .iplt. */
5627 {
5634 {
5639 {
5642 }
5643 else
5647 {
5650 }
5654 {
5658 }
5662 {
5664 {
5667 }
5669 {
5672 }
5674 }
5675 }
5676 else
5678 }
5679 }
5681 /* Allocate space for global sym dynamic relocs. */
5685 {
5689 }
5690 else
5694 {
5697 /* If we haven't allocated the header, do so now. When we get here,
5698 for old plt/got the got size will be 0 to 32764 (not allocated),
5699 or 32780 to 65536 (header allocated). For new plt/got, the
5700 corresponding ranges are 0 to 32768 and 32780 to 65536. */
5702 {
5707 }
5710 }
5712 {
5717 }
5719 {
5727 }
5732 {
5734 /* Space for the branch table. */
5737 /* Pad out to align the start of PLTresolve. */
5743 {
5750 {
5760 }
5766 {
5776 }
5777 }
5778 }
5785 {
5789 {
5793 }
5794 }
5796 /* We've now determined the sizes of the various dynamic sections.
5797 Allocate memory for them. */
5800 {
5808 {
5809 /* We'd like to strip these sections if they aren't needed, but if
5810 we've exported dynamic symbols from them we must leave them.
5811 It's too late to tell BFD to get rid of the symbols. */
5814 /* Strip this section if we don't need it; see the
5815 comment below. */
5816 }
5826 {
5827 /* Strip these too. */
5828 }
5831 {
5833 }
5836 {
5838 {
5839 /* Remember whether there are any relocation sections. */
5842 /* We use the reloc_count field as a counter if we need
5843 to copy relocs into the output file. */
5845 }
5846 }
5847 else
5848 {
5849 /* It's not one of our sections, so don't allocate space. */
5851 }
5854 {
5855 /* If we don't need this section, strip it from the
5856 output file. This is mostly to handle .rela.bss and
5857 .rela.plt. We must create both sections in
5858 create_dynamic_sections, because they must be created
5859 before the linker maps input sections to output
5860 sections. The linker does that before
5861 adjust_dynamic_symbol is called, and it is that
5862 function which decides whether anything needs to go
5863 into these sections. */
5866 }
5871 /* Allocate memory for the section contents. */
5875 }
5878 {
5879 /* Add some entries to the .dynamic section. We fill in the
5880 values later, in ppc_elf_finish_dynamic_sections, but we
5881 must add the entries now so that we get the correct size for
5882 the .dynamic section. The DT_DEBUG entry is filled in by the
5883 dynamic linker and used by the debugger. */
5884 #define add_dynamic_entry(TAG, VAL) \
5885 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
5888 {
5891 }
5894 {
5900 }
5905 {
5913 }
5916 {
5921 }
5923 /* If any dynamic relocs apply to a read-only section, then we
5924 need a DT_TEXTREL entry. */
5927 info);
5930 {
5933 }
5937 }
5938 #undef add_dynamic_entry
5942 {
5944 bfd_vma val;
5947 /* CIE length (rewrite in case little-endian). */
5950 /* FDE length. */
5954 /* CIE pointer. */
5958 /* Offset to .glink. Set later. */
5960 /* .glink size. */
5963 /* Augmentation. */
5968 {
5973 {
5976 }
5978 {
5982 }
5983 else
5984 {
5988 }
5991 p++;
5995 }
5998 }
6001 }
6003 /* Arrange to have _SDA_BASE_ or _SDA2_BASE_ stripped from the output
6004 if it looks like nothing is using them. */
6006 static void
6008 {
6012 {
6017 {
6020 {
6022 /* This is somewhat magic. See elf_link_output_extsym. */
6025 }
6026 }
6027 }
6028 }
6030 void
6032 {
6036 {
6039 }
6040 }
6043 /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */
6045 static bfd_boolean
6047 {
6055 }
6056 \f
6057 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
6059 /* Relaxation trampolines. r12 is available for clobbering (r11, is
6060 used for some functions that are allowed to break the ABI). */
6062 {
6071 };
6074 {
6079 };
6081 struct ppc_elf_relax_info
6082 {
6085 };
6087 /* This function implements long branch trampolines, and the ppc476
6088 icache bug workaround. Any section needing trampolines or patch
6089 space for the workaround has its size extended so that we can
6090 add trampolines at the end of the section. */
6092 static bfd_boolean
6097 {
6098 struct one_branch_fixup
6099 {
6102 /* Final link, can use the symbol offset. For a
6103 relocatable link we use the symbol's index. */
6104 bfd_vma toff;
6105 bfd_vma trampoff;
6106 };
6116 bfd_boolean workaround_change;
6120 bfd_boolean maybe_pasted;
6124 /* No need to do anything with non-alloc or non-code sections. */
6131 /* We cannot represent the required PIC relocs in the output, so don't
6132 do anything. The linker doesn't support mixing -shared and -r
6133 anyway. */
6152 {
6154 {
6159 }
6162 }
6166 /* Space for a branch around any trampolines. */
6175 {
6176 /* Get a copy of the native relocations. */
6178 {
6183 }
6189 {
6204 {
6225 }
6227 /* Get the value of the symbol referred to by the reloc. */
6233 {
6235 ;
6238 else
6243 }
6244 else
6245 {
6250 {
6256 }
6257 else
6260 /* If this branch is to __tls_get_addr then we may later
6261 optimise away the call. We won't be needing a long-
6262 branch stub in that case. */
6266 {
6271 /* The previous reloc should be one of R_PPC_TLSGD or
6272 R_PPC_TLSLD, or for older object files, a reloc
6273 on the __tls_get_addr arg setup insn. Get tls
6274 mask bits from the symbol on that reloc. */
6276 {
6280 {
6286 }
6287 }
6288 else
6289 {
6297 tls_mask
6299 }
6301 /* The mask bits tell us if the call will be
6302 optimised away. */
6313 }
6316 }
6319 {
6327 }
6329 /* The condition here under which we call find_plt_ent must
6330 match that in relocate_section. If we call find_plt_ent here
6331 but not in relocate_section, or vice versa, then the branch
6332 destination used here may be incorrect. */
6335 {
6336 /* We know is_branch_reloc (r_type) is true. */
6340 }
6343 {
6348 }
6350 {
6358 {
6363 {
6366 }
6367 else
6368 {
6371 }
6372 }
6373 }
6375 /* If the branch and target are in the same section, you have
6376 no hope of adding stubs. We'll error out later should the
6377 branch overflow. */
6381 /* toff is used for the symbol index when the symbol is
6382 undefined and we're doing a relocatable link, so we can't
6383 support addends. It would be possible to do so by
6384 putting the addend in one_branch_fixup but addends on
6385 branches are rare so it hardly seems worth supporting. */
6392 /* There probably isn't any reason to handle symbols in
6393 SEC_MERGE sections; SEC_MERGE doesn't seem a likely
6394 attribute for a code section, and we are only looking at
6395 branches. However, implement it correctly here as a
6396 reference for other target relax_section functions. */
6398 {
6399 /* At this stage in linking, no SEC_MERGE symbol has been
6400 adjusted, so all references to such symbols need to be
6401 passed through _bfd_merged_section_offset. (Later, in
6402 relocate_section, all SEC_MERGE symbols *except* for
6403 section symbols have been adjusted.)
6405 gas may reduce relocations against symbols in SEC_MERGE
6406 sections to a relocation against the section symbol when
6407 the original addend was zero. When the reloc is against
6408 a section symbol we should include the addend in the
6409 offset passed to _bfd_merged_section_offset, since the
6410 location of interest is the original symbol. On the
6411 other hand, an access to "sym+addend" where "sym" is not
6412 a section symbol should not include the addend; Such an
6413 access is presumed to be an offset from "sym"; The
6414 location of interest is just "sym". */
6419 toff
6422 toff);
6427 }
6428 /* PLTREL24 addends are special. */
6432 /* Attempted -shared link of non-pic code loses. */
6442 /* Avoid creating a lot of unnecessary fixups when
6443 relocatable if the output section size is such that a
6444 fixup can be created at final link.
6445 The max_branch_offset adjustment allows for some number
6446 of other fixups being needed at final link. */
6452 /* If the branch is in range, no need to do anything. */
6455 /* A relocatable link may have sections moved during
6456 final link, so do not presume they remain in range. */
6458 {
6466 }
6468 /* Look for an existing fixup to this address. */
6474 {
6480 /* Oh dear, we can't reach a trampoline. Don't try to add
6481 one. We'll report an error later. */
6485 {
6488 }
6489 else
6490 {
6493 }
6497 {
6501 }
6503 /* Hijack the old relocation. Since we need two
6504 relocations for this use a "composite" reloc. */
6506 stub_rtype);
6512 /* Record the fixup so we don't do it again this section. */
6521 changes++;
6522 }
6523 else
6524 {
6529 /* Nop out the reloc, since we're finalizing things here. */
6531 }
6533 /* Get the section contents. */
6535 {
6536 /* Get cached copy if it exists. */
6539 /* Go get them off disk. */
6542 }
6544 /* Fix up the existing branch to hit the trampoline. */
6547 {
6565 }
6566 }
6569 {
6573 }
6574 }
6581 {
6591 {
6592 /* Keep space aligned, to ensure the patch code itself does
6593 not cross a page. Don't decrease size calculated on a
6594 previous pass as otherwise we might never settle on a layout. */
6598 {
6601 }
6602 /* Ensure relocate_section is called. */
6604 }
6606 }
6609 {
6614 }
6621 {
6624 else
6625 {
6626 /* Cache the symbols for elf_link_input_bfd. */
6628 }
6629 }
6633 {
6636 else
6637 {
6638 /* Cache the section contents for elf_link_input_bfd. */
6640 }
6641 }
6645 {
6646 /* Append sufficient NOP relocs so we can write out relocation
6647 information for the trampolines. */
6658 {
6662 }
6669 }
6677 error_return:
6679 {
6683 }
6693 }
6694 \f
6695 /* What to do when ld finds relocations against symbols defined in
6696 discarded sections. */
6698 static unsigned int
6700 {
6708 }
6709 \f
6710 /* Fill in the address for a pointer generated in a linker section. */
6712 static bfd_vma
6716 bfd_vma relocation,
6718 {
6724 {
6725 /* Handle global symbol. */
6731 }
6732 else
6733 {
6734 /* Handle local symbol. */
6740 }
6744 lsect);
6747 /* Offset will always be a multiple of four, so use the bottom bit
6748 as a "written" flag. */
6750 {
6755 }
6762 #ifdef DEBUG
6766 #endif
6769 }
6771 #define PPC_LO(v) ((v) & 0xffff)
6772 #define PPC_HI(v) (((v) >> 16) & 0xffff)
6773 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
6775 static void
6779 {
6782 bfd_vma plt;
6788 {
6805 }
6812 {
6826 else
6827 {
6831 }
6832 }
6833 else
6834 {
6838 }
6845 {
6848 }
6849 }
6851 /* Return true if symbol is defined statically. */
6853 static bfd_boolean
6855 {
6860 }
6862 /* If INSN is an opcode that may be used with an @tls operand, return
6863 the transformed insn for TLS optimisation, otherwise return 0. If
6864 REG is non-zero only match an insn with RB or RA equal to REG. */
6866 unsigned int
6868 {
6878 else
6882 /* add -> addi. */
6888 /* load and store indexed -> dform. */
6891 /* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
6894 /* lwax -> lwa. */
6896 else
6900 }
6902 /* If INSN is an opcode that may be used with an @tprel operand, return
6903 the transformed insn for an undefined weak symbol, ie. with the
6904 thread pointer REG operand removed. Otherwise return 0. */
6906 unsigned int
6908 {
6929 {
6931 }
6936 {
6941 }
6942 else
6945 }
6947 static bfd_boolean
6949 {
6954 }
6956 static bfd_boolean
6958 {
6962 }
6964 /* The RELOCATE_SECTION function is called by the ELF backend linker
6965 to handle the relocations for a section.
6967 The relocs are always passed as Rela structures; if the section
6968 actually uses Rel structures, the r_addend field will always be
6969 zero.
6971 This function is responsible for adjust the section contents as
6972 necessary, and (if using Rela relocs and generating a
6973 relocatable output file) adjusting the reloc addend as
6974 necessary.
6976 This function does not have to worry about setting the reloc
6977 address or the reloc symbol index.
6979 LOCAL_SYMS is a pointer to the swapped in local symbols.
6981 LOCAL_SECTIONS is an array giving the section in the input file
6982 corresponding to the st_shndx field of each local symbol.
6984 The global hash table entry for the global symbols can be found
6985 via elf_sym_hashes (input_bfd).
6987 When generating relocatable output, this function must handle
6988 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
6989 going to be the section symbol corresponding to the output
6990 section, which means that the addend must be adjusted
6991 accordingly. */
6993 static bfd_boolean
7002 {
7009 Elf_Internal_Rela outrel;
7014 bfd_boolean is_vxworks_tls;
7018 #ifdef DEBUG
7024 #endif
7027 {
7030 }
7034 /* Initialize howto table if not already done. */
7042 /* We have to handle relocations in vxworks .tls_vars sections
7043 specially, because the dynamic loader is 'weird'. */
7052 {
7054 bfd_vma addend;
7055 bfd_reloc_status_type r;
7062 bfd_vma relocation;
7065 bfd_boolean warned;
7070 again:
7080 {
7086 }
7087 else
7088 {
7089 bfd_boolean ignored;
7097 }
7100 {
7101 /* For relocs against symbols from removed linkonce sections,
7102 or sections discarded by a linker script, we just want the
7103 section contents zeroed. Avoid any special processing. */
7114 /* For ld -r, remove relocations in debug sections against
7115 symbols defined in discarded sections. Not done for
7116 non-debug to preserve relocs in .eh_frame which the
7117 eh_frame editing code expects to be present. */
7120 wrel--;
7123 }
7126 {
7130 {
7131 /* R_PPC_PLTREL24 is rather special. If non-zero, the
7132 addend specifies the GOT pointer offset within .got2. */
7134 }
7139 }
7141 /* TLS optimizations. Replace instruction sequences and relocs
7142 based on information we collected in tls_optimize. We edit
7143 RELOCS so that --emit-relocs will output something sensible
7144 for the final instruction stream. */
7150 {
7153 local_plt
7157 }
7159 /* Ensure reloc mapping code below stays sane. */
7170 {
7178 {
7179 bfd_vma insn;
7189 }
7195 {
7196 bfd_vma insn;
7206 /* Was PPC_TLS which sits on insn boundary, now
7207 PPC_TPREL16_LO which is at low-order half-word. */
7209 }
7222 {
7223 tls_gdld_hi:
7227 else
7228 {
7232 }
7234 }
7247 {
7249 bfd_vma offset;
7251 tls_ldgd_opt:
7253 /* If not using the newer R_PPC_TLSGD/LD to mark
7254 __tls_get_addr calls, we must trust that the call
7255 stays with its arg setup insns, ie. that the next
7256 reloc is the __tls_get_addr call associated with
7257 the current reloc. Edit both insns. */
7263 /* We read the low GOT_TLS insn because we need to keep
7264 the destination reg. It may be something other than
7265 the usual r3, and moved to r3 before the call by
7266 intervening code. */
7270 {
7271 /* IE */
7275 {
7279 }
7283 }
7284 else
7285 {
7286 /* LE */
7290 {
7291 /* Was an LD reloc. */
7294 r_symndx++)
7304 }
7308 {
7314 }
7315 }
7319 {
7320 /* We changed the symbol on an LD reloc. Start over
7321 in order to get h, sym, sec etc. right. */
7323 }
7324 }
7330 {
7335 {
7339 }
7342 {
7343 /* IE */
7346 }
7347 else
7348 {
7349 /* LE */
7353 }
7356 /* Zap the reloc on the _tls_get_addr call too. */
7359 }
7365 {
7369 {
7373 }
7377 r_symndx++)
7393 /* Zap the reloc on the _tls_get_addr call too. */
7397 }
7399 }
7401 /* Handle other relocations that tweak non-addend part of insn. */
7404 {
7408 /* Branch taken prediction relocations. */
7412 /* Fall through. */
7414 /* Branch not taken prediction relocations. */
7417 {
7428 /* Invert 'y' bit if not the default. */
7433 }
7437 {
7444 {
7446 {
7447 /* Convert addis to lis. */
7451 }
7452 }
7458 }
7460 }
7469 {
7470 /* Convert lis;addi or lis;load/store accessing a protected
7471 variable defined in a shared library to PIC. */
7475 {
7480 {
7482 bfd_vma off;
7483 bfd_vma got_addr;
7507 /* Convert lis to lwz, loading address from GOT. */
7517 /* Use one of the spare relocs, so --emit-relocs
7518 output is reasonable. */
7525 /* Continue on as if we had a got reloc, to output
7526 dynamic reloc. */
7528 }
7529 else
7530 _bfd_error_handler
7531 /* xgettext:c-format */
7536 }
7538 {
7559 {
7560 /* Arrange to apply the reloc addend, if any. */
7564 }
7565 else
7566 _bfd_error_handler
7567 /* xgettext:c-format */
7572 }
7573 }
7577 {
7581 {
7584 }
7587 {
7593 }
7602 {
7611 }
7613 {
7620 {
7621 /* Uh oh, we are going to create a pic glink stub
7622 for an ifunc (here for h == NULL and later in
7623 finish_dynamic_symbol for h != NULL), and
7624 apparently are using code compiled with
7625 -mbss-plt. The difficulty is that -mbss-plt code
7626 gives no indication via a magic PLTREL24 addend
7627 whether r30 is equal to _GLOBAL_OFFSET_TABLE_ or
7628 is pointing into a .got2 section (and how far
7629 into .got2). */
7631 /* xgettext:c-format */
7634 }
7644 else
7648 }
7649 }
7658 {
7664 {
7669 /* xgettext:c-format */
7673 else
7675 }
7680 {
7686 }
7688 }
7692 {
7694 /* xgettext:c-format */
7711 /* GOT16 relocations. Like an ADDR16 using the symbol's
7712 address in the GOT as relocation value instead of the
7713 symbol's value itself. Also, create a GOT entry for the
7714 symbol and put the symbol value there. */
7748 dogot:
7749 {
7750 /* Relocation is to the entry for this symbol in the global
7751 offset table. */
7752 bfd_vma off;
7765 {
7770 /* This is actually a static link, or it is a
7771 -Bsymbolic link and the symbol is defined
7772 locally, or the symbol was forced to be local
7773 because of a version file. */
7774 ;
7775 else
7776 {
7779 }
7781 }
7782 else
7783 {
7787 }
7789 /* The offset must always be a multiple of 4. We use the
7790 least significant bit to record whether we have already
7791 processed this entry. */
7795 else
7796 {
7808 /* We might have multiple got entries for this sym.
7809 Initialize them all. */
7810 do
7811 {
7815 {
7818 }
7820 {
7823 }
7825 {
7828 }
7830 {
7833 }
7835 /* Generate relocs for the dynamic linker. */
7844 {
7849 {
7855 }
7861 {
7864 {
7871 outrel.r_info
7873 }
7874 }
7883 else
7886 {
7889 {
7892 else
7894 }
7895 }
7900 }
7902 /* Init the .got section contents if we're not
7903 emitting a reloc. */
7904 else
7905 {
7909 {
7912 else
7913 {
7916 else
7920 }
7923 {
7927 }
7928 }
7931 }
7936 }
7941 }
7947 {
7949 {
7955 {
7959 {
7962 }
7963 }
7964 }
7965 }
7967 /* If here for a picfixup, we're done. */
7973 + off
7976 /* Addends on got relocations don't make much sense.
7977 x+off@got is actually x@got+off, and since the got is
7978 generated by a hash table traversal, the value in the
7979 got at entry m+n bears little relation to the entry m. */
7982 /* xgettext:c-format */
7986 sym_name);
7987 }
7990 /* Relocations that need no special processing. */
7992 /* It makes no sense to point a local relocation
7993 at a symbol not in this object. */
7995 {
7998 input_bfd,
7999 input_section,
8001 TRUE);
8003 }
8005 {
8006 /* @local on an ifunc does not really make sense since
8007 the ifunc resolver can take you anywhere. More
8008 seriously, calls to ifuncs must go through a plt call
8009 stub, and for pic the plt call stubs uses r30 to
8010 access the PLT. The problem is that a call that is
8011 local won't have the +32k reloc addend trick marking
8012 -fPIC code, so the linker won't know whether r30 is
8013 _GLOBAL_OFFSET_TABLE_ or pointing into a .got2 section. */
8014 /* xgettext:c-format */
8018 }
8029 /* Relocations that may need to be propagated if this is a shared
8030 object. */
8038 {
8039 /* Make this relocation against an undefined weak symbol
8040 resolve to zero. This is really just a tweak, since
8041 code using weak externs ought to check that they are
8042 defined before using them. */
8049 }
8052 /* The TPREL16 relocs shouldn't really be used in shared
8053 libs or with non-local symbols as that will result in
8054 DT_TEXTREL being set, but support them anyway. */
8082 /* fall through */
8100 /* If these relocations are not to a named symbol, they can be
8101 handled right here, no need to bother the dynamic linker. */
8105 /* fall through */
8113 /* fall through */
8115 dodyn:
8127 {
8133 #ifdef DEBUG
8138 #endif
8140 /* When generating a shared object, these relocations
8141 are copied into the output file to be resolved at run
8142 time. */
8145 input_section,
8156 {
8162 }
8163 else
8164 {
8168 {
8170 {
8171 /* If we get here when building a static
8172 executable, then the libc startup function
8173 responsible for applying indirect function
8174 relocations is going to complain about
8175 the reloc type.
8176 If we get here when building a dynamic
8177 executable, it will be because we have
8178 a text relocation. The dynamic loader
8179 will set the text segment writable and
8180 non-executable to apply text relocations.
8181 So we'll segfault when trying to run the
8182 indirection function to resolve the reloc. */
8184 /* xgettext:c-format */
8189 sym_name);
8191 }
8193 ;
8195 {
8198 }
8199 else
8200 {
8203 /* We are turning this relocation into one
8204 against a section symbol. It would be
8205 proper to subtract the symbol's value,
8206 osec->vma, from the emitted reloc addend,
8207 but ld.so expects buggy relocs.
8208 FIXME: Why not always use a zero index? */
8212 {
8215 }
8217 #ifdef DEBUG
8222 #endif
8223 }
8226 }
8229 else
8231 }
8235 {
8241 }
8252 /* This reloc will be computed at runtime. Clear the memory
8253 so that it contains a predictable value for prelink. */
8255 {
8259 }
8260 }
8266 {
8271 {
8275 }
8281 else
8285 }
8286 /* Fall through. */
8289 {
8296 {
8306 }
8307 else
8308 {
8311 }
8317 /* First insn is HA, second is LO. */
8330 {
8335 }
8337 /* Rewrite the reloc and convert one of the trailing nop
8338 relocs to describe this relocation. */
8340 /* The relocs are at the bottom 2 bytes */
8348 }
8351 /* Indirect .sdata relocation. */
8355 {
8358 }
8359 relocation
8365 /* Indirect .sdata2 relocation. */
8369 {
8372 }
8373 relocation
8379 /* Handle the TOC16 reloc. We want to use the offset within the .got
8380 section, not the actual VMA. This is appropriate when generating
8381 an embedded ELF object, for which the .got section acts like the
8382 AIX .toc section. */
8385 {
8388 }
8399 {
8406 {
8407 /* We didn't make a PLT entry for this symbol. This
8408 happens when statically linking PIC code, or when
8409 using -Bsymbolic. */
8410 }
8411 else
8412 {
8413 /* Relocation is to the entry for this symbol in the
8414 procedure linkage table. */
8420 else
8424 }
8425 }
8427 /* R_PPC_PLTREL24 is rather special. If non-zero, the
8428 addend specifies the GOT pointer offset within .got2.
8429 Don't apply it to the relocation field. */
8444 {
8449 }
8452 {
8458 {
8466 {
8469 else
8471 }
8476 {
8483 else
8486 }
8487 }
8488 }
8492 /* Relocate against _SDA_BASE_. */
8494 {
8501 {
8504 }
8510 {
8511 _bfd_error_handler
8512 /* xgettext:c-format */
8515 input_bfd,
8516 sym_name,
8518 name);
8519 }
8520 }
8523 /* Relocate against _SDA2_BASE_. */
8525 {
8532 {
8535 }
8541 {
8542 _bfd_error_handler
8543 /* xgettext:c-format */
8546 input_bfd,
8547 sym_name,
8549 name);
8550 }
8551 }
8596 /* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
8601 {
8608 {
8611 }
8616 {
8619 }
8622 {
8625 }
8628 {
8630 }
8631 else
8632 {
8633 _bfd_error_handler
8634 /* xgettext:c-format */
8637 input_bfd,
8638 sym_name,
8640 name);
8645 }
8648 {
8650 {
8653 }
8655 }
8661 {
8665 /* Force e_li insn, keeping RT from original insn. */
8669 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
8670 /* Top 4 bits of value to 17..20. */
8672 /* Next 5 bits of the value to 11..15. */
8674 /* And the final 11 bits of the value to bits 21 to 31. */
8683 }
8687 {
8688 /* Fill in register field. */
8690 }
8692 }
8701 {
8702 bfd_vma value;
8707 {
8710 }
8719 else
8720 {
8721 _bfd_error_handler
8722 /* xgettext:c-format */
8725 input_bfd,
8726 sym_name,
8728 name);
8733 }
8736 {
8739 }
8745 split16a_type,
8750 split16d_type,
8753 {
8757 split16a_type,
8759 }
8761 {
8765 split16d_type,
8767 }
8769 {
8773 split16a_type,
8775 }
8777 {
8781 split16d_type,
8783 }
8784 }
8791 /* Relocate against the beginning of the section. */
8797 {
8800 }
8804 /* Negative relocations. */
8826 /* xgettext:c-format */
8833 }
8836 {
8842 {
8850 }
8862 {
8868 }
8875 }
8877 /* Do any further special processing. */
8879 {
8891 /* It's just possible that this symbol is a weak symbol
8892 that's not actually defined anywhere. In that case,
8893 'sec' would be NULL, and we should leave the symbol
8894 alone (it will be set to zero elsewhere in the link). */
8897 /* Fall through. */
8905 /* Add 0x10000 if sign bit in 0:15 is set.
8906 Bits 0:15 are not used. */
8929 {
8930 /* The 32-bit ABI lacks proper relocations to deal with
8931 certain 64-bit instructions. Prevent damage to bits
8932 that make up part of the insn opcode. */
8942 else
8948 {
8951 /* xgettext:c-format */
8957 }
8958 }
8960 }
8962 #ifdef DEBUG
8967 sym_name,
8968 r_symndx,
8971 #endif
8978 {
8980 /* xgettext:c-format */
8984 sym_name);
8986 }
8988 /* 16-bit fields in insns mostly have signed values, but a
8989 few insns have 16-bit unsigned values. Really, we should
8990 have different reloc types. */
8994 {
8998 {
9008 }
9010 {
9014 }
9015 }
9018 {
9019 /* Split field reloc isn't handled by _bfd_final_link_relocate. */
9022 else
9023 {
9036 }
9037 }
9038 else
9043 {
9045 {
9046 overflow:
9047 /* On code like "if (foo) foo();" don't report overflow
9048 on a branch to zero when foo is undefined. */
9057 }
9058 else
9059 {
9061 /* xgettext:c-format */
9066 }
9067 }
9068 copy_reloc:
9071 }
9074 {
9081 {
9082 /* It is too late to remove an empty reloc section. Leave
9083 one NONE reloc.
9084 ??? What is wrong with an empty section??? */
9087 wrel++;
9088 }
9093 }
9095 #ifdef DEBUG
9097 #endif
9103 {
9104 /* Branch around the trampolines. */
9107 }
9114 {
9119 {
9128 {
9131 }
9132 }
9134 /* The idea is: Replace the last instruction on a page with a
9135 branch to a patch area. Put the insn there followed by a
9136 branch back to the next page. Complicated a little by
9137 needing to handle moved conditional branches, and by not
9138 wanting to touch data-in-text. */
9147 {
9150 bfd_boolean is_data;
9154 /* Do we have a data reloc at this offset? If so, leave
9155 the word alone. */
9161 {
9167 else
9168 {
9170 {
9179 }
9181 }
9182 }
9186 /* Some instructions can be left alone too. Unconditional
9187 branches, except for bcctr with BO=0x14 (bctr, bctrl),
9188 avoid the icache failure.
9190 The problem occurs due to prefetch across a page boundary
9191 where stale instructions can be fetched from the next
9192 page, and the mechanism for flushing these bad
9193 instructions fails under certain circumstances. The
9194 unconditional branches:
9195 1) Branch: b, bl, ba, bla,
9196 2) Branch Conditional: bc, bca, bcl, bcla,
9197 3) Branch Conditional to Link Register: bclr, bclrl,
9198 where (2) and (3) have BO=0x14 making them unconditional,
9199 prevent the bad prefetch because the prefetch itself is
9200 affected by these instructions. This happens even if the
9201 instruction is not executed.
9203 A bctr example:
9204 .
9205 . lis 9,new_page@ha
9206 . addi 9,9,new_page@l
9207 . mtctr 9
9208 . bctr
9209 . nop
9210 . nop
9211 . new_page:
9212 .
9213 The bctr is not predicted taken due to ctr not being
9214 ready, so prefetch continues on past the bctr into the
9215 new page which might have stale instructions. If they
9216 fail to be flushed, then they will be executed after the
9217 bctr executes. Either of the following modifications
9218 prevent the bad prefetch from happening in the first
9219 place:
9220 .
9221 . lis 9,new_page@ha lis 9,new_page@ha
9222 . addi 9,9,new_page@l addi 9,9,new_page@l
9223 . mtctr 9 mtctr 9
9224 . bctr bctr
9225 . nop b somewhere_else
9226 . b somewhere_else nop
9227 . new_page: new_page:
9228 . */
9247 {
9250 /* If the insn we are patching had a reloc, adjust the
9251 reloc r_offset so that the reloc applies to the moved
9252 location. This matters for -r and --emit-relocs. */
9254 {
9257 /* Keep the relocs sorted by r_offset. */
9260 }
9263 /* Adjust REL16 addends too. */
9265 {
9274 }
9276 /* If we are building a PIE or shared library with
9277 non-PIC objects, perhaps we had a dynamic reloc too?
9278 If so, the dynamic reloc must move with the insn. */
9281 {
9283 bfd_vma soffset;
9290 {
9298 else
9299 {
9301 {
9305 }
9310 }
9311 }
9312 }
9313 }
9314 else
9319 {
9326 {
9334 else
9342 }
9344 {
9353 }
9354 else
9355 {
9357 {
9362 }
9375 }
9376 }
9377 else
9378 {
9385 }
9388 }
9389 }
9392 }
9393 \f
9394 /* Write out the PLT relocs and entries for H. */
9396 static bfd_boolean
9398 {
9402 bfd_boolean doneone;
9407 {
9409 {
9410 Elf_Internal_Rela rela;
9412 bfd_vma reloc_index;
9420 else
9421 {
9427 }
9429 /* This symbol has an entry in the procedure linkage table.
9430 Set it up. */
9434 {
9435 bfd_vma got_offset;
9438 /* The first three entries in .got.plt are reserved. */
9441 /* Use the right PLT. */
9445 /* Fill in the .plt on VxWorks. */
9447 {
9454 }
9455 else
9456 {
9465 }
9472 /* This instruction is an immediate load. The value loaded is
9473 the byte offset of the R_PPC_JMP_SLOT relocation from the
9474 start of the .rela.plt section. The value is stored in the
9475 low-order 16 bits of the load instruction. */
9476 /* NOTE: It appears that this is now an index rather than a
9477 prescaled offset. */
9481 /* This instruction is a PC-relative branch whose target is
9482 the start of the PLT section. The address of this branch
9483 instruction is 20 bytes beyond the start of this PLT entry.
9484 The address is encoded in bits 6-29, inclusive. The value
9485 stored is right-shifted by two bits, permitting a 26-bit
9486 offset. */
9496 /* Fill in the GOT entry corresponding to this PLT slot with
9497 the address immediately after the "bctr" instruction
9498 in this PLT entry. */
9505 {
9506 /* Fill in a couple of entries in .rela.plt.unloaded. */
9512 /* Provide the @ha relocation for the first instruction. */
9517 R_PPC_ADDR16_HA);
9522 /* Provide the @l relocation for the second instruction. */
9527 R_PPC_ADDR16_LO);
9532 /* Provide a relocation for the GOT entry corresponding to this
9533 PLT slot. Point it at the middle of the .plt entry. */
9538 R_PPC_ADDR32);
9541 }
9543 /* VxWorks uses non-standard semantics for R_PPC_JMP_SLOT.
9544 In particular, the offset for the relocation is not the
9545 address of the PLT entry for this function, as specified
9546 by the ABI. Instead, the offset is set to the address of
9547 the GOT slot for this function. See EABI 4.4.4.1. */
9552 }
9553 else
9554 {
9558 {
9560 {
9563 }
9564 else
9565 {
9568 }
9573 }
9576 {
9579 }
9580 else
9581 {
9589 {
9590 /* We don't need to fill in the .plt. The ppc dynamic
9591 linker will fill it in. */
9592 }
9593 else
9594 {
9600 }
9601 }
9602 }
9605 {
9606 /* Fill in the entry in the .rela.plt section. */
9609 {
9612 else
9617 }
9618 else
9619 {
9625 }
9627 }
9629 }
9634 {
9640 {
9643 else
9645 }
9651 /* We only need one non-PIC glink stub. */
9653 }
9654 else
9656 }
9658 }
9660 /* Finish up PLT handling. */
9662 bfd_boolean
9664 {
9674 {
9678 bfd_size_type locsymcount;
9696 {
9698 {
9703 bfd_vma val;
9704 Elf_Internal_Rela rela;
9709 {
9714 }
9721 {
9726 }
9727 else
9728 {
9731 {
9734 }
9735 else
9736 {
9740 }
9741 }
9753 }
9754 }
9758 {
9761 else
9763 }
9764 }
9766 }
9768 /* Finish up dynamic symbol handling. We set the contents of various
9769 dynamic sections here. */
9771 static bfd_boolean
9776 {
9780 #ifdef DEBUG
9783 #endif
9789 {
9791 {
9792 /* Mark the symbol as undefined, rather than as
9793 defined in the .plt section. Leave the value if
9794 there were any relocations where pointer equality
9795 matters (this is a clue for the dynamic linker, to
9796 make function pointer comparisons work between an
9797 application and shared library), otherwise set it
9798 to zero. */
9803 {
9804 /* This breaks function pointer comparisons, but
9805 that is better than breaking tests for a NULL
9806 function pointer. */
9808 }
9809 }
9810 else
9811 {
9812 /* Set the value of ifunc symbols in a non-pie
9813 executable to the glink entry. This is to avoid
9814 text relocations. We can't do this for ifunc in
9815 allocate_dynrelocs, as we do for normal dynamic
9816 function symbols with plt entries, because we need
9817 to keep the original value around for the ifunc
9818 relocation. */
9819 sym->st_shndx
9820 = (_bfd_elf_section_from_bfd_section
9825 }
9827 }
9830 {
9832 Elf_Internal_Rela rela;
9835 /* This symbols needs a copy reloc. Set it up. */
9837 #ifdef DEBUG
9839 #endif
9847 else
9856 }
9858 #ifdef DEBUG
9860 #endif
9863 }
9864 \f
9865 static enum elf_reloc_type_class
9869 {
9876 {
9885 }
9886 }
9887 \f
9888 /* Finish up the dynamic sections. */
9890 static bfd_boolean
9893 {
9896 bfd_vma got;
9900 #ifdef DEBUG
9902 #endif
9913 {
9921 {
9922 Elf_Internal_Dyn dyn;
9928 {
9932 else
9966 }
9969 }
9970 }
9974 {
9977 {
9982 {
9983 /* Add a blrl instruction at _GLOBAL_OFFSET_TABLE_-4
9984 so that a function can easily find the address of
9985 _GLOBAL_OFFSET_TABLE_. */
9989 }
9992 {
9997 }
9998 }
9999 else
10000 {
10001 /* xgettext:c-format */
10008 }
10011 }
10013 /* Fill in the first entry in the VxWorks procedure linkage table. */
10018 {
10020 /* Use the right PLT. */
10022 ? ppc_elf_vxworks_pic_plt0_entry
10026 {
10033 }
10034 else
10035 {
10038 }
10047 {
10048 Elf_Internal_Rela rela;
10053 /* Output the @ha relocation for the first instruction. */
10062 /* Output the @l relocation for the second instruction. */
10071 /* Fix up the remaining relocations. They may have the wrong
10072 symbol index for _G_O_T_ or _P_L_T_ depending on the order
10073 in which symbols were output. */
10075 {
10076 Elf_Internal_Rela rel;
10092 }
10093 }
10094 }
10099 {
10102 bfd_vma res0;
10104 /*
10105 * PIC glink code is the following:
10106 *
10107 * # ith PLT code stub.
10108 * addis 11,30,(plt+(i-1)*4-got)@ha
10109 * lwz 11,(plt+(i-1)*4-got)@l(11)
10110 * mtctr 11
10111 * bctr
10112 *
10113 * # A table of branches, one for each plt entry.
10114 * # The idea is that the plt call stub loads ctr and r11 with these
10115 * # addresses, so (r11 - res_0) gives the plt index * 4.
10116 * res_0: b PLTresolve
10117 * res_1: b PLTresolve
10118 * .
10119 * # Some number of entries towards the end can be nops
10120 * res_n_m3: nop
10121 * res_n_m2: nop
10122 * res_n_m1:
10123 *
10124 * PLTresolve:
10125 * addis 11,11,(1f-res_0)@ha
10126 * mflr 0
10127 * bcl 20,31,1f
10128 * 1: addi 11,11,(1b-res_0)@l
10129 * mflr 12
10130 * mtlr 0
10131 * sub 11,11,12 # r11 = index * 4
10132 * addis 12,12,(got+4-1b)@ha
10133 * lwz 0,(got+4-1b)@l(12) # got[1] address of dl_runtime_resolve
10134 * lwz 12,(got+8-1b)@l(12) # got[2] contains the map address
10135 * mtctr 0
10136 * add 0,11,11
10137 * add 11,0,11 # r11 = index * 12 = reloc offset.
10138 * bctr
10139 *
10140 * Non-PIC glink code is a little simpler.
10141 *
10142 * # ith PLT code stub.
10143 * lis 11,(plt+(i-1)*4)@ha
10144 * lwz 11,(plt+(i-1)*4)@l(11)
10145 * mtctr 11
10146 * bctr
10147 *
10148 * The branch table is the same, then comes
10149 *
10150 * PLTresolve:
10151 * lis 12,(got+4)@ha
10152 * addis 11,11,(-res_0)@ha
10153 * lwz 0,(got+4)@l(12) # got[1] address of dl_runtime_resolve
10154 * addi 11,11,(-res_0)@l # r11 = index * 4
10155 * mtctr 0
10156 * add 0,11,11
10157 * lwz 12,(got+8)@l(12) # got[2] contains the map address
10158 * add 11,0,11 # r11 = index * 12 = reloc offset.
10159 * bctr
10160 */
10162 /* Build the branch table, one for each plt entry (less one),
10163 and perhaps some padding. */
10169 {
10172 }
10174 {
10177 }
10184 {
10185 /* Ensure that a call stub at the end of a page doesn't
10186 result in prefetch over the end of the page into the
10187 glink branch table. */
10189 bfd_vma page_addr;
10196 {
10197 /* We have a plt call stub that may need fixing. */
10204 {
10205 /* By alignment, we know that there must be at least
10206 one other call stub before this one. */
10210 else
10212 }
10213 }
10214 }
10216 /* Last comes the PLTresolve stub. */
10219 {
10220 bfd_vma bcl;
10243 {
10248 }
10249 else
10250 {
10255 }
10259 }
10260 else
10261 {
10268 else
10279 else
10281 }
10288 {
10292 }
10294 }
10298 {
10300 bfd_vma val;
10303 /* FDE length. */
10305 /* CIE pointer. */
10307 /* Offset to .glink. */
10320 }
10323 }
10324 \f
10325 #define TARGET_LITTLE_SYM powerpc_elf32_le_vec
10327 #define TARGET_BIG_SYM powerpc_elf32_vec
10329 #define ELF_ARCH bfd_arch_powerpc
10330 #define ELF_TARGET_ID PPC32_ELF_DATA
10331 #define ELF_MACHINE_CODE EM_PPC
10332 #define ELF_MAXPAGESIZE 0x10000
10333 #define ELF_COMMONPAGESIZE 0x1000
10334 #define ELF_RELROPAGESIZE ELF_MAXPAGESIZE
10335 #define elf_info_to_howto ppc_elf_info_to_howto
10337 #ifdef EM_CYGNUS_POWERPC
10338 #define ELF_MACHINE_ALT1 EM_CYGNUS_POWERPC
10339 #endif
10341 #ifdef EM_PPC_OLD
10342 #define ELF_MACHINE_ALT2 EM_PPC_OLD
10343 #endif
10345 #define elf_backend_plt_not_loaded 1
10346 #define elf_backend_want_dynrelro 1
10347 #define elf_backend_can_gc_sections 1
10348 #define elf_backend_can_refcount 1
10349 #define elf_backend_rela_normal 1
10350 #define elf_backend_caches_rawsize 1
10352 #define bfd_elf32_mkobject ppc_elf_mkobject
10353 #define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
10354 #define bfd_elf32_bfd_relax_section ppc_elf_relax_section
10355 #define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
10356 #define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
10357 #define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
10358 #define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
10359 #define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
10361 #define elf_backend_object_p ppc_elf_object_p
10362 #define elf_backend_gc_mark_hook ppc_elf_gc_mark_hook
10363 #define elf_backend_section_from_shdr ppc_elf_section_from_shdr
10364 #define elf_backend_relocate_section ppc_elf_relocate_section
10365 #define elf_backend_create_dynamic_sections ppc_elf_create_dynamic_sections
10366 #define elf_backend_check_relocs ppc_elf_check_relocs
10367 #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible
10368 #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol
10369 #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol
10370 #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook
10371 #define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections
10372 #define elf_backend_hash_symbol ppc_elf_hash_symbol
10373 #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol
10374 #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
10375 #define elf_backend_fake_sections ppc_elf_fake_sections
10376 #define elf_backend_additional_program_headers ppc_elf_additional_program_headers
10377 #define elf_backend_modify_segment_map ppc_elf_modify_segment_map
10378 #define elf_backend_grok_prstatus ppc_elf_grok_prstatus
10379 #define elf_backend_grok_psinfo ppc_elf_grok_psinfo
10380 #define elf_backend_write_core_note ppc_elf_write_core_note
10381 #define elf_backend_reloc_type_class ppc_elf_reloc_type_class
10382 #define elf_backend_begin_write_processing ppc_elf_begin_write_processing
10383 #define elf_backend_final_write_processing ppc_elf_final_write_processing
10384 #define elf_backend_write_section ppc_elf_write_section
10385 #define elf_backend_get_sec_type_attr ppc_elf_get_sec_type_attr
10386 #define elf_backend_plt_sym_val ppc_elf_plt_sym_val
10387 #define elf_backend_action_discarded ppc_elf_action_discarded
10388 #define elf_backend_init_index_section _bfd_elf_init_1_index_section
10389 #define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
10393 /* FreeBSD Target */
10395 #undef TARGET_LITTLE_SYM
10396 #undef TARGET_LITTLE_NAME
10398 #undef TARGET_BIG_SYM
10399 #define TARGET_BIG_SYM powerpc_elf32_fbsd_vec
10400 #undef TARGET_BIG_NAME
10403 #undef ELF_OSABI
10404 #define ELF_OSABI ELFOSABI_FREEBSD
10406 #undef elf32_bed
10407 #define elf32_bed elf32_powerpc_fbsd_bed
10411 /* VxWorks Target */
10413 #undef TARGET_LITTLE_SYM
10414 #undef TARGET_LITTLE_NAME
10416 #undef TARGET_BIG_SYM
10417 #define TARGET_BIG_SYM powerpc_elf32_vxworks_vec
10418 #undef TARGET_BIG_NAME
10421 #undef ELF_OSABI
10423 /* VxWorks uses the elf default section flags for .plt. */
10426 {
10434 }
10436 /* Like ppc_elf_link_hash_table_create, but overrides
10437 appropriately for VxWorks. */
10440 {
10445 {
10453 }
10455 }
10457 /* Tweak magic VxWorks symbols as they are loaded. */
10458 static bfd_boolean
10466 {
10468 valp))
10472 }
10474 static void
10476 {
10479 }
10481 /* On VxWorks, we emit relocations against _PROCEDURE_LINKAGE_TABLE_, so
10482 define it. */
10483 #undef elf_backend_want_plt_sym
10484 #define elf_backend_want_plt_sym 1
10485 #undef elf_backend_want_got_plt
10486 #define elf_backend_want_got_plt 1
10487 #undef elf_backend_got_symbol_offset
10488 #define elf_backend_got_symbol_offset 0
10489 #undef elf_backend_plt_not_loaded
10490 #define elf_backend_plt_not_loaded 0
10491 #undef elf_backend_plt_readonly
10492 #define elf_backend_plt_readonly 1
10493 #undef elf_backend_got_header_size
10494 #define elf_backend_got_header_size 12
10495 #undef elf_backend_dtrel_excludes_plt
10496 #define elf_backend_dtrel_excludes_plt 1
10498 #undef bfd_elf32_get_synthetic_symtab
10500 #undef bfd_elf32_bfd_link_hash_table_create
10501 #define bfd_elf32_bfd_link_hash_table_create \
10502 ppc_elf_vxworks_link_hash_table_create
10503 #undef elf_backend_add_symbol_hook
10504 #define elf_backend_add_symbol_hook \
10505 ppc_elf_vxworks_add_symbol_hook
10506 #undef elf_backend_link_output_symbol_hook
10507 #define elf_backend_link_output_symbol_hook \
10508 elf_vxworks_link_output_symbol_hook
10509 #undef elf_backend_final_write_processing
10510 #define elf_backend_final_write_processing \
10511 ppc_elf_vxworks_final_write_processing
10512 #undef elf_backend_get_sec_type_attr
10513 #define elf_backend_get_sec_type_attr \
10514 ppc_elf_vxworks_get_sec_type_attr
10515 #undef elf_backend_emit_relocs
10516 #define elf_backend_emit_relocs \
10517 elf_vxworks_emit_relocs
10519 #undef elf32_bed
10520 #define elf32_bed ppc_elf_vxworks_bed
10521 #undef elf_backend_post_process_headers