opcodes/m68k-dis.c

   1 /* Print Motorola 68k instructions.
   2    Copyright (C) 1986-2019 Free Software Foundation, Inc.
   3
   4    This file is part of the GNU opcodes library.
   5
   6    This library is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3, or (at your option)
   9    any later version.
  10
  11    It is distributed in the hope that it will be useful, but WITHOUT
  12    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  14    License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  19    MA 02110-1301, USA.  */
  20
  21 #include "sysdep.h"
  22 #include "disassemble.h"
  23 #include "floatformat.h"
  24 #include "libiberty.h"
  25 #include "opintl.h"
  26
  27 #include "opcode/m68k.h"
  28
  29 /* Local function prototypes.  */
  30
  31 const char * const fpcr_names[] =
  32 {
  33   "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
  34   "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
  35 };
  36
  37 static char *const reg_names[] =
  38 {
  39   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
  40   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
  41   "%ps", "%pc"
  42 };
  43
  44 /* Name of register halves for MAC/EMAC.
  45    Seperate from reg_names since 'spu', 'fpl' look weird.  */
  46 static char *const reg_half_names[] =
  47 {
  48   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
  49   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
  50   "%ps", "%pc"
  51 };
  52
  53 /* Sign-extend an (unsigned char).  */
  54 #if __STDC__ == 1
  55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
  56 #else
  57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
  58 #endif
  59
  60 /* Error code of print_insn_arg's return value.  */
  61
  62 enum print_insn_arg_error
  63   {
  64     /* An invalid operand is found.  */
  65     PRINT_INSN_ARG_INVALID_OPERAND = -1,
  66
  67     /* An opcode table error.  */
  68     PRINT_INSN_ARG_INVALID_OP_TABLE = -2,
  69
  70     /* A memory error.  */
  71     PRINT_INSN_ARG_MEMORY_ERROR = -3,
  72   };
  73
  74 /* Get a 1 byte signed integer.  */
  75 #define NEXTBYTE(p, val)                        \
  76   do                                            \
  77     {                                           \
  78       p += 2;                                   \
  79       if (!FETCH_DATA (info, p))                \
  80         return PRINT_INSN_ARG_MEMORY_ERROR;     \
  81       val = COERCE_SIGNED_CHAR (p[-1]);         \
  82     }                                           \
  83   while (0)
  84
  85 /* Get a 2 byte signed integer.  */
  86 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
  87
  88 #define NEXTWORD(p, val, ret_val)               \
  89   do                                            \
  90     {                                           \
  91       p += 2;                                   \
  92       if (!FETCH_DATA (info, p))                \
  93         return ret_val;                         \
  94       val = COERCE16 ((p[-2] << 8) + p[-1]);    \
  95     }                                           \
  96   while (0)
  97
  98 /* Get a 4 byte signed integer.  */
  99 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
 100
 101 #define NEXTLONG(p, val, ret_val)                                       \
 102   do                                                                    \
 103     {                                                                   \
 104       p += 4;                                                           \
 105       if (!FETCH_DATA (info, p))                                        \
 106         return ret_val;                                                 \
 107       val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
 108     }                                                                   \
 109   while (0)
 110
 111 /* Get a 4 byte unsigned integer.  */
 112 #define NEXTULONG(p, val)                                               \
 113   do                                                                    \
 114     {                                                                   \
 115       p += 4;                                                           \
 116       if (!FETCH_DATA (info, p))                                        \
 117         return PRINT_INSN_ARG_MEMORY_ERROR;                             \
 118       val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
 119     }                                                                   \
 120   while (0)
 121
 122 /* Get a single precision float.  */
 123 #define NEXTSINGLE(val, p)                                      \
 124   do                                                            \
 125     {                                                           \
 126       p += 4;                                                   \
 127       if (!FETCH_DATA (info, p))                                \
 128         return PRINT_INSN_ARG_MEMORY_ERROR;                     \
 129       floatformat_to_double (& floatformat_ieee_single_big,     \
 130                              (char *) p - 4, & val);            \
 131     }                                                           \
 132   while (0)
 133
 134 /* Get a double precision float.  */
 135 #define NEXTDOUBLE(val, p)                                      \
 136   do                                                            \
 137     {                                                           \
 138       p += 8;                                                   \
 139       if (!FETCH_DATA (info, p))                                \
 140         return PRINT_INSN_ARG_MEMORY_ERROR;                     \
 141       floatformat_to_double (& floatformat_ieee_double_big,     \
 142                              (char *) p - 8, & val);            \
 143     }                                                           \
 144   while (0)
 145
 146 /* Get an extended precision float.  */
 147 #define NEXTEXTEND(val, p)                              \
 148   do                                                    \
 149     {                                                   \
 150       p += 12;                                          \
 151       if (!FETCH_DATA (info, p))                        \
 152         return PRINT_INSN_ARG_MEMORY_ERROR;             \
 153       floatformat_to_double (& floatformat_m68881_ext,  \
 154                              (char *) p - 12, & val);   \
 155     }                                                   \
 156   while (0)
 157
 158 /* Need a function to convert from packed to double
 159    precision.   Actually, it's easier to print a
 160    packed number than a double anyway, so maybe
 161    there should be a special case to handle this... */
 162 #define NEXTPACKED(p, val)                      \
 163   do                                            \
 164     {                                           \
 165       p += 12;                                  \
 166       if (!FETCH_DATA (info, p))                \
 167         return PRINT_INSN_ARG_MEMORY_ERROR;     \
 168       val = 0.0;                                \
 169     }                                           \
 170   while (0)
 171
 172 \f
 173 /* Maximum length of an instruction.  */
 174 #define MAXLEN 22
 175
 176 struct private
 177 {
 178   /* Points to first byte not fetched.  */
 179   bfd_byte *max_fetched;
 180   bfd_byte the_buffer[MAXLEN];
 181   bfd_vma insn_start;
 182 };
 183
 184 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 185    to ADDR (exclusive) are valid.  Returns 1 for success, 0 on memory
 186    error.  */
 187 #define FETCH_DATA(info, addr) \
 188   ((addr) <= ((struct private *) (info->private_data))->max_fetched \
 189    ? 1 : fetch_data ((info), (addr)))
 190
 191 static int
 192 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 193 {
 194   int status;
 195   struct private *priv = (struct private *)info->private_data;
 196   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 197
 198   status = (*info->read_memory_func) (start,
 199                                       priv->max_fetched,
 200                                       addr - priv->max_fetched,
 201                                       info);
 202   if (status != 0)
 203     {
 204       (*info->memory_error_func) (status, start, info);
 205       return 0;
 206     }
 207   else
 208     priv->max_fetched = addr;
 209   return 1;
 210 }
 211 \f
 212 /* This function is used to print to the bit-bucket.  */
 213 static int
 214 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
 215                const char *format ATTRIBUTE_UNUSED,
 216                ...)
 217 {
 218   return 0;
 219 }
 220
 221 static void
 222 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
 223                      struct disassemble_info *info ATTRIBUTE_UNUSED)
 224 {
 225 }
 226
 227 /* Fetch BITS bits from a position in the instruction specified by CODE.
 228    CODE is a "place to put an argument", or 'x' for a destination
 229    that is a general address (mode and register).
 230    BUFFER contains the instruction.
 231    Returns -1 on failure.  */
 232
 233 static int
 234 fetch_arg (unsigned char *buffer,
 235            int code,
 236            int bits,
 237            disassemble_info *info)
 238 {
 239   int val = 0;
 240
 241   switch (code)
 242     {
 243     case '/': /* MAC/EMAC mask bit.  */
 244       val = buffer[3] >> 5;
 245       break;
 246
 247     case 'G': /* EMAC ACC load.  */
 248       val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
 249       break;
 250
 251     case 'H': /* EMAC ACC !load.  */
 252       val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
 253       break;
 254
 255     case ']': /* EMAC ACCEXT bit.  */
 256       val = buffer[0] >> 2;
 257       break;
 258
 259     case 'I': /* MAC/EMAC scale factor.  */
 260       val = buffer[2] >> 1;
 261       break;
 262
 263     case 'F': /* EMAC ACCx.  */
 264       val = buffer[0] >> 1;
 265       break;
 266
 267     case 'f':
 268       val = buffer[1];
 269       break;
 270
 271     case 's':
 272       val = buffer[1];
 273       break;
 274
 275     case 'd':                   /* Destination, for register or quick.  */
 276       val = (buffer[0] << 8) + buffer[1];
 277       val >>= 9;
 278       break;
 279
 280     case 'x':                   /* Destination, for general arg.  */
 281       val = (buffer[0] << 8) + buffer[1];
 282       val >>= 6;
 283       break;
 284
 285     case 'k':
 286       if (! FETCH_DATA (info, buffer + 3))
 287         return -1;
 288       val = (buffer[3] >> 4);
 289       break;
 290
 291     case 'C':
 292       if (! FETCH_DATA (info, buffer + 3))
 293         return -1;
 294       val = buffer[3];
 295       break;
 296
 297     case '1':
 298       if (! FETCH_DATA (info, buffer + 3))
 299         return -1;
 300       val = (buffer[2] << 8) + buffer[3];
 301       val >>= 12;
 302       break;
 303
 304     case '2':
 305       if (! FETCH_DATA (info, buffer + 3))
 306         return -1;
 307       val = (buffer[2] << 8) + buffer[3];
 308       val >>= 6;
 309       break;
 310
 311     case '3':
 312     case 'j':
 313       if (! FETCH_DATA (info, buffer + 3))
 314         return -1;
 315       val = (buffer[2] << 8) + buffer[3];
 316       break;
 317
 318     case '4':
 319       if (! FETCH_DATA (info, buffer + 5))
 320         return -1;
 321       val = (buffer[4] << 8) + buffer[5];
 322       val >>= 12;
 323       break;
 324
 325     case '5':
 326       if (! FETCH_DATA (info, buffer + 5))
 327         return -1;
 328       val = (buffer[4] << 8) + buffer[5];
 329       val >>= 6;
 330       break;
 331
 332     case '6':
 333       if (! FETCH_DATA (info, buffer + 5))
 334         return -1;
 335       val = (buffer[4] << 8) + buffer[5];
 336       break;
 337
 338     case '7':
 339       if (! FETCH_DATA (info, buffer + 3))
 340         return -1;
 341       val = (buffer[2] << 8) + buffer[3];
 342       val >>= 7;
 343       break;
 344
 345     case '8':
 346       if (! FETCH_DATA (info, buffer + 3))
 347         return -1;
 348       val = (buffer[2] << 8) + buffer[3];
 349       val >>= 10;
 350       break;
 351
 352     case '9':
 353       if (! FETCH_DATA (info, buffer + 3))
 354         return -1;
 355       val = (buffer[2] << 8) + buffer[3];
 356       val >>= 5;
 357       break;
 358
 359     case 'e':
 360       val = (buffer[1] >> 6);
 361       break;
 362
 363     case 'E':
 364       if (! FETCH_DATA (info, buffer + 3))
 365         return -1;
 366       val = (buffer[2] >> 1);
 367       break;
 368
 369     case 'm':
 370       val = (buffer[1] & 0x40 ? 0x8 : 0)
 371         | ((buffer[0] >> 1) & 0x7)
 372         | (buffer[3] & 0x80 ? 0x10 : 0);
 373       break;
 374
 375     case 'n':
 376       val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
 377       break;
 378
 379     case 'o':
 380       val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
 381       break;
 382
 383     case 'M':
 384       val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
 385       break;
 386
 387     case 'N':
 388       val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
 389       break;
 390
 391     case 'h':
 392       val = buffer[2] >> 2;
 393       break;
 394
 395     default:
 396       abort ();
 397     }
 398
 399   /* bits is never too big.  */
 400   return val & ((1 << bits) - 1);
 401 }
 402
 403 /* Check if an EA is valid for a particular code.  This is required
 404    for the EMAC instructions since the type of source address determines
 405    if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
 406    is a non-load EMAC instruction and the bits mean register Ry.
 407    A similar case exists for the movem instructions where the register
 408    mask is interpreted differently for different EAs.  */
 409
 410 static bfd_boolean
 411 m68k_valid_ea (char code, int val)
 412 {
 413   int mode, mask;
 414 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
 415   (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
 416    | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
 417
 418   switch (code)
 419     {
 420     case '*':
 421       mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
 422       break;
 423     case '~':
 424       mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
 425       break;
 426     case '%':
 427       mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
 428       break;
 429     case ';':
 430       mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
 431       break;
 432     case '@':
 433       mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
 434       break;
 435     case '!':
 436       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
 437       break;
 438     case '&':
 439       mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
 440       break;
 441     case '$':
 442       mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
 443       break;
 444     case '?':
 445       mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
 446       break;
 447     case '/':
 448       mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
 449       break;
 450     case '|':
 451       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
 452       break;
 453     case '>':
 454       mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
 455       break;
 456     case '<':
 457       mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
 458       break;
 459     case 'm':
 460       mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
 461       break;
 462     case 'n':
 463       mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
 464       break;
 465     case 'o':
 466       mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
 467       break;
 468     case 'p':
 469       mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
 470       break;
 471     case 'q':
 472       mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
 473       break;
 474     case 'v':
 475       mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
 476       break;
 477     case 'b':
 478       mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
 479       break;
 480     case 'w':
 481       mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
 482       break;
 483     case 'y':
 484       mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
 485       break;
 486     case 'z':
 487       mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
 488       break;
 489     case '4':
 490       mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
 491       break;
 492     default:
 493       abort ();
 494     }
 495 #undef M
 496
 497   mode = (val >> 3) & 7;
 498   if (mode == 7)
 499     mode += val & 7;
 500   return (mask & (1 << mode)) != 0;
 501 }
 502
 503 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
 504    REGNO = -1 for pc, -2 for none (suppressed).  */
 505
 506 static void
 507 print_base (int regno, bfd_vma disp, disassemble_info *info)
 508 {
 509   if (regno == -1)
 510     {
 511       (*info->fprintf_func) (info->stream, "%%pc@(");
 512       (*info->print_address_func) (disp, info);
 513     }
 514   else
 515     {
 516       char buf[50];
 517
 518       if (regno == -2)
 519         (*info->fprintf_func) (info->stream, "@(");
 520       else if (regno == -3)
 521         (*info->fprintf_func) (info->stream, "%%zpc@(");
 522       else
 523         (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
 524
 525       sprintf_vma (buf, disp);
 526       (*info->fprintf_func) (info->stream, "%s", buf);
 527     }
 528 }
 529
 530 /* Print an indexed argument.  The base register is BASEREG (-1 for pc).
 531    P points to extension word, in buffer.
 532    ADDR is the nominal core address of that extension word.
 533    Returns NULL upon error.  */
 534
 535 static unsigned char *
 536 print_indexed (int basereg,
 537                unsigned char *p,
 538                bfd_vma addr,
 539                disassemble_info *info)
 540 {
 541   int word;
 542   static char *const scales[] = { "", ":2", ":4", ":8" };
 543   bfd_vma base_disp;
 544   bfd_vma outer_disp;
 545   char buf[40];
 546   char vmabuf[50];
 547
 548   NEXTWORD (p, word, NULL);
 549
 550   /* Generate the text for the index register.
 551      Where this will be output is not yet determined.  */
 552   sprintf (buf, "%s:%c%s",
 553            reg_names[(word >> 12) & 0xf],
 554            (word & 0x800) ? 'l' : 'w',
 555            scales[(word >> 9) & 3]);
 556
 557   /* Handle the 68000 style of indexing.  */
 558
 559   if ((word & 0x100) == 0)
 560     {
 561       base_disp = word & 0xff;
 562       if ((base_disp & 0x80) != 0)
 563         base_disp -= 0x100;
 564       if (basereg == -1)
 565         base_disp += addr;
 566       print_base (basereg, base_disp, info);
 567       (*info->fprintf_func) (info->stream, ",%s)", buf);
 568       return p;
 569     }
 570
 571   /* Handle the generalized kind.  */
 572   /* First, compute the displacement to add to the base register.  */
 573   if (word & 0200)
 574     {
 575       if (basereg == -1)
 576         basereg = -3;
 577       else
 578         basereg = -2;
 579     }
 580   if (word & 0100)
 581     buf[0] = '\0';
 582   base_disp = 0;
 583   switch ((word >> 4) & 3)
 584     {
 585     case 2:
 586       NEXTWORD (p, base_disp, NULL);
 587       break;
 588     case 3:
 589       NEXTLONG (p, base_disp, NULL);
 590     }
 591   if (basereg == -1)
 592     base_disp += addr;
 593
 594   /* Handle single-level case (not indirect).  */
 595   if ((word & 7) == 0)
 596     {
 597       print_base (basereg, base_disp, info);
 598       if (buf[0] != '\0')
 599         (*info->fprintf_func) (info->stream, ",%s", buf);
 600       (*info->fprintf_func) (info->stream, ")");
 601       return p;
 602     }
 603
 604   /* Two level.  Compute displacement to add after indirection.  */
 605   outer_disp = 0;
 606   switch (word & 3)
 607     {
 608     case 2:
 609       NEXTWORD (p, outer_disp, NULL);
 610       break;
 611     case 3:
 612       NEXTLONG (p, outer_disp, NULL);
 613     }
 614
 615   print_base (basereg, base_disp, info);
 616   if ((word & 4) == 0 && buf[0] != '\0')
 617     {
 618       (*info->fprintf_func) (info->stream, ",%s", buf);
 619       buf[0] = '\0';
 620     }
 621   sprintf_vma (vmabuf, outer_disp);
 622   (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
 623   if (buf[0] != '\0')
 624     (*info->fprintf_func) (info->stream, ",%s", buf);
 625   (*info->fprintf_func) (info->stream, ")");
 626
 627   return p;
 628 }
 629
 630 #define FETCH_ARG(size, val)                            \
 631   do                                                    \
 632     {                                                   \
 633       val = fetch_arg (buffer, place, size, info);      \
 634       if (val < 0)                                      \
 635         return PRINT_INSN_ARG_MEMORY_ERROR;             \
 636     }                                                   \
 637   while (0)
 638
 639 /* Returns number of bytes "eaten" by the operand, or
 640    return enum print_insn_arg_error.  ADDR is the pc for this arg to be
 641    relative to.  */
 642
 643 static int
 644 print_insn_arg (const char *d,
 645                 unsigned char *buffer,
 646                 unsigned char *p0,
 647                 bfd_vma addr,
 648                 disassemble_info *info)
 649 {
 650   int val = 0;
 651   int place = d[1];
 652   unsigned char *p = p0;
 653   int regno;
 654   const char *regname;
 655   unsigned char *p1;
 656   double flval;
 657   int flt_p;
 658   bfd_signed_vma disp;
 659   unsigned int uval;
 660
 661   switch (*d)
 662     {
 663     case 'c':           /* Cache identifier.  */
 664       {
 665         static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
 666         FETCH_ARG (2, val);
 667         (*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]);
 668         break;
 669       }
 670
 671     case 'a':           /* Address register indirect only. Cf. case '+'.  */
 672       {
 673         FETCH_ARG (3, val);
 674         (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]);
 675         break;
 676       }
 677
 678     case '_':           /* 32-bit absolute address for move16.  */
 679       {
 680         NEXTULONG (p, uval);
 681         (*info->print_address_func) (uval, info);
 682         break;
 683       }
 684
 685     case 'C':
 686       (*info->fprintf_func) (info->stream, "%%ccr");
 687       break;
 688
 689     case 'S':
 690       (*info->fprintf_func) (info->stream, "%%sr");
 691       break;
 692
 693     case 'U':
 694       (*info->fprintf_func) (info->stream, "%%usp");
 695       break;
 696
 697     case 'E':
 698       (*info->fprintf_func) (info->stream, "%%acc");
 699       break;
 700
 701     case 'G':
 702       (*info->fprintf_func) (info->stream, "%%macsr");
 703       break;
 704
 705     case 'H':
 706       (*info->fprintf_func) (info->stream, "%%mask");
 707       break;
 708
 709     case 'J':
 710       {
 711         /* FIXME: There's a problem here, different m68k processors call the
 712            same address different names.  The tables below try to get it right
 713            using info->mach, but only for v4e.  */
 714         struct regname { char * name; int value; };
 715         static const struct regname names[] =
 716           {
 717             {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
 718             {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
 719             {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
 720             {"%rgpiobar", 0x009}, {"%acr4",0x00c},
 721             {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
 722             {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
 723             {"%msp", 0x803}, {"%isp", 0x804},
 724             {"%pc", 0x80f},
 725             /* Reg c04 is sometimes called flashbar or rambar.
 726                Reg c05 is also sometimes called rambar.  */
 727             {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
 728
 729             /* reg c0e is sometimes called mbar2 or secmbar.
 730                reg c0f is sometimes called mbar.  */
 731             {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
 732
 733             /* Should we be calling this psr like we do in case 'Y'?  */
 734             {"%mmusr",0x805},
 735
 736             {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
 737
 738             /* Fido added these.  */
 739             {"%cac", 0xffe}, {"%mbo", 0xfff}
 740         };
 741         /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least.  */
 742         static const struct regname names_v4e[] =
 743           {
 744             {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
 745             {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
 746           };
 747         unsigned int arch_mask;
 748
 749         arch_mask = bfd_m68k_mach_to_features (info->mach);
 750         FETCH_ARG (12, val);
 751         if (arch_mask & (mcfisa_b | mcfisa_c))
 752           {
 753             for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
 754               if (names_v4e[regno].value == val)
 755                 {
 756                   (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
 757                   break;
 758                 }
 759             if (regno >= 0)
 760               break;
 761           }
 762         for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
 763           if (names[regno].value == val)
 764             {
 765               (*info->fprintf_func) (info->stream, "%s", names[regno].name);
 766               break;
 767             }
 768         if (regno < 0)
 769           (*info->fprintf_func) (info->stream, "0x%x", val);
 770       }
 771       break;
 772
 773     case 'Q':
 774       FETCH_ARG (3, val);
 775       /* 0 means 8, except for the bkpt instruction... */
 776       if (val == 0 && d[1] != 's')
 777         val = 8;
 778       (*info->fprintf_func) (info->stream, "#%d", val);
 779       break;
 780
 781     case 'x':
 782       FETCH_ARG (3, val);
 783       /* 0 means -1.  */
 784       if (val == 0)
 785         val = -1;
 786       (*info->fprintf_func) (info->stream, "#%d", val);
 787       break;
 788
 789     case 'j':
 790       FETCH_ARG (3, val);
 791       (*info->fprintf_func) (info->stream, "#%d", val+1);
 792       break;
 793
 794     case 'K':
 795       FETCH_ARG (9, val);
 796       (*info->fprintf_func) (info->stream, "#%d", val);
 797       break;
 798
 799     case 'M':
 800       if (place == 'h')
 801         {
 802           static char *const scalefactor_name[] = { "<<", ">>" };
 803
 804           FETCH_ARG (1, val);
 805           (*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]);
 806         }
 807       else
 808         {
 809           FETCH_ARG (8, val);
 810           if (val & 0x80)
 811             val = val - 0x100;
 812           (*info->fprintf_func) (info->stream, "#%d", val);
 813         }
 814       break;
 815
 816     case 'T':
 817       FETCH_ARG (4, val);
 818       (*info->fprintf_func) (info->stream, "#%d", val);
 819       break;
 820
 821     case 'D':
 822       FETCH_ARG (3, val);
 823       (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
 824       break;
 825
 826     case 'A':
 827       FETCH_ARG (3, val);
 828       (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]);
 829       break;
 830
 831     case 'R':
 832       FETCH_ARG (4, val);
 833       (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
 834       break;
 835
 836     case 'r':
 837       FETCH_ARG (4, regno);
 838       if (regno > 7)
 839         (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
 840       else
 841         (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
 842       break;
 843
 844     case 'F':
 845       FETCH_ARG (3, val);
 846       (*info->fprintf_func) (info->stream, "%%fp%d", val);
 847       break;
 848
 849     case 'O':
 850       FETCH_ARG (6, val);
 851       if (val & 0x20)
 852         (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
 853       else
 854         (*info->fprintf_func) (info->stream, "%d", val);
 855       break;
 856
 857     case '+':
 858       FETCH_ARG (3, val);
 859       (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]);
 860       break;
 861
 862     case '-':
 863       FETCH_ARG (3, val);
 864       (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]);
 865       break;
 866
 867     case 'k':
 868       if (place == 'k')
 869         {
 870           FETCH_ARG (3, val);
 871           (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]);
 872         }
 873       else if (place == 'C')
 874         {
 875           FETCH_ARG (7, val);
 876           if (val > 63)         /* This is a signed constant.  */
 877             val -= 128;
 878           (*info->fprintf_func) (info->stream, "{#%d}", val);
 879         }
 880       else
 881         return PRINT_INSN_ARG_INVALID_OPERAND;
 882       break;
 883
 884     case '#':
 885     case '^':
 886       p1 = buffer + (*d == '#' ? 2 : 4);
 887       if (place == 's')
 888         FETCH_ARG (4, val);
 889       else if (place == 'C')
 890         FETCH_ARG (7, val);
 891       else if (place == '8')
 892         FETCH_ARG (3, val);
 893       else if (place == '3')
 894         FETCH_ARG (8, val);
 895       else if (place == 'b')
 896         NEXTBYTE (p1, val);
 897       else if (place == 'w' || place == 'W')
 898         NEXTWORD (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
 899       else if (place == 'l')
 900         NEXTLONG (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
 901       else
 902         return PRINT_INSN_ARG_INVALID_OP_TABLE;
 903
 904       (*info->fprintf_func) (info->stream, "#%d", val);
 905       break;
 906
 907     case 'B':
 908       if (place == 'b')
 909         NEXTBYTE (p, disp);
 910       else if (place == 'B')
 911         disp = COERCE_SIGNED_CHAR (buffer[1]);
 912       else if (place == 'w' || place == 'W')
 913         NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 914       else if (place == 'l' || place == 'L' || place == 'C')
 915         NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 916       else if (place == 'g')
 917         {
 918           NEXTBYTE (buffer, disp);
 919           if (disp == 0)
 920             NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 921           else if (disp == -1)
 922             NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 923         }
 924       else if (place == 'c')
 925         {
 926           if (buffer[1] & 0x40)         /* If bit six is one, long offset.  */
 927             NEXTLONG (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 928           else
 929             NEXTWORD (p, disp, PRINT_INSN_ARG_MEMORY_ERROR);
 930         }
 931       else
 932         return PRINT_INSN_ARG_INVALID_OP_TABLE;
 933
 934       (*info->print_address_func) (addr + disp, info);
 935       break;
 936
 937     case 'd':
 938       {
 939         int val1;
 940
 941         NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
 942         FETCH_ARG (3, val1);
 943         (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val);
 944         break;
 945       }
 946
 947     case 's':
 948       FETCH_ARG (3, val);
 949       (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
 950       break;
 951
 952     case 'e':
 953       FETCH_ARG (2, val);
 954       (*info->fprintf_func) (info->stream, "%%acc%d", val);
 955       break;
 956
 957     case 'g':
 958       FETCH_ARG (1, val);
 959       (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23");
 960       break;
 961
 962     case 'i':
 963       FETCH_ARG (2, val);
 964       if (val == 1)
 965         (*info->fprintf_func) (info->stream, "<<");
 966       else if (val == 3)
 967         (*info->fprintf_func) (info->stream, ">>");
 968       else
 969         return PRINT_INSN_ARG_INVALID_OPERAND;
 970       break;
 971
 972     case 'I':
 973       /* Get coprocessor ID... */
 974       val = fetch_arg (buffer, 'd', 3, info);
 975       if (val < 0)
 976         return PRINT_INSN_ARG_MEMORY_ERROR;
 977       if (val != 1)                             /* Unusual coprocessor ID?  */
 978         (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
 979       break;
 980
 981     case '4':
 982     case '*':
 983     case '~':
 984     case '%':
 985     case ';':
 986     case '@':
 987     case '!':
 988     case '$':
 989     case '?':
 990     case '/':
 991     case '&':
 992     case '|':
 993     case '<':
 994     case '>':
 995     case 'm':
 996     case 'n':
 997     case 'o':
 998     case 'p':
 999     case 'q':
1000     case 'v':
1001     case 'b':
1002     case 'w':
1003     case 'y':
1004     case 'z':
1005       if (place == 'd')
1006         {
1007           val = fetch_arg (buffer, 'x', 6, info);
1008           if (val < 0)
1009             return PRINT_INSN_ARG_MEMORY_ERROR;
1010           val = ((val & 7) << 3) + ((val >> 3) & 7);
1011         }
1012       else
1013         {
1014           val = fetch_arg (buffer, 's', 6, info);
1015           if (val < 0)
1016             return PRINT_INSN_ARG_MEMORY_ERROR;
1017         }
1018
1019       /* If the <ea> is invalid for *d, then reject this match.  */
1020       if (!m68k_valid_ea (*d, val))
1021         return PRINT_INSN_ARG_INVALID_OPERAND;
1022
1023       /* Get register number assuming address register.  */
1024       regno = (val & 7) + 8;
1025       regname = reg_names[regno];
1026       switch (val >> 3)
1027         {
1028         case 0:
1029           (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1030           break;
1031
1032         case 1:
1033           (*info->fprintf_func) (info->stream, "%s", regname);
1034           break;
1035
1036         case 2:
1037           (*info->fprintf_func) (info->stream, "%s@", regname);
1038           break;
1039
1040         case 3:
1041           (*info->fprintf_func) (info->stream, "%s@+", regname);
1042           break;
1043
1044         case 4:
1045           (*info->fprintf_func) (info->stream, "%s@-", regname);
1046           break;
1047
1048         case 5:
1049           NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1050           (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1051           break;
1052
1053         case 6:
1054           p = print_indexed (regno, p, addr, info);
1055           if (p == NULL)
1056             return PRINT_INSN_ARG_MEMORY_ERROR;
1057           break;
1058
1059         case 7:
1060           switch (val & 7)
1061             {
1062             case 0:
1063               NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1064               (*info->print_address_func) (val, info);
1065               break;
1066
1067             case 1:
1068               NEXTULONG (p, uval);
1069               (*info->print_address_func) (uval, info);
1070               break;
1071
1072             case 2:
1073               NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1074               (*info->fprintf_func) (info->stream, "%%pc@(");
1075               (*info->print_address_func) (addr + val, info);
1076               (*info->fprintf_func) (info->stream, ")");
1077               break;
1078
1079             case 3:
1080               p = print_indexed (-1, p, addr, info);
1081               if (p == NULL)
1082                 return PRINT_INSN_ARG_MEMORY_ERROR;
1083               break;
1084
1085             case 4:
1086               flt_p = 1;        /* Assume it's a float... */
1087               switch (place)
1088               {
1089                 case 'b':
1090                   NEXTBYTE (p, val);
1091                   flt_p = 0;
1092                   break;
1093
1094                 case 'w':
1095                   NEXTWORD (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1096                   flt_p = 0;
1097                   break;
1098
1099                 case 'l':
1100                   NEXTLONG (p, val, PRINT_INSN_ARG_MEMORY_ERROR);
1101                   flt_p = 0;
1102                   break;
1103
1104                 case 'f':
1105                   NEXTSINGLE (flval, p);
1106                   break;
1107
1108                 case 'F':
1109                   NEXTDOUBLE (flval, p);
1110                   break;
1111
1112                 case 'x':
1113                   NEXTEXTEND (flval, p);
1114                   break;
1115
1116                 case 'p':
1117                   NEXTPACKED (p, flval);
1118                   break;
1119
1120                 default:
1121                   return PRINT_INSN_ARG_INVALID_OPERAND;
1122               }
1123               if (flt_p)        /* Print a float? */
1124                 (*info->fprintf_func) (info->stream, "#0e%g", flval);
1125               else
1126                 (*info->fprintf_func) (info->stream, "#%d", val);
1127               break;
1128
1129             default:
1130               return PRINT_INSN_ARG_INVALID_OPERAND;
1131             }
1132         }
1133
1134       /* If place is '/', then this is the case of the mask bit for
1135          mac/emac loads. Now that the arg has been printed, grab the
1136          mask bit and if set, add a '&' to the arg.  */
1137       if (place == '/')
1138         {
1139           FETCH_ARG (1, val);
1140           if (val)
1141             info->fprintf_func (info->stream, "&");
1142         }
1143       break;
1144
1145     case 'L':
1146     case 'l':
1147         if (place == 'w')
1148           {
1149             char doneany;
1150             p1 = buffer + 2;
1151             NEXTWORD (p1, val, PRINT_INSN_ARG_MEMORY_ERROR);
1152             /* Move the pointer ahead if this point is farther ahead
1153                than the last.  */
1154             p = p1 > p ? p1 : p;
1155             if (val == 0)
1156               {
1157                 (*info->fprintf_func) (info->stream, "#0");
1158                 break;
1159               }
1160             if (*d == 'l')
1161               {
1162                 int newval = 0;
1163
1164                 for (regno = 0; regno < 16; ++regno)
1165                   if (val & (0x8000 >> regno))
1166                     newval |= 1 << regno;
1167                 val = newval;
1168               }
1169             val &= 0xffff;
1170             doneany = 0;
1171             for (regno = 0; regno < 16; ++regno)
1172               if (val & (1 << regno))
1173                 {
1174                   int first_regno;
1175
1176                   if (doneany)
1177                     (*info->fprintf_func) (info->stream, "/");
1178                   doneany = 1;
1179                   (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1180                   first_regno = regno;
1181                   while (val & (1 << (regno + 1)))
1182                     ++regno;
1183                   if (regno > first_regno)
1184                     (*info->fprintf_func) (info->stream, "-%s",
1185                                            reg_names[regno]);
1186                 }
1187           }
1188         else if (place == '3')
1189           {
1190             /* `fmovem' insn.  */
1191             char doneany;
1192
1193             FETCH_ARG (8, val);
1194             if (val == 0)
1195               {
1196                 (*info->fprintf_func) (info->stream, "#0");
1197                 break;
1198               }
1199             if (*d == 'l')
1200               {
1201                 int newval = 0;
1202
1203                 for (regno = 0; regno < 8; ++regno)
1204                   if (val & (0x80 >> regno))
1205                     newval |= 1 << regno;
1206                 val = newval;
1207               }
1208             val &= 0xff;
1209             doneany = 0;
1210             for (regno = 0; regno < 8; ++regno)
1211               if (val & (1 << regno))
1212                 {
1213                   int first_regno;
1214                   if (doneany)
1215                     (*info->fprintf_func) (info->stream, "/");
1216                   doneany = 1;
1217                   (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1218                   first_regno = regno;
1219                   while (val & (1 << (regno + 1)))
1220                     ++regno;
1221                   if (regno > first_regno)
1222                     (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1223                 }
1224           }
1225         else if (place == '8')
1226           {
1227             FETCH_ARG (3, val);
1228             /* fmoveml for FP status registers.  */
1229             (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
1230           }
1231         else
1232           return PRINT_INSN_ARG_INVALID_OP_TABLE;
1233       break;
1234
1235     case 'X':
1236       place = '8';
1237       /* Fall through.  */
1238     case 'Y':
1239     case 'Z':
1240     case 'W':
1241     case '0':
1242     case '1':
1243     case '2':
1244     case '3':
1245       {
1246         char *name = 0;
1247
1248         FETCH_ARG (5, val);
1249         switch (val)
1250           {
1251           case 2: name = "%tt0"; break;
1252           case 3: name = "%tt1"; break;
1253           case 0x10: name = "%tc"; break;
1254           case 0x11: name = "%drp"; break;
1255           case 0x12: name = "%srp"; break;
1256           case 0x13: name = "%crp"; break;
1257           case 0x14: name = "%cal"; break;
1258           case 0x15: name = "%val"; break;
1259           case 0x16: name = "%scc"; break;
1260           case 0x17: name = "%ac"; break;
1261           case 0x18: name = "%psr"; break;
1262           case 0x19: name = "%pcsr"; break;
1263           case 0x1c:
1264           case 0x1d:
1265             {
1266               int break_reg = ((buffer[3] >> 2) & 7);
1267
1268               (*info->fprintf_func)
1269                 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1270                  break_reg);
1271             }
1272             break;
1273           default:
1274             (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1275           }
1276         if (name)
1277           (*info->fprintf_func) (info->stream, "%s", name);
1278       }
1279       break;
1280
1281     case 'f':
1282       {
1283         int fc;
1284
1285         FETCH_ARG (5, fc);
1286         if (fc == 1)
1287           (*info->fprintf_func) (info->stream, "%%dfc");
1288         else if (fc == 0)
1289           (*info->fprintf_func) (info->stream, "%%sfc");
1290         else
1291           /* xgettext:c-format */
1292           (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1293       }
1294       break;
1295
1296     case 'V':
1297       (*info->fprintf_func) (info->stream, "%%val");
1298       break;
1299
1300     case 't':
1301       {
1302         int level;
1303
1304         FETCH_ARG (3, level);
1305         (*info->fprintf_func) (info->stream, "%d", level);
1306       }
1307       break;
1308
1309     case 'u':
1310       {
1311         short is_upper = 0;
1312         int reg;
1313
1314         FETCH_ARG (5, reg);
1315         if (reg & 0x10)
1316           {
1317             is_upper = 1;
1318             reg &= 0xf;
1319           }
1320         (*info->fprintf_func) (info->stream, "%s%s",
1321                                reg_half_names[reg],
1322                                is_upper ? "u" : "l");
1323       }
1324       break;
1325
1326     default:
1327       return PRINT_INSN_ARG_INVALID_OP_TABLE;
1328     }
1329
1330   return p - p0;
1331 }
1332
1333 /* Try to match the current instruction to best and if so, return the
1334    number of bytes consumed from the instruction stream, else zero.
1335    Return -1 on memory error.  */
1336
1337 static int
1338 match_insn_m68k (bfd_vma memaddr,
1339                  disassemble_info * info,
1340                  const struct m68k_opcode * best)
1341 {
1342   unsigned char *save_p;
1343   unsigned char *p;
1344   const char *d;
1345   const char *args = best->args;
1346
1347   struct private *priv = (struct private *) info->private_data;
1348   bfd_byte *buffer = priv->the_buffer;
1349   fprintf_ftype save_printer = info->fprintf_func;
1350   void (* save_print_address) (bfd_vma, struct disassemble_info *)
1351     = info->print_address_func;
1352
1353   if (*args == '.')
1354     args++;
1355
1356   /* Point at first word of argument data,
1357      and at descriptor for first argument.  */
1358   p = buffer + 2;
1359
1360   /* Figure out how long the fixed-size portion of the instruction is.
1361      The only place this is stored in the opcode table is
1362      in the arguments--look for arguments which specify fields in the 2nd
1363      or 3rd words of the instruction.  */
1364   for (d = args; *d; d += 2)
1365     {
1366       /* I don't think it is necessary to be checking d[0] here;
1367          I suspect all this could be moved to the case statement below.  */
1368       if (d[0] == '#')
1369         {
1370           if (d[1] == 'l' && p - buffer < 6)
1371             p = buffer + 6;
1372           else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1373             p = buffer + 4;
1374         }
1375
1376       if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1377         p = buffer + 4;
1378
1379       switch (d[1])
1380         {
1381         case '1':
1382         case '2':
1383         case '3':
1384         case '7':
1385         case '8':
1386         case '9':
1387         case 'i':
1388           if (p - buffer < 4)
1389             p = buffer + 4;
1390           break;
1391         case '4':
1392         case '5':
1393         case '6':
1394           if (p - buffer < 6)
1395             p = buffer + 6;
1396           break;
1397         default:
1398           break;
1399         }
1400     }
1401
1402   /* pflusha is an exceptions.  It takes no arguments but is two words
1403      long.  Recognize it by looking at the lower 16 bits of the mask.  */
1404   if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1405     p = buffer + 4;
1406
1407   /* lpstop is another exception.  It takes a one word argument but is
1408      three words long.  */
1409   if (p - buffer < 6
1410       && (best->match & 0xffff) == 0xffff
1411       && args[0] == '#'
1412       && args[1] == 'w')
1413     {
1414       /* Copy the one word argument into the usual location for a one
1415          word argument, to simplify printing it.  We can get away with
1416          this because we know exactly what the second word is, and we
1417          aren't going to print anything based on it.  */
1418       p = buffer + 6;
1419       if (!FETCH_DATA (info, p))
1420         return -1;
1421       buffer[2] = buffer[4];
1422       buffer[3] = buffer[5];
1423     }
1424
1425   if (!FETCH_DATA (info, p))
1426     return -1;
1427
1428   save_p = p;
1429   info->print_address_func = dummy_print_address;
1430   info->fprintf_func = (fprintf_ftype) dummy_printer;
1431
1432   /* We scan the operands twice.  The first time we don't print anything,
1433      but look for errors.  */
1434   for (d = args; *d; d += 2)
1435     {
1436       int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1437
1438       if (eaten >= 0)
1439         p += eaten;
1440       else if (eaten == PRINT_INSN_ARG_INVALID_OPERAND
1441                || eaten == PRINT_INSN_ARG_MEMORY_ERROR)
1442         {
1443           info->fprintf_func = save_printer;
1444           info->print_address_func = save_print_address;
1445           return eaten == PRINT_INSN_ARG_MEMORY_ERROR ? -1 : 0;
1446         }
1447       else
1448         {
1449           /* We must restore the print functions before trying to print the
1450              error message.  */
1451           info->fprintf_func = save_printer;
1452           info->print_address_func = save_print_address;
1453           info->fprintf_func (info->stream,
1454                               /* xgettext:c-format */
1455                               _("<internal error in opcode table: %s %s>\n"),
1456                               best->name, best->args);
1457           return 2;
1458         }
1459     }
1460
1461   p = save_p;
1462   info->fprintf_func = save_printer;
1463   info->print_address_func = save_print_address;
1464
1465   d = args;
1466
1467   info->fprintf_func (info->stream, "%s", best->name);
1468
1469   if (*d)
1470     info->fprintf_func (info->stream, " ");
1471
1472   while (*d)
1473     {
1474       p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1475       d += 2;
1476
1477       if (*d && *(d - 2) != 'I' && *d != 'k')
1478         info->fprintf_func (info->stream, ",");
1479     }
1480
1481   return p - buffer;
1482 }
1483
1484 /* Try to interpret the instruction at address MEMADDR as one that
1485    can execute on a processor with the features given by ARCH_MASK.
1486    If successful, print the instruction to INFO->STREAM and return
1487    its length in bytes.  Return 0 otherwise.  Return -1 on memory
1488    error.  */
1489
1490 static int
1491 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1492                 unsigned int arch_mask)
1493 {
1494   int i;
1495   const char *d;
1496   static const struct m68k_opcode **opcodes[16];
1497   static int numopcodes[16];
1498   int val;
1499   int major_opcode;
1500
1501   struct private *priv = (struct private *) info->private_data;
1502   bfd_byte *buffer = priv->the_buffer;
1503
1504   if (!opcodes[0])
1505     {
1506       /* Speed up the matching by sorting the opcode
1507          table on the upper four bits of the opcode.  */
1508       const struct m68k_opcode **opc_pointer[16];
1509
1510       /* First count how many opcodes are in each of the sixteen buckets.  */
1511       for (i = 0; i < m68k_numopcodes; i++)
1512         numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1513
1514       /* Then create a sorted table of pointers
1515          that point into the unsorted table.  */
1516       opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1517                                 * m68k_numopcodes);
1518       opcodes[0] = opc_pointer[0];
1519
1520       for (i = 1; i < 16; i++)
1521         {
1522           opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1523           opcodes[i] = opc_pointer[i];
1524         }
1525
1526       for (i = 0; i < m68k_numopcodes; i++)
1527         *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1528     }
1529
1530   if (!FETCH_DATA (info, buffer + 2))
1531     return -1;
1532   major_opcode = (buffer[0] >> 4) & 15;
1533
1534   for (i = 0; i < numopcodes[major_opcode]; i++)
1535     {
1536       const struct m68k_opcode *opc = opcodes[major_opcode][i];
1537       unsigned long opcode = opc->opcode;
1538       unsigned long match = opc->match;
1539       const char *args = opc->args;
1540
1541       if (*args == '.')
1542         args++;
1543
1544       if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1545           && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1546           /* Only fetch the next two bytes if we need to.  */
1547           && (((0xffff & match) == 0)
1548               ||
1549               (FETCH_DATA (info, buffer + 4)
1550                && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1551                && ((0xff & buffer[3] & match) == (0xff & opcode)))
1552               )
1553           && (opc->arch & arch_mask) != 0)
1554         {
1555           /* Don't use for printout the variants of divul and divsl
1556              that have the same register number in two places.
1557              The more general variants will match instead.  */
1558           for (d = args; *d; d += 2)
1559             if (d[1] == 'D')
1560               break;
1561
1562           /* Don't use for printout the variants of most floating
1563              point coprocessor instructions which use the same
1564              register number in two places, as above.  */
1565           if (*d == '\0')
1566             for (d = args; *d; d += 2)
1567               if (d[1] == 't')
1568                 break;
1569
1570           /* Don't match fmovel with more than one register;
1571              wait for fmoveml.  */
1572           if (*d == '\0')
1573             {
1574               for (d = args; *d; d += 2)
1575                 {
1576                   if (d[0] == 's' && d[1] == '8')
1577                     {
1578                       val = fetch_arg (buffer, d[1], 3, info);
1579                       if (val < 0)
1580                         return 0;
1581                       if ((val & (val - 1)) != 0)
1582                         break;
1583                     }
1584                 }
1585             }
1586
1587           /* Don't match FPU insns with non-default coprocessor ID.  */
1588           if (*d == '\0')
1589             {
1590               for (d = args; *d; d += 2)
1591                 {
1592                   if (d[0] == 'I')
1593                     {
1594                       val = fetch_arg (buffer, 'd', 3, info);
1595                       if (val != 1)
1596                         break;
1597                     }
1598                 }
1599             }
1600
1601           if (*d == '\0')
1602             if ((val = match_insn_m68k (memaddr, info, opc)))
1603               return val;
1604         }
1605     }
1606   return 0;
1607 }
1608
1609 /* Print the m68k instruction at address MEMADDR in debugged memory,
1610    on INFO->STREAM.  Returns length of the instruction, in bytes.  */
1611
1612 int
1613 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1614 {
1615   unsigned int arch_mask;
1616   struct private priv;
1617   int val;
1618
1619   bfd_byte *buffer = priv.the_buffer;
1620
1621   info->private_data = & priv;
1622   /* Tell objdump to use two bytes per chunk
1623      and six bytes per line for displaying raw data.  */
1624   info->bytes_per_chunk = 2;
1625   info->bytes_per_line = 6;
1626   info->display_endian = BFD_ENDIAN_BIG;
1627   priv.max_fetched = priv.the_buffer;
1628   priv.insn_start = memaddr;
1629
1630   arch_mask = bfd_m68k_mach_to_features (info->mach);
1631   if (!arch_mask)
1632     {
1633       /* First try printing an m680x0 instruction.  Try printing a Coldfire
1634          one if that fails.  */
1635       val = m68k_scan_mask (memaddr, info, m68k_mask);
1636       if (val <= 0)
1637         val = m68k_scan_mask (memaddr, info, mcf_mask);
1638     }
1639   else
1640     {
1641       val = m68k_scan_mask (memaddr, info, arch_mask);
1642     }
1643
1644   if (val == 0)
1645     /* Handle undefined instructions.  */
1646     info->fprintf_func (info->stream, ".short 0x%04x", (buffer[0] << 8) + buffer[1]);
1647
1648   return val ? val : 2;
1649 }