| blob | 9c1d1b30d87be54bd926b01d6b5aef2c6360e5a8 |
1 /* PowerPC-specific support for 32-bit ELF
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 /* This file is based on a preliminary PowerPC ELF ABI. The
24 information may not match the final PowerPC ELF ABI. It includes
25 suggestions from the in-progress Embedded PowerPC ABI, and that
26 information may also not match. */
29 #include <stdarg.h>
40 /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
41 #define OCTETS_PER_BYTE(ABFD, SEC) 1
44 {
46 split16d_type
47 }
48 split16_format_type;
50 /* RELA relocations are used here. */
52 static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
54 static bfd_reloc_status_type ppc_elf_unhandled_reloc
57 /* Branch prediction bit for branch taken relocs. */
58 #define BRANCH_PREDICT_BIT 0x200000
59 /* Mask to set RA in memory instructions. */
60 #define RA_REGISTER_MASK 0x001f0000
61 /* Value to shift register by to insert RA. */
62 #define RA_REGISTER_SHIFT 16
64 /* The name of the dynamic interpreter. This is put in the .interp
65 section. */
68 /* For old-style PLT. */
69 /* The number of single-slot PLT entries (the rest use two slots). */
70 #define PLT_NUM_SINGLE_ENTRIES 8192
72 /* For new-style .glink and .plt. */
73 #define GLINK_PLTRESOLVE 16*4
74 #define GLINK_ENTRY_SIZE(htab, h) \
75 ((4*4 \
76 + (h != NULL \
77 && h == htab->tls_get_addr \
78 && !htab->params->no_tls_get_addr_opt ? 8*4 : 0) \
79 + (1u << htab->params->plt_stub_align) - 1) \
80 & -(1u << htab->params->plt_stub_align))
82 /* VxWorks uses its own plt layout, filled in by the static linker. */
84 /* The standard VxWorks PLT entry. */
85 #define VXWORKS_PLT_ENTRY_SIZE 32
86 static const bfd_vma ppc_elf_vxworks_plt_entry
88 {
97 };
98 static const bfd_vma ppc_elf_vxworks_pic_plt_entry
100 {
109 };
111 /* The initial VxWorks PLT entry. */
112 #define VXWORKS_PLT_INITIAL_ENTRY_SIZE 32
113 static const bfd_vma ppc_elf_vxworks_plt0_entry
115 {
124 };
125 static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
127 {
136 };
138 /* For executables, we have some additional relocations in
139 .rela.plt.unloaded, for the kernel loader. */
141 /* The number of non-JMP_SLOT relocations per PLT0 slot. */
142 #define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
143 /* The number of relocations in the PLTResolve slot. */
144 #define VXWORKS_PLTRESOLVE_RELOCS 2
145 /* The number of relocations in the PLTResolve slot when creating
146 a shared library. */
147 #define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
149 /* Some instructions. */
150 #define ADDIS_11_11 0x3d6b0000
151 #define ADDIS_11_30 0x3d7e0000
152 #define ADDIS_12_12 0x3d8c0000
153 #define ADDI_11_11 0x396b0000
154 #define ADD_0_11_11 0x7c0b5a14
155 #define ADD_3_12_2 0x7c6c1214
156 #define ADD_11_0_11 0x7d605a14
157 #define B 0x48000000
158 #define BA 0x48000002
159 #define BCL_20_31 0x429f0005
160 #define BCTR 0x4e800420
161 #define BEQLR 0x4d820020
162 #define CMPWI_11_0 0x2c0b0000
163 #define LIS_11 0x3d600000
164 #define LIS_12 0x3d800000
165 #define LWZU_0_12 0x840c0000
166 #define LWZ_0_12 0x800c0000
167 #define LWZ_11_3 0x81630000
168 #define LWZ_11_11 0x816b0000
169 #define LWZ_11_30 0x817e0000
170 #define LWZ_12_3 0x81830000
171 #define LWZ_12_12 0x818c0000
172 #define MR_0_3 0x7c601b78
173 #define MR_3_0 0x7c030378
174 #define MFLR_0 0x7c0802a6
175 #define MFLR_12 0x7d8802a6
176 #define MTCTR_0 0x7c0903a6
177 #define MTCTR_11 0x7d6903a6
178 #define MTLR_0 0x7c0803a6
179 #define NOP 0x60000000
180 #define SUB_11_11_12 0x7d6c5850
182 /* Offset of tp and dtp pointers from start of TLS block. */
183 #define TP_OFFSET 0x7000
184 #define DTP_OFFSET 0x8000
186 /* The value of a defined global symbol. */
187 #define SYM_VAL(SYM) \
188 ((SYM)->root.u.def.section->output_section->vma \
189 + (SYM)->root.u.def.section->output_offset \
190 + (SYM)->root.u.def.value)
191 \f
192 /* Relocation HOWTO's. */
193 /* Like other ELF RELA targets that don't apply multiple
194 field-altering relocations to the same localation, src_mask is
195 always zero and pcrel_offset is the same as pc_relative.
196 PowerPC can always use a zero bitpos, even when the field is not at
197 the LSB. For example, a REL24 could use rightshift=2, bisize=24
198 and bitpos=2 which matches the ABI description, or as we do here,
199 rightshift=0, bitsize=26 and bitpos=0. */
200 #define HOW(type, size, bitsize, mask, rightshift, pc_relative, \
201 complain, special_func) \
202 HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \
203 complain_overflow_ ## complain, special_func, \
204 #type, FALSE, 0, mask, pc_relative)
209 /* This reloc does nothing. */
211 bfd_elf_generic_reloc),
213 /* A standard 32 bit relocation. */
215 bfd_elf_generic_reloc),
217 /* An absolute 26 bit branch; the lower two bits must be zero.
218 FIXME: we don't check that, we just clear them. */
220 bfd_elf_generic_reloc),
222 /* A standard 16 bit relocation. */
224 bfd_elf_generic_reloc),
226 /* A 16 bit relocation without overflow. */
228 bfd_elf_generic_reloc),
230 /* The high order 16 bits of an address. */
232 bfd_elf_generic_reloc),
234 /* The high order 16 bits of an address, plus 1 if the contents of
235 the low 16 bits, treated as a signed number, is negative. */
237 ppc_elf_addr16_ha_reloc),
239 /* An absolute 16 bit branch; the lower two bits must be zero.
240 FIXME: we don't check that, we just clear them. */
242 bfd_elf_generic_reloc),
244 /* An absolute 16 bit branch, for which bit 10 should be set to
245 indicate that the branch is expected to be taken. The lower two
246 bits must be zero. */
248 bfd_elf_generic_reloc),
250 /* An absolute 16 bit branch, for which bit 10 should be set to
251 indicate that the branch is not expected to be taken. The lower
252 two bits must be zero. */
254 bfd_elf_generic_reloc),
256 /* A relative 26 bit branch; the lower two bits must be zero. */
258 bfd_elf_generic_reloc),
260 /* A relative 16 bit branch; the lower two bits must be zero. */
262 bfd_elf_generic_reloc),
264 /* A relative 16 bit branch. Bit 10 should be set to indicate that
265 the branch is expected to be taken. The lower two bits must be
266 zero. */
268 bfd_elf_generic_reloc),
270 /* A relative 16 bit branch. Bit 10 should be set to indicate that
271 the branch is not expected to be taken. The lower two bits must
272 be zero. */
274 bfd_elf_generic_reloc),
276 /* Like R_PPC_ADDR16, but referring to the GOT table entry for the
277 symbol. */
279 ppc_elf_unhandled_reloc),
281 /* Like R_PPC_ADDR16_LO, but referring to the GOT table entry for
282 the symbol. */
284 ppc_elf_unhandled_reloc),
286 /* Like R_PPC_ADDR16_HI, but referring to the GOT table entry for
287 the symbol. */
289 ppc_elf_unhandled_reloc),
291 /* Like R_PPC_ADDR16_HA, but referring to the GOT table entry for
292 the symbol. */
294 ppc_elf_unhandled_reloc),
296 /* Like R_PPC_REL24, but referring to the procedure linkage table
297 entry for the symbol. */
299 ppc_elf_unhandled_reloc),
301 /* This is used only by the dynamic linker. The symbol should exist
302 both in the object being run and in some shared library. The
303 dynamic linker copies the data addressed by the symbol from the
304 shared library into the object, because the object being
305 run has to have the data at some particular address. */
307 ppc_elf_unhandled_reloc),
309 /* Like R_PPC_ADDR32, but used when setting global offset table
310 entries. */
312 ppc_elf_unhandled_reloc),
314 /* Marks a procedure linkage table entry for a symbol. */
316 ppc_elf_unhandled_reloc),
318 /* Used only by the dynamic linker. When the object is run, this
319 longword is set to the load address of the object, plus the
320 addend. */
322 bfd_elf_generic_reloc),
324 /* Like R_PPC_REL24, but uses the value of the symbol within the
325 object rather than the final value. Normally used for
326 _GLOBAL_OFFSET_TABLE_. */
328 bfd_elf_generic_reloc),
330 /* Like R_PPC_ADDR32, but may be unaligned. */
332 bfd_elf_generic_reloc),
334 /* Like R_PPC_ADDR16, but may be unaligned. */
336 bfd_elf_generic_reloc),
338 /* 32-bit PC relative */
340 bfd_elf_generic_reloc),
342 /* 32-bit relocation to the symbol's procedure linkage table.
343 FIXME: not supported. */
345 ppc_elf_unhandled_reloc),
347 /* 32-bit PC relative relocation to the symbol's procedure linkage table.
348 FIXME: not supported. */
350 ppc_elf_unhandled_reloc),
352 /* Like R_PPC_ADDR16_LO, but referring to the PLT table entry for
353 the symbol. */
355 ppc_elf_unhandled_reloc),
357 /* Like R_PPC_ADDR16_HI, but referring to the PLT table entry for
358 the symbol. */
360 ppc_elf_unhandled_reloc),
362 /* Like R_PPC_ADDR16_HA, but referring to the PLT table entry for
363 the symbol. */
365 ppc_elf_unhandled_reloc),
367 /* A sign-extended 16 bit value relative to _SDA_BASE_, for use with
368 small data items. */
370 ppc_elf_unhandled_reloc),
372 /* 16-bit section relative relocation. */
374 ppc_elf_unhandled_reloc),
376 /* 16-bit lower half section relative relocation. */
378 ppc_elf_unhandled_reloc),
380 /* 16-bit upper half section relative relocation. */
382 ppc_elf_unhandled_reloc),
384 /* 16-bit upper half adjusted section relative relocation. */
386 ppc_elf_unhandled_reloc),
388 /* Marker relocs for TLS. */
390 bfd_elf_generic_reloc),
393 bfd_elf_generic_reloc),
396 bfd_elf_generic_reloc),
398 /* Marker relocs on inline plt call instructions. */
400 bfd_elf_generic_reloc),
403 bfd_elf_generic_reloc),
405 /* Computes the load module index of the load module that contains the
406 definition of its TLS sym. */
408 ppc_elf_unhandled_reloc),
410 /* Computes a dtv-relative displacement, the difference between the value
411 of sym+add and the base address of the thread-local storage block that
412 contains the definition of sym, minus 0x8000. */
414 ppc_elf_unhandled_reloc),
416 /* A 16 bit dtprel reloc. */
418 ppc_elf_unhandled_reloc),
420 /* Like DTPREL16, but no overflow. */
422 ppc_elf_unhandled_reloc),
424 /* Like DTPREL16_LO, but next higher group of 16 bits. */
426 ppc_elf_unhandled_reloc),
428 /* Like DTPREL16_HI, but adjust for low 16 bits. */
430 ppc_elf_unhandled_reloc),
432 /* Computes a tp-relative displacement, the difference between the value of
433 sym+add and the value of the thread pointer (r13). */
435 ppc_elf_unhandled_reloc),
437 /* A 16 bit tprel reloc. */
439 ppc_elf_unhandled_reloc),
441 /* Like TPREL16, but no overflow. */
443 ppc_elf_unhandled_reloc),
445 /* Like TPREL16_LO, but next higher group of 16 bits. */
447 ppc_elf_unhandled_reloc),
449 /* Like TPREL16_HI, but adjust for low 16 bits. */
451 ppc_elf_unhandled_reloc),
453 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
454 with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset
455 to the first entry. */
457 ppc_elf_unhandled_reloc),
459 /* Like GOT_TLSGD16, but no overflow. */
461 ppc_elf_unhandled_reloc),
463 /* Like GOT_TLSGD16_LO, but next higher group of 16 bits. */
465 ppc_elf_unhandled_reloc),
467 /* Like GOT_TLSGD16_HI, but adjust for low 16 bits. */
469 ppc_elf_unhandled_reloc),
471 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
472 with values (sym+add)@dtpmod and zero, and computes the offset to the
473 first entry. */
475 ppc_elf_unhandled_reloc),
477 /* Like GOT_TLSLD16, but no overflow. */
479 ppc_elf_unhandled_reloc),
481 /* Like GOT_TLSLD16_LO, but next higher group of 16 bits. */
483 ppc_elf_unhandled_reloc),
485 /* Like GOT_TLSLD16_HI, but adjust for low 16 bits. */
487 ppc_elf_unhandled_reloc),
489 /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes
490 the offset to the entry. */
492 ppc_elf_unhandled_reloc),
494 /* Like GOT_DTPREL16, but no overflow. */
496 ppc_elf_unhandled_reloc),
498 /* Like GOT_DTPREL16_LO, but next higher group of 16 bits. */
500 ppc_elf_unhandled_reloc),
502 /* Like GOT_DTPREL16_HI, but adjust for low 16 bits. */
504 ppc_elf_unhandled_reloc),
506 /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the
507 offset to the entry. */
509 ppc_elf_unhandled_reloc),
511 /* Like GOT_TPREL16, but no overflow. */
513 ppc_elf_unhandled_reloc),
515 /* Like GOT_TPREL16_LO, but next higher group of 16 bits. */
517 ppc_elf_unhandled_reloc),
519 /* Like GOT_TPREL16_HI, but adjust for low 16 bits. */
521 ppc_elf_unhandled_reloc),
523 /* The remaining relocs are from the Embedded ELF ABI, and are not
524 in the SVR4 ELF ABI. */
526 /* 32 bit value resulting from the addend minus the symbol. */
528 ppc_elf_unhandled_reloc),
530 /* 16 bit value resulting from the addend minus the symbol. */
532 ppc_elf_unhandled_reloc),
534 /* 16 bit value resulting from the addend minus the symbol. */
536 ppc_elf_unhandled_reloc),
538 /* The high order 16 bits of the addend minus the symbol. */
540 ppc_elf_unhandled_reloc),
542 /* The high order 16 bits of the result of the addend minus the address,
543 plus 1 if the contents of the low 16 bits, treated as a signed number,
544 is negative. */
546 ppc_elf_unhandled_reloc),
548 /* 16 bit value resulting from allocating a 4 byte word to hold an
549 address in the .sdata section, and returning the offset from
550 _SDA_BASE_ for that relocation. */
552 ppc_elf_unhandled_reloc),
554 /* 16 bit value resulting from allocating a 4 byte word to hold an
555 address in the .sdata2 section, and returning the offset from
556 _SDA2_BASE_ for that relocation. */
558 ppc_elf_unhandled_reloc),
560 /* A sign-extended 16 bit value relative to _SDA2_BASE_, for use with
561 small data items. */
563 ppc_elf_unhandled_reloc),
565 /* Relocate against either _SDA_BASE_ or _SDA2_BASE_, filling in the 16 bit
566 signed offset from the appropriate base, and filling in the register
567 field with the appropriate register (0, 2, or 13). */
569 ppc_elf_unhandled_reloc),
571 /* Relocation not handled: R_PPC_EMB_MRKREF */
572 /* Relocation not handled: R_PPC_EMB_RELSEC16 */
573 /* Relocation not handled: R_PPC_EMB_RELST_LO */
574 /* Relocation not handled: R_PPC_EMB_RELST_HI */
575 /* Relocation not handled: R_PPC_EMB_RELST_HA */
576 /* Relocation not handled: R_PPC_EMB_BIT_FLD */
578 /* PC relative relocation against either _SDA_BASE_ or _SDA2_BASE_, filling
579 in the 16 bit signed offset from the appropriate base, and filling in the
580 register field with the appropriate register (0, 2, or 13). */
582 ppc_elf_unhandled_reloc),
584 /* A relative 8 bit branch. */
586 bfd_elf_generic_reloc),
588 /* A relative 15 bit branch. */
590 bfd_elf_generic_reloc),
592 /* A relative 24 bit branch. */
594 bfd_elf_generic_reloc),
596 /* The 16 LSBS in split16a format. */
598 ppc_elf_unhandled_reloc),
600 /* The 16 LSBS in split16d format. */
602 ppc_elf_unhandled_reloc),
604 /* Bits 16-31 split16a format. */
606 ppc_elf_unhandled_reloc),
608 /* Bits 16-31 split16d format. */
610 ppc_elf_unhandled_reloc),
612 /* Bits 16-31 (High Adjusted) in split16a format. */
614 ppc_elf_unhandled_reloc),
616 /* Bits 16-31 (High Adjusted) in split16d format. */
618 ppc_elf_unhandled_reloc),
620 /* This reloc is like R_PPC_EMB_SDA21 but only applies to e_add16i
621 instructions. If the register base is 0 then the linker changes
622 the e_add16i to an e_li instruction. */
624 ppc_elf_unhandled_reloc),
626 /* Like R_PPC_VLE_SDA21 but ignore overflow. */
628 ppc_elf_unhandled_reloc),
630 /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
632 ppc_elf_unhandled_reloc),
634 /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
636 ppc_elf_unhandled_reloc),
638 /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
640 ppc_elf_unhandled_reloc),
642 /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
644 ppc_elf_unhandled_reloc),
646 /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
648 ppc_elf_unhandled_reloc),
650 /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
652 ppc_elf_unhandled_reloc),
654 /* e_li split20 format. */
656 ppc_elf_unhandled_reloc),
659 ppc_elf_unhandled_reloc),
661 /* A 16 bit relative relocation. */
663 bfd_elf_generic_reloc),
665 /* A 16 bit relative relocation without overflow. */
667 bfd_elf_generic_reloc),
669 /* The high order 16 bits of a relative address. */
671 bfd_elf_generic_reloc),
673 /* The high order 16 bits of a relative address, plus 1 if the contents of
674 the low 16 bits, treated as a signed number, is negative. */
676 ppc_elf_addr16_ha_reloc),
678 /* Like R_PPC_REL16_HA but for split field in addpcis. */
680 ppc_elf_addr16_ha_reloc),
682 /* A split-field reloc for addpcis, non-relative (gas internal use only). */
684 ppc_elf_addr16_ha_reloc),
686 /* GNU extension to record C++ vtable hierarchy. */
688 NULL),
690 /* GNU extension to record C++ vtable member usage. */
692 NULL),
694 /* Phony reloc to handle AIX style TOC entries. */
696 ppc_elf_unhandled_reloc),
697 };
698 \f
699 /* Initialize the ppc_elf_howto_table, so that linear accesses can be done. */
701 static void
703 {
708 i++)
709 {
715 }
716 }
720 bfd_reloc_code_real_type code)
721 {
724 /* Initialize howto table if not already done. */
729 {
863 }
866 };
871 {
876 i++)
882 }
884 /* Set the howto pointer for a PowerPC ELF reloc. */
886 static bfd_boolean
890 {
893 /* Initialize howto table if not already done. */
899 {
900 /* xgettext:c-format */
905 }
909 /* Just because the above assert didn't trigger doesn't mean that
910 ELF32_R_TYPE (dst->r_info) is necessarily a valid relocation. */
912 {
913 /* xgettext:c-format */
919 }
922 }
924 /* Handle the R_PPC_ADDR16_HA and R_PPC_REL16_HA relocs. */
926 static bfd_reloc_status_type
934 {
937 bfd_size_type octets;
938 bfd_vma value;
941 {
944 }
968 }
970 static bfd_reloc_status_type
978 {
979 /* If this is a relocatable link (output_bfd test tells us), just
980 call the generic function. Any adjustment will be done at final
981 link time. */
987 {
992 }
994 }
995 \f
996 /* Sections created by the linker. */
999 {
1000 /* Pointer to the bfd section. */
1002 /* Section name. */
1004 /* Associated bss section name. */
1006 /* Associated symbol name. */
1008 /* Associated symbol. */
1012 /* Linked list of allocated pointer entries. This hangs off of the
1013 symbol lists, and provides allows us to return different pointers,
1014 based on different addend's. */
1017 {
1018 /* next allocated pointer for this symbol */
1020 /* offset of pointer from beginning of section */
1021 bfd_vma offset;
1022 /* addend used */
1023 bfd_vma addend;
1024 /* which linker section this is */
1028 struct ppc_elf_obj_tdata
1029 {
1032 /* A mapping from local symbols to offsets into the various linker
1033 sections added. This is index by the symbol index. */
1036 /* Flags used to auto-detect plt type. */
1039 };
1041 #define ppc_elf_tdata(bfd) \
1042 ((struct ppc_elf_obj_tdata *) (bfd)->tdata.any)
1044 #define elf_local_ptr_offsets(bfd) \
1045 (ppc_elf_tdata (bfd)->linker_section_pointers)
1047 #define is_ppc_elf(bfd) \
1048 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
1049 && elf_object_id (bfd) == PPC32_ELF_DATA)
1051 /* Override the generic function because we store some extras. */
1053 static bfd_boolean
1055 {
1057 PPC32_ELF_DATA);
1058 }
1060 /* When defaulting arch/mach, decode apuinfo to find a better match. */
1062 bfd_boolean
1064 {
1071 {
1078 }
1081 {
1086 {
1091 {
1094 {
1120 }
1121 }
1123 }
1124 }
1127 {
1132 {
1135 }
1136 }
1138 }
1140 /* Fix bad default arch selected for a 32 bit input bfd when the
1141 default is 64 bit. Also select arch based on apuinfo. */
1143 static bfd_boolean
1145 {
1150 {
1154 {
1155 /* Relies on arch after 64 bit default being 32 bit default. */
1158 }
1159 }
1161 }
1163 /* Function to set whether a module needs the -mrelocatable bit set. */
1165 static bfd_boolean
1167 {
1174 }
1176 /* Support for core dump NOTE sections. */
1178 static bfd_boolean
1180 {
1185 {
1190 /* pr_cursig */
1193 /* pr_pid */
1196 /* pr_reg */
1201 }
1203 /* Make a ".reg/999" section. */
1206 }
1208 static bfd_boolean
1210 {
1212 {
1223 }
1225 /* Note that for some reason, a spurious space is tacked
1226 onto the end of the args in some (at least one anyway)
1227 implementations, so strip it off if it exists. */
1229 {
1235 }
1238 }
1242 {
1244 {
1249 {
1256 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1257 DIAGNOSTIC_PUSH;
1258 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
1259 -Wstringop-truncation:
1260 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
1261 */
1262 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
1263 #endif
1265 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1266 DIAGNOSTIC_POP;
1267 #endif
1271 }
1274 {
1293 }
1294 }
1295 }
1297 static flagword
1299 {
1305 }
1307 /* Return address for Ith PLT stub in section PLT, for relocation REL
1308 or (bfd_vma) -1 if it should not be included. */
1310 static bfd_vma
1314 {
1316 }
1318 /* Handle a PowerPC specific section when reading an object file. This
1319 is called when bfd_section_from_shdr finds a section with an unknown
1320 type. */
1322 static bfd_boolean
1327 {
1329 flagword flags;
1344 }
1346 /* Set up any other section flags and such that may be necessary. */
1348 static bfd_boolean
1352 {
1357 }
1359 /* If we have .sbss2 or .PPC.EMB.sbss0 output sections, we
1360 need to bump up the number of section headers. */
1362 static int
1365 {
1378 }
1380 /* Modify the segment map for VLE executables. */
1382 bfd_boolean
1385 {
1388 /* At this point in the link, output sections have already been sorted by
1389 LMA and assigned to segments. All that is left to do is to ensure
1390 there is no mixing of VLE & non-VLE sections in a text segment.
1391 If we find that case, we split the segment.
1392 We maintain the original output section order. */
1395 {
1397 bfd_size_type amt;
1405 {
1409 {
1414 }
1415 }
1418 {
1424 {
1430 }
1432 }
1433 /* If we're splitting a segment which originally contained rw
1434 sections then those sections might now only be in one of the
1435 two parts. So always set p_flags if splitting, even if we
1436 are being called for objcopy with p_flags_valid set. */
1438 {
1441 }
1445 /* Sections 0..j-1 stay in this (current) segment,
1446 the remainder are put in a new segment.
1447 The scan resumes with the new segment. */
1463 }
1466 }
1468 /* Add extra PPC sections -- Note, for now, make .sbss2 and
1469 .PPC.EMB.sbss0 a normal section, and not a bss section so
1470 that the linker doesn't crater when trying to make more than
1471 2 sections. */
1474 {
1485 };
1487 /* This is what we want for new plt/got. */
1493 {
1496 /* See if this is one of the special sections. */
1503 {
1507 }
1510 }
1511 \f
1512 /* Very simple linked list structure for recording apuinfo values. */
1514 {
1517 }
1518 apuinfo_list;
1523 static void
1525 {
1528 }
1530 static void
1532 {
1536 {
1540 }
1549 }
1551 static unsigned
1553 {
1558 entry;
1563 }
1567 {
1573 ;
1576 }
1578 static void
1580 {
1584 {
1588 }
1591 }
1593 /* Scan the input BFDs and create a linked list of
1594 the APUinfo values that will need to be emitted. */
1596 static void
1598 {
1612 /* Read in the input sections contents. */
1614 {
1621 /* xgettext:c-format */
1629 {
1636 }
1640 {
1641 /* xgettext:c-format */
1644 }
1646 /* Verify the contents of the header. Note - we have to
1647 extract the values this way in order to allow for a
1648 host whose endian-ness is different from the target. */
1660 /* Get the number of bytes used for apuinfo entries. */
1665 /* Scan the apuinfo section, building a list of apuinfo numbers. */
1668 }
1673 {
1674 /* Compute the size of the output section. */
1677 /* Set the output section size, if it exists. */
1681 {
1683 /* xgettext:c-format */
1685 }
1686 }
1688 fail:
1694 }
1696 /* Prevent the output section from accumulating the input sections'
1697 contents. We have already stored this in our linked list structure. */
1699 static bfd_boolean
1704 {
1706 }
1708 /* Finally we can generate the output section. */
1710 static void
1712 {
1717 bfd_size_type length;
1732 {
1733 _bfd_error_handler
1736 }
1738 /* Create the apuinfo header. */
1747 {
1750 }
1761 }
1763 static bfd_boolean
1765 {
1768 }
1769 \f
1770 static bfd_boolean
1772 {
1782 }
1784 static bfd_boolean
1786 {
1791 }
1793 static long
1797 {
1802 bfd_vma stub_off;
1826 /* Call common code to handle old-style executable PLTs. */
1831 /* If this object was prelinked, the prelinker stored the address
1832 of .glink at got[1]. If it wasn't prelinked, got[1] will be zero. */
1835 {
1849 {
1850 Elf_Internal_Dyn dyn;
1857 {
1865 }
1866 }
1868 }
1870 /* Otherwise we read the first plt entry. */
1872 {
1875 }
1880 /* The .glink section usually does not survive the final
1881 link; search for the section (usually .text) where the
1882 glink stubs now reside. */
1887 /* Determine glink PLT resolver by reading the relative branch
1888 from the first glink stub. */
1891 {
1894 /* The first glink stub may either branch to the resolver ... */
1899 /* ... or fall through a bunch of NOPs. */
1906 {
1909 }
1910 }
1913 /* If the stubs are those for -shared/-pie then we might have
1914 multiple stubs for each plt entry. If that is the case then
1915 there is no way to associate stubs with their plt entries short
1916 of figuring out the GOT pointer value used in the stub.
1917 The offsets tested here need to cover all possible values of
1918 GLINK_ENTRY_SIZE for other than __tls_get_addr_opt. */
1933 {
1937 }
1952 {
1959 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
1960 we are defining a symbol, ensure one of them is set. */
1972 {
1977 }
1982 }
1984 /* Add a symbol at the start of the glink branch table. */
1993 s++;
1994 count++;
1997 {
1998 /* Add a symbol for the glink PLT resolver. */
2007 s++;
2008 count++;
2009 }
2012 }
2013 \f
2014 /* The following functions are specific to the ELF linker, while
2015 functions above are used generally. They appear in this file more
2016 or less in the order in which they are called. eg.
2017 ppc_elf_check_relocs is called early in the link process,
2018 ppc_elf_finish_dynamic_sections is one of the last functions
2019 called. */
2021 /* Track PLT entries needed for a given symbol. We might need more
2022 than one glink entry per symbol when generating a pic binary. */
2023 struct plt_entry
2024 {
2027 /* -fPIC uses multiple GOT sections, one per file, called ".got2".
2028 This field stores the offset into .got2 used to initialise the
2029 GOT pointer reg. It will always be at least 32768. (Current
2030 gcc always uses an offset of 32768, but ld -r will pack .got2
2031 sections together resulting in larger offsets). */
2032 bfd_vma addend;
2034 /* The .got2 section. */
2037 /* PLT refcount or offset. */
2038 union
2039 {
2040 bfd_signed_vma refcount;
2041 bfd_vma offset;
2044 /* .glink stub offset. */
2045 bfd_vma glink_offset;
2046 };
2048 /* Of those relocs that might be copied as dynamic relocs, this
2049 function selects those that must be copied when linking a shared
2050 library or PIE, even when the symbol is local. */
2052 static int
2055 {
2057 {
2059 /* Only relative relocs can be resolved when the object load
2060 address isn't fixed. DTPREL32 is excluded because the
2061 dynamic linker needs to differentiate global dynamic from
2062 local dynamic __tls_index pairs when PPC_OPT_TLS is set. */
2077 /* These relocations are relative but in a shared library the
2078 linker doesn't know the thread pointer base. */
2080 }
2081 }
2083 /* If ELIMINATE_COPY_RELOCS is non-zero, the linker will try to avoid
2084 copying dynamic variables from a shared lib into an app's dynbss
2085 section, and instead use a dynamic relocation to point into the
2086 shared lib. */
2087 #define ELIMINATE_COPY_RELOCS 1
2089 /* Used to track dynamic relocations for local symbols. */
2090 struct ppc_dyn_relocs
2091 {
2094 /* The input section of the reloc. */
2097 /* Total number of relocs copied for the input section. */
2100 /* Whether this entry is for STT_GNU_IFUNC symbols. */
2102 };
2104 /* PPC ELF linker hash entry. */
2106 struct ppc_elf_link_hash_entry
2107 {
2110 /* If this symbol is used in the linker created sections, the processor
2111 specific backend uses this field to map the field into the offset
2112 from the beginning of the section. */
2115 /* Track dynamic relocs copied for this symbol. */
2118 /* Contexts in which symbol is used in the GOT.
2119 Bits are or'd into the mask as the corresponding relocs are
2120 encountered during check_relocs, with TLS_TLS being set when any
2121 of the other TLS bits are set. tls_optimize clears bits when
2122 optimizing to indicate the corresponding GOT entry type is not
2123 needed. If set, TLS_TLS is never cleared. tls_optimize may also
2124 set TLS_GDIE when a GD reloc turns into an IE one.
2125 These flags are also kept for local symbols. */
2135 /* The above field is also used to mark function symbols. In which
2136 case TLS_TLS will be 0. */
2141 /* Nonzero if we have seen a small data relocation referring to this
2142 symbol. */
2145 /* Flag use of given relocations. */
2148 };
2150 #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
2152 /* PPC ELF linker hash table. */
2154 struct ppc_elf_link_hash_table
2155 {
2158 /* Various options passed from the linker. */
2161 /* Short-cuts to get to dynamic linker sections. */
2171 /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */
2174 /* Shortcut to __tls_get_addr. */
2177 /* The bfd that forced an old-style PLT. */
2180 /* TLS local dynamic got entry handling. */
2182 bfd_signed_vma refcount;
2183 bfd_vma offset;
2186 /* Offset of branch table to PltResolve function in glink. */
2187 bfd_vma glink_pltresolve;
2189 /* Size of reserved GOT entries. */
2191 /* Non-zero if allocating the header left a gap. */
2194 /* The type of PLT we have chosen to use. */
2197 /* True if the target system is VxWorks. */
2200 /* Whether there exist local gnu indirect function resolvers,
2201 referenced by dynamic relocations. */
2205 /* Set if tls optimization is enabled. */
2208 /* Set if inline plt calls should be converted to direct calls. */
2211 /* The size of PLT entries. */
2213 /* The distance between adjacent PLT slots. */
2215 /* The size of the first PLT entry. */
2218 /* Small local sym cache. */
2220 };
2222 /* Rename some of the generic section flags to better document how they
2223 are used for ppc32. The flags are only valid for ppc32 elf objects. */
2225 /* Nonzero if this section has TLS related relocations. */
2226 #define has_tls_reloc sec_flg0
2228 /* Nonzero if this section has a call to __tls_get_addr lacking marker
2229 relocs. */
2230 #define nomark_tls_get_addr sec_flg1
2232 /* Flag set when PLTCALL relocs are detected. */
2233 #define has_pltcall sec_flg2
2235 /* Get the PPC ELF linker hash table from a link_info structure. */
2237 #define ppc_elf_hash_table(p) \
2238 (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
2239 == PPC32_ELF_DATA ? ((struct ppc_elf_link_hash_table *) ((p)->hash)) : NULL)
2241 /* Create an entry in a PPC ELF linker hash table. */
2247 {
2248 /* Allocate the structure if it has not already been allocated by a
2249 subclass. */
2251 {
2256 }
2258 /* Call the allocation method of the superclass. */
2261 {
2266 }
2269 }
2271 /* Create a PPC ELF linker hash table. */
2275 {
2277 static struct ppc_elf_params default_params
2285 ppc_elf_link_hash_newfunc,
2287 PPC32_ELF_DATA))
2288 {
2291 }
2313 }
2315 /* Hook linker params into hash table. */
2317 void
2319 {
2325 }
2327 /* Create .got and the related sections. */
2329 static bfd_boolean
2331 {
2339 {
2340 /* The powerpc .got has a blrl instruction in it. Mark it
2341 executable. */
2346 }
2349 }
2351 /* Create a special linker section, used for R_PPC_EMB_SDAI16 and
2352 R_PPC_EMB_SDA2I16 pointers. These sections become part of .sdata
2353 and .sdata2. Create _SDA_BASE_ and _SDA2_BASE too. */
2355 static bfd_boolean
2358 flagword flags,
2360 {
2371 /* Define the sym on the first section of this name. */
2379 }
2381 static bfd_boolean
2383 {
2386 flagword flags;
2401 {
2409 }
2426 /* Local plt entries. */
2430 flags);
2436 {
2439 htab->relpltlocal
2444 }
2455 }
2457 /* We have to create .dynsbss and .rela.sbss here so that they get mapped
2458 to output sections (just like _bfd_elf_create_dynamic_sections has
2459 to create .dynbss and .rela.bss). */
2461 static bfd_boolean
2463 {
2466 flagword flags;
2488 {
2496 }
2505 /* The VxWorks PLT is a loaded section with contents. */
2508 }
2510 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2512 static void
2516 {
2533 /* If we were called to copy over info for a weak sym, that's all. */
2538 {
2540 {
2544 /* Add reloc counts against the indirect sym to the direct sym
2545 list. Merge any entries against the same section. */
2547 {
2552 {
2557 }
2560 }
2562 }
2566 }
2568 /* Copy over the GOT refcount entries that we may have already seen to
2569 the symbol which just became indirect. */
2573 /* And plt entries. */
2575 {
2577 {
2582 {
2587 {
2591 }
2594 }
2596 }
2600 }
2603 {
2611 }
2612 }
2614 /* Hook called by the linker routine which adds symbols from an object
2615 file. We use it to put .comm items in .sbss, and not .bss. */
2617 static bfd_boolean
2625 {
2630 {
2631 /* Common symbols less than or equal to -G nn bytes are automatically
2632 put into .sbss. */
2637 {
2645 flags);
2648 }
2652 }
2655 }
2656 \f
2657 /* Find a linker generated pointer with a given addend and type. */
2660 elf_find_pointer_linker_section
2662 bfd_vma addend,
2664 {
2670 }
2672 /* Allocate a pointer to live in a linker created section. */
2674 static bfd_boolean
2679 {
2683 bfd_size_type amt;
2687 /* Is this a global symbol? */
2689 {
2692 /* Has this symbol already been allocated? If so, our work is done. */
2696 lsect))
2700 }
2701 else
2702 {
2705 /* Allocation of a pointer to a local symbol. */
2708 /* Allocate a table to hold the local symbols if first time. */
2710 {
2721 }
2723 /* Has this symbol already been allocated? If so, our work is done. */
2726 lsect))
2730 }
2732 /* Allocate space for a pointer in the linker section, and allocate
2733 a new pointer record from internal memory. */
2751 #ifdef DEBUG
2756 #endif
2759 }
2766 {
2772 {
2782 }
2790 }
2792 static bfd_boolean
2795 {
2804 {
2814 }
2817 }
2821 {
2830 }
2832 static bfd_boolean
2834 {
2846 }
2848 /* Relocs on inline plt call sequence insns prior to the call. */
2850 static bfd_boolean
2852 {
2857 }
2859 static void
2861 {
2862 _bfd_error_handler
2863 /* xgettext:c-format */
2865 abfd,
2868 }
2870 /* Look through the relocs for a section during the first phase, and
2871 allocate space in the global offset table or procedure linkage
2872 table. */
2874 static bfd_boolean
2879 {
2891 /* Don't do anything special with non-loaded, non-alloced sections.
2892 In particular, any relocs in such sections should not affect GOT
2893 and PLT reference counting (ie. we don't allow them to create GOT
2894 or PLT entries), there's no possibility or desire to optimize TLS
2895 relocs, and there's not much point in propagating relocs to shared
2896 libs that the dynamic linker won't relocate. */
2900 #ifdef DEBUG
2903 #endif
2907 /* Initialize howto table if not already done. */
2913 {
2918 }
2928 {
2935 bfd_vma addend;
2940 else
2941 {
2946 }
2948 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
2949 This shows up in particular in an R_PPC_ADDR32 in the eabi
2950 startup code. */
2954 {
2960 }
2966 {
2973 {
2974 /* Set PLT_IFUNC flag for this sym, no GOT entry yet. */
2980 /* STT_GNU_IFUNC symbols must have a PLT entry;
2981 In a non-pie executable even when there are
2982 no plt calls. */
2988 {
3000 }
3001 }
3002 }
3008 {
3012 /* We have a new-style __tls_get_addr call with a marker
3013 reloc. */
3014 ;
3015 else
3016 /* Mark this section as having an old-style call. */
3018 }
3021 {
3024 /* These special tls relocs tie a call to __tls_get_addr with
3025 its parameter symbol. */
3028 else
3065 dogottls:
3067 /* Fall through. */
3069 /* GOT16 relocations */
3074 /* This symbol requires a global offset table entry. */
3076 {
3081 }
3083 {
3086 }
3087 else
3088 /* This is a global offset table entry for a local symbol. */
3092 /* We may also need a plt entry if the symbol turns out to be
3093 an ifunc. */
3095 {
3098 }
3101 /* Indirect .sdata relocation. */
3108 {
3111 }
3114 /* Indirect .sdata2 relocation. */
3117 {
3120 }
3126 {
3129 }
3134 /* Fall through. */
3143 {
3146 }
3163 {
3166 }
3169 {
3172 }
3180 {
3183 }
3203 /* Fall through. */
3210 pltentry:
3211 #ifdef DEBUG
3213 #endif
3214 /* This symbol requires a procedure linkage table entry. */
3216 {
3221 }
3222 else
3223 {
3228 }
3240 /* The following relocations don't need to propagate the
3241 relocation if linking a shared object since they are
3242 section relative. */
3262 /* These are just markers. */
3273 /* These should only appear in dynamic objects. */
3281 /* These aren't handled yet. We'll report an error later. */
3290 /* This refers only to functions defined in the shared library. */
3293 {
3296 }
3298 {
3302 }
3305 /* This relocation describes the C++ object vtable hierarchy.
3306 Reconstruct it for later use during GC. */
3312 /* This relocation describes which C++ vtable entries are actually
3313 used. Record for later use during GC. */
3319 /* We shouldn't really be seeing TPREL32. */
3329 /* Nor these. */
3340 {
3341 /* Old -fPIC gcc code has .long LCTOC1-LCFx just before
3342 the start of a function, which assembles to a REL32
3343 reference to .got2. If we detect one of these, then
3344 force the old PLT layout because the linker cannot
3345 reliably deduce the GOT pointer value needed for
3346 PLT call stubs. */
3357 {
3360 }
3361 }
3364 /* fall through */
3374 {
3375 /* We may need a plt entry if the symbol turns out to be
3376 a function defined in a dynamic object. */
3380 /* We may need a copy reloc too. */
3387 }
3397 {
3399 {
3402 }
3404 }
3405 /* fall through */
3412 {
3413 /* We may need a plt entry if the symbol turns out to be
3414 a function defined in a dynamic object. */
3419 }
3421 dodyn:
3422 /* If we are creating a shared library, and this is a reloc
3423 against a global symbol, or a non PC relative reloc
3424 against a local symbol, then we need to copy the reloc
3425 into the shared library. However, if we are linking with
3426 -Bsymbolic, we do not need to copy a reloc against a
3427 global symbol which is defined in an object we are
3428 including in the link (i.e., DEF_REGULAR is set). At
3429 this point we have not seen all the input files, so it is
3430 possible that DEF_REGULAR is not set now but will be set
3431 later (it is never cleared). In case of a weak definition,
3432 DEF_REGULAR may be cleared later by a strong definition in
3433 a shared library. We account for that possibility below by
3434 storing information in the dyn_relocs field of the hash
3435 table entry. A similar situation occurs when creating
3436 shared libraries and symbol visibility changes render the
3437 symbol local.
3439 If on the other hand, we are creating an executable, we
3440 may need to keep relocations for symbols satisfied by a
3441 dynamic library if we manage to avoid copy relocs for the
3442 symbol. */
3449 || (ELIMINATE_COPY_RELOCS
3454 {
3455 #ifdef DEBUG
3457 "ppc_elf_check_relocs needs to "
3461 #endif
3463 {
3467 sreloc = _bfd_elf_make_dynamic_reloc_section
3472 }
3474 /* If this is a global symbol, we count the number of
3475 relocations we need for this symbol. */
3477 {
3484 {
3493 }
3497 }
3498 else
3499 {
3500 /* Track dynamic relocs needed for local syms too.
3501 We really need local syms available to do this
3502 easily. Oh well. */
3505 bfd_boolean is_ifunc;
3526 {
3535 }
3537 }
3538 }
3541 }
3542 }
3545 }
3546 \f
3547 /* Warn for conflicting Tag_GNU_Power_ABI_FP attributes between IBFD
3548 and OBFD, and merge non-conflicting ones. */
3549 bfd_boolean
3551 {
3564 {
3570 ;
3572 {
3576 }
3578 {
3579 _bfd_error_handler
3580 /* xgettext:c-format */
3584 }
3586 {
3587 _bfd_error_handler
3588 /* xgettext:c-format */
3592 }
3594 {
3595 _bfd_error_handler
3596 /* xgettext:c-format */
3600 }
3602 {
3603 _bfd_error_handler
3604 /* xgettext:c-format */
3608 }
3613 ;
3615 {
3619 }
3621 {
3622 _bfd_error_handler
3623 /* xgettext:c-format */
3627 }
3629 {
3630 _bfd_error_handler
3631 /* xgettext:c-format */
3635 }
3637 {
3638 _bfd_error_handler
3639 /* xgettext:c-format */
3643 }
3645 {
3646 _bfd_error_handler
3647 /* xgettext:c-format */
3651 }
3652 }
3655 {
3658 }
3660 }
3662 /* Merge object attributes from IBFD into OBFD. Warn if
3663 there are conflicting attributes. */
3664 static bfd_boolean
3666 {
3670 bfd_boolean ret;
3679 /* Check for conflicting Tag_GNU_Power_ABI_Vector attributes and
3680 merge non-conflicting ones. */
3685 {
3691 ;
3693 {
3697 }
3698 /* For now, allow generic to transition to AltiVec or SPE
3699 without a warning. If GCC marked files with their stack
3700 alignment and used don't-care markings for files which are
3701 not affected by the vector ABI, we could warn about this
3702 case too. */
3704 ;
3706 {
3710 }
3712 {
3713 _bfd_error_handler
3714 /* xgettext:c-format */
3719 }
3721 {
3722 _bfd_error_handler
3723 /* xgettext:c-format */
3728 }
3729 }
3731 /* Check for conflicting Tag_GNU_Power_ABI_Struct_Return attributes
3732 and merge non-conflicting ones. */
3736 {
3742 ;
3744 {
3748 }
3750 {
3751 _bfd_error_handler
3752 /* xgettext:c-format */
3757 }
3759 {
3760 _bfd_error_handler
3761 /* xgettext:c-format */
3766 }
3767 }
3769 {
3772 }
3774 /* Merge Tag_compatibility attributes and any common GNU ones. */
3776 }
3778 /* Merge backend specific data from an object file to the output
3779 object file when linking. */
3781 static bfd_boolean
3783 {
3785 flagword old_flags;
3786 flagword new_flags;
3787 bfd_boolean error;
3792 /* Check if we have the same endianness. */
3802 {
3803 /* First call, no flags set. */
3806 }
3808 /* Compatible flags are ok. */
3810 ;
3812 /* Incompatible flags. */
3813 else
3814 {
3815 /* Warn about -mrelocatable mismatch. Allow -mrelocatable-lib
3816 to be linked with either. */
3820 {
3822 _bfd_error_handler
3825 }
3828 {
3830 _bfd_error_handler
3833 }
3835 /* The output is -mrelocatable-lib iff both the input files are. */
3839 /* The output is -mrelocatable iff it can't be -mrelocatable-lib,
3840 but each input file is either -mrelocatable or -mrelocatable-lib. */
3846 /* Do not warn about eabi vs. V.4 mismatch, just or in the bit if
3847 any module uses it. */
3853 /* Warn about any other mismatches. */
3855 {
3857 _bfd_error_handler
3858 /* xgettext:c-format */
3862 }
3865 {
3868 }
3869 }
3872 }
3874 static void
3879 bfd_vma value,
3880 split16_format_type split16_format,
3881 bfd_boolean fixup)
3882 {
3892 {
3894 {
3897 else
3898 _bfd_error_handler
3899 /* xgettext:c-format */
3902 }
3903 }
3911 {
3913 {
3916 else
3917 _bfd_error_handler
3918 /* xgettext:c-format */
3921 }
3922 }
3924 {
3928 {
3929 /* Hack for e_li. Extend sign. */
3932 }
3933 }
3934 else
3935 {
3938 }
3941 }
3943 static void
3945 {
3949 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
3950 /* Top 4 bits of value to 17..20. */
3952 /* Next 5 bits of the value to 11..15. */
3954 /* And the final 11 bits of the value to bits 21 to 31. */
3957 }
3959 \f
3960 /* Choose which PLT scheme to use, and set .plt flags appropriately.
3961 Returns -1 on error, 0 for old PLT, 1 for new PLT. */
3962 int
3965 {
3967 flagword flags;
3972 {
3986 {
3987 /* Profiling of shared libs (and pies) is not supported with
3988 secure plt, because ppc32 does profiling before a
3989 function prologue and a secure plt pic call stubs needs
3990 r30 to be set up. */
3992 }
3993 else
3994 {
3998 /* Look through the reloc flags left by ppc_elf_check_relocs.
3999 Use the old style bss plt if a file makes plt calls
4000 without using the new relocs, and if ld isn't given
4001 --secure-plt and we never see REL16 relocs. */
4006 {
4010 {
4014 }
4015 }
4017 }
4018 }
4020 {
4023 else
4025 }
4030 {
4034 /* The new PLT is a loaded section. */
4039 /* The new GOT is not executable. */
4043 }
4044 else
4045 {
4046 /* Stop an unused .glink section from affecting .text alignment. */
4050 }
4052 }
4053 \f
4054 /* Return the section that should be marked against GC for a given
4055 relocation. */
4063 {
4066 {
4070 }
4073 }
4075 static bfd_boolean
4083 {
4087 {
4103 {
4109 }
4113 }
4114 else
4115 {
4120 {
4129 }
4142 {
4149 {
4155 }
4157 }
4158 }
4160 }
4161 \f
4162 /* Analyze inline PLT call relocations to see whether calls to locally
4163 defined functions can be converted to direct calls. */
4165 bfd_boolean
4167 {
4177 /* A bl insn can reach -0x2000000 to 0x1fffffc. The limit is
4178 reduced somewhat to cater for possible stubs that might be added
4179 between the call and its destination. */
4185 {
4190 }
4192 /* If a "bl" can reach anywhere in local code sections, then we can
4193 convert all inline PLT sequences to direct calls when the symbol
4194 is local. */
4196 {
4199 }
4201 /* Otherwise, go looking through relocs for cases where a direct
4202 call won't reach. Mark the symbol on any such reloc to disable
4203 the optimization and keep the PLT entry as it seems likely that
4204 this will be better than creating trampolines. Note that this
4205 will disable the optimization for all inline PLT calls to a
4206 particular symbol, not just those that won't reach. The
4207 difficulty in doing a more precise optimization is that the
4208 linker needs to make a decision depending on whether a
4209 particular R_PPC_PLTCALL insn can be turned into a direct
4210 call, for each of the R_PPC_PLTSEQ and R_PPC_PLT16* insns in
4211 the sequence, and there is nothing that ties those relocs
4212 together except their symbol. */
4215 {
4228 {
4231 /* Read the relocations. */
4239 {
4254 {
4261 }
4264 {
4268 else
4278 }
4279 }
4282 }
4286 {
4289 else
4291 }
4292 }
4295 }
4297 /* Set plt output section type, htab->tls_get_addr, and call the
4298 generic ELF tls_setup function. */
4300 asection *
4302 {
4312 {
4319 {
4320 /* If glibc supports an optimized __tls_get_addr call stub,
4321 signalled by the presence of __tls_get_addr_opt, and we'll
4322 be calling __tls_get_addr via a plt call stub, then
4323 make __tls_get_addr point to __tls_get_addr_opt. */
4331 {
4337 {
4343 {
4344 /* Use __tls_get_addr_opt in dynamic relocations. */
4350 }
4352 }
4353 }
4354 }
4355 else
4357 }
4361 {
4364 }
4367 }
4369 /* Return TRUE iff REL is a branch reloc with a global symbol matching
4370 HASH. */
4372 static bfd_boolean
4376 {
4382 {
4392 }
4394 }
4396 /* Run through all the TLS relocs looking for optimization
4397 opportunities. */
4399 bfd_boolean
4402 {
4415 /* Make two passes through the relocs. First time check that tls
4416 relocs involved in setting up a tls_get_addr call are indeed
4417 followed by such a call. If they are not, don't do any tls
4418 optimization. On the second pass twiddle tls_mask flags to
4419 notify relocate_section that optimization can be done, and
4420 adjust got and plt refcounts. */
4423 {
4429 {
4433 /* Read the relocations. */
4441 {
4447 bfd_boolean is_local;
4452 {
4460 }
4464 /* If this section has old-style __tls_get_addr calls
4465 without marker relocs, then check that each
4466 __tls_get_addr call reloc is preceded by a reloc
4467 that conceivably belongs to the __tls_get_addr arg
4468 setup insn. If we don't find matching arg setup
4469 relocs, don't do any tls optimization. */
4474 && !expecting_tls_get_addr
4476 {
4483 }
4487 {
4491 /* Fall through. */
4495 /* These relocs should never be against a symbol
4496 defined in a shared lib. Leave them alone if
4497 that turns out to be the case. */
4501 /* LD -> LE */
4509 /* Fall through. */
4514 /* GD -> LE */
4516 else
4517 /* GD -> IE */
4527 {
4528 /* IE -> LE */
4532 }
4533 else
4539 /* Fall through. */
4543 {
4546 {
4550 {
4559 {
4570 }
4571 }
4572 }
4574 }
4582 }
4585 {
4595 /* Uh oh, we didn't find the expected call. We
4596 could just mark this symbol to exclude it
4597 from tls optimization but it's safer to skip
4598 the entire optimization. */
4605 }
4608 {
4611 }
4612 else
4613 {
4627 }
4629 /* If we don't have old-style __tls_get_addr calls
4630 without TLSGD/TLSLD marker relocs, and we haven't
4631 found a new-style __tls_get_addr call with a
4632 marker for this symbol, then we either have a
4633 broken object file or an -mlongcall style
4634 indirect call to __tls_get_addr without a marker.
4635 Disable optimization in this case. */
4643 {
4655 }
4660 {
4661 /* We managed to get rid of a got entry. */
4664 }
4668 }
4672 }
4673 }
4676 }
4677 \f
4678 /* Find dynamic relocs for H that apply to read-only sections. */
4682 {
4686 {
4691 }
4693 }
4695 /* Return true if we have dynamic relocs against H or any of its weak
4696 aliases, that apply to read-only sections. Cannot be used after
4697 size_dynamic_sections. */
4699 static bfd_boolean
4701 {
4703 do
4704 {
4711 }
4713 /* Return whether H has pc-relative dynamic relocs. */
4715 static bfd_boolean
4717 {
4724 }
4726 /* Adjust a symbol defined by a dynamic object and referenced by a
4727 regular object. The current definition is in some section of the
4728 dynamic object, but we're not including those sections. We have to
4729 change the definition to something the rest of the link can
4730 understand. */
4732 static bfd_boolean
4735 {
4739 #ifdef DEBUG
4742 #endif
4744 /* Make sure we know what is going on here. */
4754 /* Deal with function syms. */
4758 {
4761 /* Discard dyn_relocs when non-pic if we've decided that a
4762 function symbol is local. */
4766 /* Clear procedure linkage table information for any symbol that
4767 won't need a .plt entry. */
4774 && local
4778 {
4779 /* A PLT entry is not required/allowed when:
4781 1. We are not using ld.so; because then the PLT entry
4782 can't be set up, so we can't use one. In this case,
4783 ppc_elf_adjust_dynamic_symbol won't even be called.
4785 2. GC has rendered the entry unused.
4787 3. We know for certain that a call to this symbol
4788 will go to this object, or will remain undefined. */
4792 }
4793 else
4794 {
4795 /* Taking a function's address in a read/write section
4796 doesn't require us to define the function symbol in the
4797 executable on a plt call stub. A dynamic reloc can
4798 be used instead, giving better runtime performance.
4799 (Calls via that function pointer don't need to bounce
4800 through the plt call stub.) Similarly, use a dynamic
4801 reloc for a weak reference when possible, allowing the
4802 resolution of the symbol to be set at load time rather
4803 than link time. */
4811 {
4813 /* If we haven't seen a branch reloc and the symbol
4814 isn't an ifunc then we don't need a plt entry. */
4817 }
4819 /* We are going to be defining the function symbol on the
4820 plt stub, so no dyn_relocs needed when non-pic. */
4822 }
4824 /* Function symbols can't have copy relocs. */
4826 }
4827 else
4830 /* If this is a weak symbol, and there is a real definition, the
4831 processor independent code will have arranged for us to see the
4832 real definition first, and we can just use the same value. */
4834 {
4844 }
4846 /* This is a reference to a symbol defined by a dynamic object which
4847 is not a function. */
4849 /* If we are creating a shared library, we must presume that the
4850 only references to the symbol are via the global offset table.
4851 For such cases we need not do anything here; the relocations will
4852 be handled correctly by relocate_section. */
4854 {
4857 }
4859 /* If there are no references to this symbol that do not use the
4860 GOT, we don't need to generate a copy reloc. */
4862 {
4865 }
4867 /* Protected variables do not work with .dynbss. The copy in
4868 .dynbss won't be used by the shared library with the protected
4869 definition for the variable. Editing to PIC, or text relocations
4870 are preferable to an incorrect program. */
4872 {
4880 }
4882 /* If -z nocopyreloc was given, we won't generate them either. */
4886 /* If we don't find any dynamic relocs in read-only sections, then
4887 we'll be keeping the dynamic relocs and avoiding the copy reloc.
4888 We can't do this if there are any small data relocations. This
4889 doesn't work on VxWorks, where we can not have dynamic
4890 relocations (other than copy and jump slot relocations) in an
4891 executable. */
4899 /* We must allocate the symbol in our .dynbss section, which will
4900 become part of the .bss section of the executable. There will be
4901 an entry for this symbol in the .dynsym section. The dynamic
4902 object will contain position independent code, so all references
4903 from the dynamic object to this symbol will go through the global
4904 offset table. The dynamic linker will use the .dynsym entry to
4905 determine the address it must put in the global offset table, so
4906 both the dynamic object and the regular object will refer to the
4907 same memory location for the variable.
4909 Of course, if the symbol is referenced using SDAREL relocs, we
4910 must instead allocate it in .sbss. */
4915 else
4920 {
4923 /* We must generate a R_PPC_COPY reloc to tell the dynamic
4924 linker to copy the initial value out of the dynamic object
4925 and into the runtime process image. */
4930 else
4935 }
4937 /* We no longer want dyn_relocs. */
4940 }
4941 \f
4942 /* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
4943 xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
4944 specifying the addend on the plt relocation. For -fpic code, the sym
4945 is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
4946 xxxxxxxx.got2.plt_pic32.<callee>. */
4948 static bfd_boolean
4952 {
4961 else
4981 {
4991 }
4993 }
4995 /* Allocate NEED contiguous space in .got, and return the offset.
4996 Handles allocation of the got header when crossing 32k. */
4998 static bfd_vma
5000 {
5001 bfd_vma where;
5005 {
5008 }
5009 else
5010 {
5013 {
5016 }
5017 else
5018 {
5021 {
5024 }
5027 }
5028 }
5030 }
5032 /* Calculate size of GOT entries for symbol given its TLS_MASK.
5033 TLS_LD is excluded because those go in a special GOT slot. */
5037 {
5041 else
5042 {
5050 }
5052 }
5054 /* If H is undefined, make it dynamic if that makes sense. */
5056 static bfd_boolean
5059 {
5071 }
5073 /* Allocate space in associated reloc sections for dynamic relocs. */
5075 static bfd_boolean
5077 {
5082 bfd_boolean dyn;
5090 || (ELIMINATE_COPY_RELOCS
5096 {
5099 /* Make sure this symbol is output as a dynamic symbol. */
5105 {
5107 /* We'll just use htab->tlsld_got.offset. This should
5108 always be the case. It's a little odd if we have
5109 a local dynamic reloc against a non-local symbol. */
5111 else
5113 }
5117 else
5118 {
5128 {
5138 }
5139 }
5140 }
5141 else
5144 /* If no dynamic sections we can't have dynamic relocs, except for
5145 IFUNCs which are handled even in static executables. */
5150 /* Discard relocs on undefined symbols that must be local. */
5155 /* Also discard relocs on undefined weak syms with non-default
5156 visibility, or when dynamic_undefined_weak says so. */
5161 ;
5163 /* In the shared -Bsymbolic case, discard space allocated for
5164 dynamic pc-relative relocs against symbols which turn out to be
5165 defined in regular objects. For the normal shared case, discard
5166 space for relocs that have become local due to symbol visibility
5167 changes. */
5169 {
5170 /* Relocs that use pc_count are those that appear on a call insn,
5171 or certain REL relocs (see must_be_dyn_reloc) that can be
5172 generated via assembly. We want calls to protected symbols to
5173 resolve directly to the function rather than going via the plt.
5174 If people want function pointer comparisons to work as expected
5175 then they should avoid writing weird assembly. */
5177 {
5181 {
5186 else
5188 }
5189 }
5192 {
5196 {
5199 else
5201 }
5202 }
5205 {
5206 /* Make sure this symbol is output as a dynamic symbol. */
5209 }
5210 }
5212 {
5213 /* For the non-pic case, discard space for relocs against
5214 symbols which turn out to need copy relocs or are not
5215 dynamic. */
5223 {
5224 /* Make sure this symbol is output as a dynamic symbol. */
5230 }
5231 else
5233 }
5235 /* Allocate space. */
5237 {
5242 }
5244 /* Handle PLT relocs. Done last, after dynindx has settled.
5245 We might need a PLT entry when the symbol
5246 a) is dynamic, or
5247 b) is an ifunc, or
5248 c) has plt16 relocs and has been processed by adjust_dynamic_symbol, or
5249 d) has plt16 relocs and we are linking statically. */
5260 {
5267 {
5271 {
5274 else
5276 }
5279 {
5281 {
5284 }
5289 else
5290 {
5293 {
5296 }
5301 {
5304 }
5310 }
5311 }
5312 else
5313 {
5315 {
5316 /* If this is the first .plt entry, make room
5317 for the special first entry. */
5321 /* The PowerPC PLT is actually composed of two
5322 parts, the first part is 2 words (for a load
5323 and a jump), and then there is a remaining
5324 word available at the end. */
5331 /* If this symbol is not defined in a regular
5332 file, and we are not generating a shared
5333 library, then set the symbol to this location
5334 in the .plt. This is to avoid text
5335 relocations, and is required to make
5336 function pointers compare as equal between
5337 the normal executable and the shared library. */
5341 {
5344 }
5346 /* Make room for this entry. */
5348 /* After the 8192nd entry, room for two entries
5349 is allocated. */
5355 }
5357 }
5359 /* We also need to make an entry in the .rela.plt section. */
5361 {
5363 {
5365 {
5368 }
5370 {
5373 }
5374 }
5375 else
5376 {
5380 {
5381 /* Allocate space for the unloaded relocations. */
5384 {
5387 {
5391 }
5396 }
5398 /* Every PLT entry has an associated GOT entry in
5399 .got.plt. */
5401 }
5402 }
5404 }
5405 }
5406 else
5410 {
5413 }
5414 }
5415 else
5416 {
5419 }
5422 }
5424 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
5425 read-only sections. */
5427 static bfd_boolean
5429 {
5437 {
5445 /* Not an error, just cut short the traversal. */
5447 }
5449 }
5452 {
5463 };
5465 /* Set the sizes of the dynamic sections. */
5467 static bfd_boolean
5470 {
5473 bfd_boolean relocs;
5476 #ifdef DEBUG
5478 #endif
5484 {
5485 /* Set the contents of the .interp section to the interpreter. */
5487 {
5492 }
5493 }
5500 /* Set up .got offsets for local syms, and space for local dynamic
5501 relocs. */
5503 {
5509 bfd_size_type locsymcount;
5516 {
5523 {
5526 {
5527 /* Input section has been discarded, either because
5528 it is a copy of a linkonce section or due to
5529 linker script /DISCARD/, so we'll be discarding
5530 the relocs too. */
5531 }
5535 {
5536 /* Relocations in vxworks .tls_vars sections are
5537 handled specially by the loader. */
5538 }
5540 {
5548 {
5552 }
5553 }
5554 }
5555 }
5570 {
5577 else
5578 {
5583 {
5591 }
5592 }
5593 }
5594 else
5600 /* Allocate space for calls to local STT_GNU_IFUNC syms in .iplt. */
5603 {
5610 {
5615 {
5618 }
5619 else
5623 {
5626 }
5630 {
5634 }
5638 {
5640 {
5643 }
5645 {
5648 }
5650 }
5651 }
5652 else
5654 }
5655 }
5657 /* Allocate space for global sym dynamic relocs. */
5661 {
5665 }
5666 else
5670 {
5673 /* If we haven't allocated the header, do so now. When we get here,
5674 for old plt/got the got size will be 0 to 32764 (not allocated),
5675 or 32780 to 65536 (header allocated). For new plt/got, the
5676 corresponding ranges are 0 to 32768 and 32780 to 65536. */
5678 {
5683 }
5686 }
5688 {
5693 }
5695 {
5703 }
5708 {
5710 /* Space for the branch table. */
5713 /* Pad out to align the start of PLTresolve. */
5719 {
5726 {
5736 }
5742 {
5752 }
5753 }
5754 }
5761 {
5765 {
5769 }
5770 }
5772 /* We've now determined the sizes of the various dynamic sections.
5773 Allocate memory for them. */
5776 {
5784 {
5785 /* We'd like to strip these sections if they aren't needed, but if
5786 we've exported dynamic symbols from them we must leave them.
5787 It's too late to tell BFD to get rid of the symbols. */
5790 /* Strip this section if we don't need it; see the
5791 comment below. */
5792 }
5802 {
5803 /* Strip these too. */
5804 }
5807 {
5809 }
5811 {
5813 {
5814 /* Remember whether there are any relocation sections. */
5817 /* We use the reloc_count field as a counter if we need
5818 to copy relocs into the output file. */
5820 }
5821 }
5822 else
5823 {
5824 /* It's not one of our sections, so don't allocate space. */
5826 }
5829 {
5830 /* If we don't need this section, strip it from the
5831 output file. This is mostly to handle .rela.bss and
5832 .rela.plt. We must create both sections in
5833 create_dynamic_sections, because they must be created
5834 before the linker maps input sections to output
5835 sections. The linker does that before
5836 adjust_dynamic_symbol is called, and it is that
5837 function which decides whether anything needs to go
5838 into these sections. */
5841 }
5846 /* Allocate memory for the section contents. */
5850 }
5853 {
5854 /* Add some entries to the .dynamic section. We fill in the
5855 values later, in ppc_elf_finish_dynamic_sections, but we
5856 must add the entries now so that we get the correct size for
5857 the .dynamic section. The DT_DEBUG entry is filled in by the
5858 dynamic linker and used by the debugger. */
5859 #define add_dynamic_entry(TAG, VAL) \
5860 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
5863 {
5866 }
5869 {
5875 }
5880 {
5888 }
5891 {
5896 }
5898 /* If any dynamic relocs apply to a read-only section, then we
5899 need a DT_TEXTREL entry. */
5902 info);
5905 {
5908 }
5912 }
5913 #undef add_dynamic_entry
5917 {
5919 bfd_vma val;
5922 /* CIE length (rewrite in case little-endian). */
5925 /* FDE length. */
5929 /* CIE pointer. */
5933 /* Offset to .glink. Set later. */
5935 /* .glink size. */
5938 /* Augmentation. */
5943 {
5948 {
5951 }
5953 {
5957 }
5958 else
5959 {
5963 }
5966 p++;
5970 }
5973 }
5976 }
5978 /* Arrange to have _SDA_BASE_ or _SDA2_BASE_ stripped from the output
5979 if it looks like nothing is using them. */
5981 static void
5983 {
5987 {
5992 {
5995 {
5997 /* This is somewhat magic. See elf_link_output_extsym. */
6000 }
6001 }
6002 }
6003 }
6005 void
6007 {
6011 {
6014 }
6015 }
6018 /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */
6020 static bfd_boolean
6022 {
6030 }
6031 \f
6032 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
6034 /* Relaxation trampolines. r12 is available for clobbering (r11, is
6035 used for some functions that are allowed to break the ABI). */
6037 {
6046 };
6049 {
6054 };
6056 struct ppc_elf_relax_info
6057 {
6060 };
6062 /* This function implements long branch trampolines, and the ppc476
6063 icache bug workaround. Any section needing trampolines or patch
6064 space for the workaround has its size extended so that we can
6065 add trampolines at the end of the section. */
6067 static bfd_boolean
6072 {
6073 struct one_branch_fixup
6074 {
6077 /* Final link, can use the symbol offset. For a
6078 relocatable link we use the symbol's index. */
6079 bfd_vma toff;
6080 bfd_vma trampoff;
6081 };
6091 bfd_boolean workaround_change;
6095 bfd_boolean maybe_pasted;
6099 /* No need to do anything with non-alloc or non-code sections. */
6106 /* We cannot represent the required PIC relocs in the output, so don't
6107 do anything. The linker doesn't support mixing -shared and -r
6108 anyway. */
6127 {
6129 {
6134 }
6137 }
6141 /* Space for a branch around any trampolines. */
6150 {
6151 /* Get a copy of the native relocations. */
6153 {
6158 }
6164 {
6179 {
6200 }
6202 /* Get the value of the symbol referred to by the reloc. */
6208 {
6210 ;
6213 else
6218 }
6219 else
6220 {
6225 {
6231 }
6232 else
6235 /* If this branch is to __tls_get_addr then we may later
6236 optimise away the call. We won't be needing a long-
6237 branch stub in that case. */
6241 {
6246 /* The previous reloc should be one of R_PPC_TLSGD or
6247 R_PPC_TLSLD, or for older object files, a reloc
6248 on the __tls_get_addr arg setup insn. Get tls
6249 mask bits from the symbol on that reloc. */
6251 {
6255 {
6261 }
6262 }
6263 else
6264 {
6272 tls_mask
6274 }
6276 /* The mask bits tell us if the call will be
6277 optimised away. */
6288 }
6291 }
6294 {
6302 }
6304 /* The condition here under which we call find_plt_ent must
6305 match that in relocate_section. If we call find_plt_ent here
6306 but not in relocate_section, or vice versa, then the branch
6307 destination used here may be incorrect. */
6310 {
6311 /* We know is_branch_reloc (r_type) is true. */
6315 }
6318 {
6323 }
6325 {
6333 {
6338 {
6341 }
6342 else
6343 {
6346 }
6347 }
6348 }
6350 /* If the branch and target are in the same section, you have
6351 no hope of adding stubs. We'll error out later should the
6352 branch overflow. */
6356 /* toff is used for the symbol index when the symbol is
6357 undefined and we're doing a relocatable link, so we can't
6358 support addends. It would be possible to do so by
6359 putting the addend in one_branch_fixup but addends on
6360 branches are rare so it hardly seems worth supporting. */
6367 /* There probably isn't any reason to handle symbols in
6368 SEC_MERGE sections; SEC_MERGE doesn't seem a likely
6369 attribute for a code section, and we are only looking at
6370 branches. However, implement it correctly here as a
6371 reference for other target relax_section functions. */
6373 {
6374 /* At this stage in linking, no SEC_MERGE symbol has been
6375 adjusted, so all references to such symbols need to be
6376 passed through _bfd_merged_section_offset. (Later, in
6377 relocate_section, all SEC_MERGE symbols *except* for
6378 section symbols have been adjusted.)
6380 gas may reduce relocations against symbols in SEC_MERGE
6381 sections to a relocation against the section symbol when
6382 the original addend was zero. When the reloc is against
6383 a section symbol we should include the addend in the
6384 offset passed to _bfd_merged_section_offset, since the
6385 location of interest is the original symbol. On the
6386 other hand, an access to "sym+addend" where "sym" is not
6387 a section symbol should not include the addend; Such an
6388 access is presumed to be an offset from "sym"; The
6389 location of interest is just "sym". */
6394 toff
6397 toff);
6402 }
6403 /* PLTREL24 addends are special. */
6407 /* Attempted -shared link of non-pic code loses. */
6417 /* Avoid creating a lot of unnecessary fixups when
6418 relocatable if the output section size is such that a
6419 fixup can be created at final link.
6420 The max_branch_offset adjustment allows for some number
6421 of other fixups being needed at final link. */
6427 /* If the branch is in range, no need to do anything. */
6430 /* A relocatable link may have sections moved during
6431 final link, so do not presume they remain in range. */
6433 {
6441 }
6443 /* Look for an existing fixup to this address. */
6449 {
6455 /* Oh dear, we can't reach a trampoline. Don't try to add
6456 one. We'll report an error later. */
6460 {
6463 }
6464 else
6465 {
6468 }
6472 {
6476 }
6478 /* Hijack the old relocation. Since we need two
6479 relocations for this use a "composite" reloc. */
6481 stub_rtype);
6487 /* Record the fixup so we don't do it again this section. */
6496 changes++;
6497 }
6498 else
6499 {
6504 /* Nop out the reloc, since we're finalizing things here. */
6506 }
6508 /* Get the section contents. */
6510 {
6511 /* Get cached copy if it exists. */
6514 /* Go get them off disk. */
6517 }
6519 /* Fix up the existing branch to hit the trampoline. */
6522 {
6540 }
6541 }
6544 {
6548 }
6549 }
6556 {
6566 {
6567 /* Keep space aligned, to ensure the patch code itself does
6568 not cross a page. Don't decrease size calculated on a
6569 previous pass as otherwise we might never settle on a layout. */
6573 {
6576 }
6577 /* Ensure relocate_section is called. */
6579 }
6581 }
6584 {
6589 }
6596 {
6599 else
6600 {
6601 /* Cache the symbols for elf_link_input_bfd. */
6603 }
6604 }
6608 {
6611 else
6612 {
6613 /* Cache the section contents for elf_link_input_bfd. */
6615 }
6616 }
6620 {
6621 /* Append sufficient NOP relocs so we can write out relocation
6622 information for the trampolines. */
6633 {
6637 }
6644 }
6652 error_return:
6654 {
6658 }
6668 }
6669 \f
6670 /* What to do when ld finds relocations against symbols defined in
6671 discarded sections. */
6673 static unsigned int
6675 {
6683 }
6684 \f
6685 /* Fill in the address for a pointer generated in a linker section. */
6687 static bfd_vma
6691 bfd_vma relocation,
6693 {
6699 {
6700 /* Handle global symbol. */
6706 }
6707 else
6708 {
6709 /* Handle local symbol. */
6715 }
6719 lsect);
6722 /* Offset will always be a multiple of four, so use the bottom bit
6723 as a "written" flag. */
6725 {
6730 }
6737 #ifdef DEBUG
6741 #endif
6744 }
6746 #define PPC_LO(v) ((v) & 0xffff)
6747 #define PPC_HI(v) (((v) >> 16) & 0xffff)
6748 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
6750 static void
6754 {
6757 bfd_vma plt;
6763 {
6780 }
6787 {
6801 else
6802 {
6806 }
6807 }
6808 else
6809 {
6813 }
6820 {
6823 }
6824 }
6826 /* Return true if symbol is defined statically. */
6828 static bfd_boolean
6830 {
6835 }
6837 /* If INSN is an opcode that may be used with an @tls operand, return
6838 the transformed insn for TLS optimisation, otherwise return 0. If
6839 REG is non-zero only match an insn with RB or RA equal to REG. */
6841 unsigned int
6843 {
6853 else
6857 /* add -> addi. */
6863 /* load and store indexed -> dform. */
6866 /* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
6869 /* lwax -> lwa. */
6871 else
6875 }
6877 /* If INSN is an opcode that may be used with an @tprel operand, return
6878 the transformed insn for an undefined weak symbol, ie. with the
6879 thread pointer REG operand removed. Otherwise return 0. */
6881 unsigned int
6883 {
6904 {
6906 }
6911 {
6916 }
6917 else
6920 }
6922 static bfd_boolean
6924 {
6929 }
6931 static bfd_boolean
6933 {
6937 }
6939 /* The RELOCATE_SECTION function is called by the ELF backend linker
6940 to handle the relocations for a section.
6942 The relocs are always passed as Rela structures; if the section
6943 actually uses Rel structures, the r_addend field will always be
6944 zero.
6946 This function is responsible for adjust the section contents as
6947 necessary, and (if using Rela relocs and generating a
6948 relocatable output file) adjusting the reloc addend as
6949 necessary.
6951 This function does not have to worry about setting the reloc
6952 address or the reloc symbol index.
6954 LOCAL_SYMS is a pointer to the swapped in local symbols.
6956 LOCAL_SECTIONS is an array giving the section in the input file
6957 corresponding to the st_shndx field of each local symbol.
6959 The global hash table entry for the global symbols can be found
6960 via elf_sym_hashes (input_bfd).
6962 When generating relocatable output, this function must handle
6963 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
6964 going to be the section symbol corresponding to the output
6965 section, which means that the addend must be adjusted
6966 accordingly. */
6968 static bfd_boolean
6977 {
6984 Elf_Internal_Rela outrel;
6989 bfd_boolean is_vxworks_tls;
6993 #ifdef DEBUG
6999 #endif
7002 {
7005 }
7009 /* Initialize howto table if not already done. */
7017 /* We have to handle relocations in vxworks .tls_vars sections
7018 specially, because the dynamic loader is 'weird'. */
7027 {
7029 bfd_vma addend;
7030 bfd_reloc_status_type r;
7037 bfd_vma relocation;
7040 bfd_boolean warned;
7045 again:
7055 {
7061 }
7062 else
7063 {
7064 bfd_boolean ignored;
7072 }
7075 {
7076 /* For relocs against symbols from removed linkonce sections,
7077 or sections discarded by a linker script, we just want the
7078 section contents zeroed. Avoid any special processing. */
7089 /* For ld -r, remove relocations in debug sections against
7090 symbols defined in discarded sections. Not done for
7091 non-debug to preserve relocs in .eh_frame which the
7092 eh_frame editing code expects to be present. */
7095 wrel--;
7098 }
7101 {
7105 {
7106 /* R_PPC_PLTREL24 is rather special. If non-zero, the
7107 addend specifies the GOT pointer offset within .got2. */
7109 }
7114 }
7116 /* TLS optimizations. Replace instruction sequences and relocs
7117 based on information we collected in tls_optimize. We edit
7118 RELOCS so that --emit-relocs will output something sensible
7119 for the final instruction stream. */
7125 {
7128 local_plt
7132 }
7134 /* Ensure reloc mapping code below stays sane. */
7145 {
7153 {
7154 bfd_vma insn;
7164 }
7170 {
7171 bfd_vma insn;
7181 /* Was PPC_TLS which sits on insn boundary, now
7182 PPC_TPREL16_LO which is at low-order half-word. */
7184 }
7197 {
7198 tls_gdld_hi:
7202 else
7203 {
7207 }
7209 }
7222 {
7224 bfd_vma offset;
7226 tls_ldgd_opt:
7228 /* If not using the newer R_PPC_TLSGD/LD to mark
7229 __tls_get_addr calls, we must trust that the call
7230 stays with its arg setup insns, ie. that the next
7231 reloc is the __tls_get_addr call associated with
7232 the current reloc. Edit both insns. */
7238 /* We read the low GOT_TLS insn because we need to keep
7239 the destination reg. It may be something other than
7240 the usual r3, and moved to r3 before the call by
7241 intervening code. */
7245 {
7246 /* IE */
7250 {
7254 }
7258 }
7259 else
7260 {
7261 /* LE */
7265 {
7266 /* Was an LD reloc. */
7269 r_symndx++)
7279 }
7283 {
7289 }
7290 }
7294 {
7295 /* We changed the symbol on an LD reloc. Start over
7296 in order to get h, sym, sec etc. right. */
7298 }
7299 }
7305 {
7310 {
7314 }
7317 {
7318 /* IE */
7321 }
7322 else
7323 {
7324 /* LE */
7328 }
7331 /* Zap the reloc on the _tls_get_addr call too. */
7334 }
7340 {
7344 {
7348 }
7352 r_symndx++)
7368 /* Zap the reloc on the _tls_get_addr call too. */
7372 }
7374 }
7376 /* Handle other relocations that tweak non-addend part of insn. */
7379 {
7383 /* Branch taken prediction relocations. */
7387 /* Fall through. */
7389 /* Branch not taken prediction relocations. */
7392 {
7403 /* Invert 'y' bit if not the default. */
7408 }
7412 {
7419 {
7421 {
7422 /* Convert addis to lis. */
7426 }
7427 }
7433 }
7435 }
7444 {
7445 /* Convert lis;addi or lis;load/store accessing a protected
7446 variable defined in a shared library to PIC. */
7450 {
7455 {
7457 bfd_vma off;
7458 bfd_vma got_addr;
7482 /* Convert lis to lwz, loading address from GOT. */
7492 /* Use one of the spare relocs, so --emit-relocs
7493 output is reasonable. */
7500 /* Continue on as if we had a got reloc, to output
7501 dynamic reloc. */
7503 }
7504 else
7505 _bfd_error_handler
7506 /* xgettext:c-format */
7511 }
7513 {
7534 {
7535 /* Arrange to apply the reloc addend, if any. */
7539 }
7540 else
7541 _bfd_error_handler
7542 /* xgettext:c-format */
7547 }
7548 }
7552 {
7556 {
7559 }
7562 {
7568 }
7577 {
7586 }
7588 {
7595 {
7596 /* Uh oh, we are going to create a pic glink stub
7597 for an ifunc (here for h == NULL and later in
7598 finish_dynamic_symbol for h != NULL), and
7599 apparently are using code compiled with
7600 -mbss-plt. The difficulty is that -mbss-plt code
7601 gives no indication via a magic PLTREL24 addend
7602 whether r30 is equal to _GLOBAL_OFFSET_TABLE_ or
7603 is pointing into a .got2 section (and how far
7604 into .got2). */
7606 /* xgettext:c-format */
7609 }
7619 else
7623 }
7624 }
7633 {
7639 {
7644 /* xgettext:c-format */
7648 else
7650 }
7655 {
7661 }
7663 }
7667 {
7669 /* xgettext:c-format */
7686 /* GOT16 relocations. Like an ADDR16 using the symbol's
7687 address in the GOT as relocation value instead of the
7688 symbol's value itself. Also, create a GOT entry for the
7689 symbol and put the symbol value there. */
7723 dogot:
7724 {
7725 /* Relocation is to the entry for this symbol in the global
7726 offset table. */
7727 bfd_vma off;
7739 {
7744 /* This is actually a static link, or it is a
7745 -Bsymbolic link and the symbol is defined
7746 locally, or the symbol was forced to be local
7747 because of a version file. */
7748 ;
7749 else
7750 {
7753 }
7755 }
7756 else
7757 {
7761 }
7763 /* The offset must always be a multiple of 4. We use the
7764 least significant bit to record whether we have already
7765 processed this entry. */
7769 else
7770 {
7782 /* We might have multiple got entries for this sym.
7783 Initialize them all. */
7784 do
7785 {
7789 {
7792 }
7794 {
7797 }
7799 {
7802 }
7804 {
7807 }
7809 /* Generate relocs for the dynamic linker. */
7817 {
7822 {
7828 }
7834 {
7837 {
7844 outrel.r_info
7846 }
7847 }
7856 else
7859 {
7862 {
7865 else
7867 }
7868 }
7873 }
7875 /* Init the .got section contents if we're not
7876 emitting a reloc. */
7877 else
7878 {
7882 {
7885 else
7886 {
7889 else
7893 }
7896 {
7900 }
7901 }
7904 }
7909 }
7914 }
7920 {
7922 {
7927 {
7931 {
7934 }
7935 }
7936 }
7937 }
7939 /* If here for a picfixup, we're done. */
7945 + off
7948 /* Addends on got relocations don't make much sense.
7949 x+off@got is actually x@got+off, and since the got is
7950 generated by a hash table traversal, the value in the
7951 got at entry m+n bears little relation to the entry m. */
7954 /* xgettext:c-format */
7958 sym_name);
7959 }
7962 /* Relocations that need no special processing. */
7964 /* It makes no sense to point a local relocation
7965 at a symbol not in this object. */
7967 {
7970 input_bfd,
7971 input_section,
7973 TRUE);
7975 }
7977 {
7978 /* @local on an ifunc does not really make sense since
7979 the ifunc resolver can take you anywhere. More
7980 seriously, calls to ifuncs must go through a plt call
7981 stub, and for pic the plt call stubs uses r30 to
7982 access the PLT. The problem is that a call that is
7983 local won't have the +32k reloc addend trick marking
7984 -fPIC code, so the linker won't know whether r30 is
7985 _GLOBAL_OFFSET_TABLE_ or pointing into a .got2 section. */
7986 /* xgettext:c-format */
7990 }
8001 /* Relocations that may need to be propagated if this is a shared
8002 object. */
8010 {
8011 /* Make this relocation against an undefined weak symbol
8012 resolve to zero. This is really just a tweak, since
8013 code using weak externs ought to check that they are
8014 defined before using them. */
8021 }
8024 /* The TPREL16 relocs shouldn't really be used in shared
8025 libs or with non-local symbols as that will result in
8026 DT_TEXTREL being set, but support them anyway. */
8054 /* fall through */
8072 /* If these relocations are not to a named symbol, they can be
8073 handled right here, no need to bother the dynamic linker. */
8077 /* fall through */
8085 /* fall through */
8087 dodyn:
8099 {
8105 #ifdef DEBUG
8110 #endif
8112 /* When generating a shared object, these relocations
8113 are copied into the output file to be resolved at run
8114 time. */
8117 input_section,
8125 /* Optimize unaligned reloc use. */
8136 {
8142 }
8143 else
8144 {
8148 {
8150 {
8151 /* If we get here when building a static
8152 executable, then the libc startup function
8153 responsible for applying indirect function
8154 relocations is going to complain about
8155 the reloc type.
8156 If we get here when building a dynamic
8157 executable, it will be because we have
8158 a text relocation. The dynamic loader
8159 will set the text segment writable and
8160 non-executable to apply text relocations.
8161 So we'll segfault when trying to run the
8162 indirection function to resolve the reloc. */
8164 /* xgettext:c-format */
8169 sym_name);
8171 }
8173 ;
8175 {
8178 }
8179 else
8180 {
8183 /* We are turning this relocation into one
8184 against a section symbol. It would be
8185 proper to subtract the symbol's value,
8186 osec->vma, from the emitted reloc addend,
8187 but ld.so expects buggy relocs.
8188 FIXME: Why not always use a zero index? */
8191 {
8194 }
8195 else
8196 {
8199 {
8202 }
8204 }
8206 /* ld.so doesn't expect buggy TLS relocs.
8207 Don't leave the symbol value in the
8208 addend for them. */
8211 }
8214 }
8217 else
8219 }
8223 {
8229 }
8240 /* This reloc will be computed at runtime. Clear the memory
8241 so that it contains a predictable value for prelink. */
8243 {
8247 }
8248 }
8254 {
8259 {
8263 }
8269 else
8273 }
8274 /* Fall through. */
8277 {
8284 {
8294 }
8295 else
8296 {
8299 }
8305 /* First insn is HA, second is LO. */
8318 {
8323 }
8325 /* Rewrite the reloc and convert one of the trailing nop
8326 relocs to describe this relocation. */
8328 /* The relocs are at the bottom 2 bytes */
8336 }
8339 /* Indirect .sdata relocation. */
8343 {
8346 }
8347 relocation
8353 /* Indirect .sdata2 relocation. */
8357 {
8360 }
8361 relocation
8367 /* Handle the TOC16 reloc. We want to use the offset within the .got
8368 section, not the actual VMA. This is appropriate when generating
8369 an embedded ELF object, for which the .got section acts like the
8370 AIX .toc section. */
8373 {
8376 }
8385 {
8392 {
8393 /* We didn't make a PLT entry for this symbol. This
8394 happens when statically linking PIC code, or when
8395 using -Bsymbolic. */
8396 }
8397 else
8398 {
8399 /* Relocation is to the entry for this symbol in the
8400 procedure linkage table. */
8406 else
8410 }
8411 }
8413 /* R_PPC_PLTREL24 is rather special. If non-zero, the
8414 addend specifies the GOT pointer offset within .got2.
8415 Don't apply it to the relocation field. */
8430 {
8435 }
8438 {
8444 {
8452 {
8455 else
8457 }
8462 {
8469 else
8472 }
8473 }
8474 }
8478 /* Relocate against _SDA_BASE_. */
8480 {
8487 {
8490 }
8496 {
8497 _bfd_error_handler
8498 /* xgettext:c-format */
8501 input_bfd,
8502 sym_name,
8504 name);
8505 }
8506 }
8509 /* Relocate against _SDA2_BASE_. */
8511 {
8518 {
8521 }
8527 {
8528 _bfd_error_handler
8529 /* xgettext:c-format */
8532 input_bfd,
8533 sym_name,
8535 name);
8536 }
8537 }
8582 /* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
8587 {
8594 {
8597 }
8602 {
8605 }
8608 {
8611 }
8614 {
8616 }
8617 else
8618 {
8619 _bfd_error_handler
8620 /* xgettext:c-format */
8623 input_bfd,
8624 sym_name,
8626 name);
8631 }
8634 {
8636 {
8639 }
8641 }
8646 /* The PowerPC Embedded Application Binary Interface
8647 version 1.0 insanely chose to specify R_PPC_EMB_SDA21
8648 operating on a 24-bit field at r_offset. GNU as and
8649 GNU ld have always assumed R_PPC_EMB_SDA21 operates on
8650 a 32-bit bit insn at r_offset. Cope with object file
8651 producers that possibly comply with the EABI in
8652 generating an odd r_offset for big-endian objects. */
8660 {
8664 /* Force e_li insn, keeping RT from original insn. */
8668 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
8669 /* Top 4 bits of value to 17..20. */
8671 /* Next 5 bits of the value to 11..15. */
8673 /* And the final 11 bits of the value to bits 21 to 31. */
8682 }
8683 /* Fill in register field. */
8686 }
8695 {
8696 bfd_vma value;
8701 {
8704 }
8713 else
8714 {
8715 _bfd_error_handler
8716 /* xgettext:c-format */
8719 input_bfd,
8720 sym_name,
8722 name);
8727 }
8730 {
8733 }
8739 split16a_type,
8744 split16d_type,
8747 {
8751 split16a_type,
8753 }
8755 {
8759 split16d_type,
8761 }
8763 {
8767 split16a_type,
8769 }
8771 {
8775 split16d_type,
8777 }
8778 }
8785 /* Relocate against the beginning of the section. */
8791 {
8794 }
8798 /* Negative relocations. */
8820 /* xgettext:c-format */
8827 }
8830 {
8836 {
8844 }
8856 {
8862 }
8869 }
8871 /* Do any further special processing. */
8873 {
8885 /* It's just possible that this symbol is a weak symbol
8886 that's not actually defined anywhere. In that case,
8887 'sec' would be NULL, and we should leave the symbol
8888 alone (it will be set to zero elsewhere in the link). */
8891 /* Fall through. */
8899 /* Add 0x10000 if sign bit in 0:15 is set.
8900 Bits 0:15 are not used. */
8923 {
8924 /* The 32-bit ABI lacks proper relocations to deal with
8925 certain 64-bit instructions. Prevent damage to bits
8926 that make up part of the insn opcode. */
8936 else
8942 {
8945 /* xgettext:c-format */
8951 }
8952 }
8954 }
8956 #ifdef DEBUG
8961 sym_name,
8962 r_symndx,
8965 #endif
8972 {
8974 /* xgettext:c-format */
8978 sym_name);
8980 }
8982 /* 16-bit fields in insns mostly have signed values, but a
8983 few insns have 16-bit unsigned values. Really, we should
8984 have different reloc types. */
8988 {
8992 {
9002 }
9004 {
9008 }
9009 }
9012 {
9013 /* Split field reloc isn't handled by _bfd_final_link_relocate. */
9016 else
9017 {
9030 }
9031 }
9032 else
9037 {
9039 {
9040 overflow:
9041 /* On code like "if (foo) foo();" don't report overflow
9042 on a branch to zero when foo is undefined. */
9051 }
9052 else
9053 {
9055 /* xgettext:c-format */
9060 }
9061 }
9062 copy_reloc:
9065 }
9068 {
9075 {
9076 /* It is too late to remove an empty reloc section. Leave
9077 one NONE reloc.
9078 ??? What is wrong with an empty section??? */
9081 wrel++;
9082 }
9087 }
9089 #ifdef DEBUG
9091 #endif
9097 {
9098 /* Branch around the trampolines. */
9101 }
9108 {
9113 {
9122 {
9125 }
9126 }
9128 /* The idea is: Replace the last instruction on a page with a
9129 branch to a patch area. Put the insn there followed by a
9130 branch back to the next page. Complicated a little by
9131 needing to handle moved conditional branches, and by not
9132 wanting to touch data-in-text. */
9141 {
9144 bfd_boolean is_data;
9148 /* Do we have a data reloc at this offset? If so, leave
9149 the word alone. */
9155 {
9161 else
9162 {
9164 {
9173 }
9175 }
9176 }
9180 /* Some instructions can be left alone too. Unconditional
9181 branches, except for bcctr with BO=0x14 (bctr, bctrl),
9182 avoid the icache failure.
9184 The problem occurs due to prefetch across a page boundary
9185 where stale instructions can be fetched from the next
9186 page, and the mechanism for flushing these bad
9187 instructions fails under certain circumstances. The
9188 unconditional branches:
9189 1) Branch: b, bl, ba, bla,
9190 2) Branch Conditional: bc, bca, bcl, bcla,
9191 3) Branch Conditional to Link Register: bclr, bclrl,
9192 where (2) and (3) have BO=0x14 making them unconditional,
9193 prevent the bad prefetch because the prefetch itself is
9194 affected by these instructions. This happens even if the
9195 instruction is not executed.
9197 A bctr example:
9198 .
9199 . lis 9,new_page@ha
9200 . addi 9,9,new_page@l
9201 . mtctr 9
9202 . bctr
9203 . nop
9204 . nop
9205 . new_page:
9206 .
9207 The bctr is not predicted taken due to ctr not being
9208 ready, so prefetch continues on past the bctr into the
9209 new page which might have stale instructions. If they
9210 fail to be flushed, then they will be executed after the
9211 bctr executes. Either of the following modifications
9212 prevent the bad prefetch from happening in the first
9213 place:
9214 .
9215 . lis 9,new_page@ha lis 9,new_page@ha
9216 . addi 9,9,new_page@l addi 9,9,new_page@l
9217 . mtctr 9 mtctr 9
9218 . bctr bctr
9219 . nop b somewhere_else
9220 . b somewhere_else nop
9221 . new_page: new_page:
9222 . */
9241 {
9244 /* If the insn we are patching had a reloc, adjust the
9245 reloc r_offset so that the reloc applies to the moved
9246 location. This matters for -r and --emit-relocs. */
9248 {
9251 /* Keep the relocs sorted by r_offset. */
9254 }
9257 /* Adjust REL16 addends too. */
9259 {
9268 }
9270 /* If we are building a PIE or shared library with
9271 non-PIC objects, perhaps we had a dynamic reloc too?
9272 If so, the dynamic reloc must move with the insn. */
9275 {
9277 bfd_vma soffset;
9284 {
9292 else
9293 {
9295 {
9299 }
9304 }
9305 }
9306 }
9307 }
9308 else
9313 {
9320 {
9328 else
9336 }
9338 {
9347 }
9348 else
9349 {
9351 {
9356 }
9369 }
9370 }
9371 else
9372 {
9379 }
9382 }
9383 }
9386 }
9387 \f
9388 /* Write out the PLT relocs and entries for H. */
9390 static bfd_boolean
9392 {
9396 bfd_boolean doneone;
9401 {
9403 {
9404 Elf_Internal_Rela rela;
9406 bfd_vma reloc_index;
9414 else
9415 {
9421 }
9423 /* This symbol has an entry in the procedure linkage table.
9424 Set it up. */
9428 {
9429 bfd_vma got_offset;
9432 /* The first three entries in .got.plt are reserved. */
9435 /* Use the right PLT. */
9439 /* Fill in the .plt on VxWorks. */
9441 {
9448 }
9449 else
9450 {
9459 }
9466 /* This instruction is an immediate load. The value loaded is
9467 the byte offset of the R_PPC_JMP_SLOT relocation from the
9468 start of the .rela.plt section. The value is stored in the
9469 low-order 16 bits of the load instruction. */
9470 /* NOTE: It appears that this is now an index rather than a
9471 prescaled offset. */
9475 /* This instruction is a PC-relative branch whose target is
9476 the start of the PLT section. The address of this branch
9477 instruction is 20 bytes beyond the start of this PLT entry.
9478 The address is encoded in bits 6-29, inclusive. The value
9479 stored is right-shifted by two bits, permitting a 26-bit
9480 offset. */
9490 /* Fill in the GOT entry corresponding to this PLT slot with
9491 the address immediately after the "bctr" instruction
9492 in this PLT entry. */
9499 {
9500 /* Fill in a couple of entries in .rela.plt.unloaded. */
9506 /* Provide the @ha relocation for the first instruction. */
9511 R_PPC_ADDR16_HA);
9516 /* Provide the @l relocation for the second instruction. */
9521 R_PPC_ADDR16_LO);
9526 /* Provide a relocation for the GOT entry corresponding to this
9527 PLT slot. Point it at the middle of the .plt entry. */
9532 R_PPC_ADDR32);
9535 }
9537 /* VxWorks uses non-standard semantics for R_PPC_JMP_SLOT.
9538 In particular, the offset for the relocation is not the
9539 address of the PLT entry for this function, as specified
9540 by the ABI. Instead, the offset is set to the address of
9541 the GOT slot for this function. See EABI 4.4.4.1. */
9546 }
9547 else
9548 {
9552 {
9554 {
9557 }
9558 else
9559 {
9562 }
9567 }
9570 {
9573 }
9574 else
9575 {
9583 {
9584 /* We don't need to fill in the .plt. The ppc dynamic
9585 linker will fill it in. */
9586 }
9587 else
9588 {
9594 }
9595 }
9596 }
9599 {
9600 /* Fill in the entry in the .rela.plt section. */
9603 {
9606 else
9611 }
9612 else
9613 {
9619 }
9621 }
9623 }
9628 {
9634 {
9637 else
9639 }
9645 /* We only need one non-PIC glink stub. */
9647 }
9648 else
9650 }
9652 }
9654 /* Finish up PLT handling. */
9656 bfd_boolean
9658 {
9668 {
9672 bfd_size_type locsymcount;
9690 {
9692 {
9697 bfd_vma val;
9698 Elf_Internal_Rela rela;
9703 {
9708 }
9715 {
9720 }
9721 else
9722 {
9725 {
9728 }
9729 else
9730 {
9734 }
9735 }
9747 }
9748 }
9752 {
9755 else
9757 }
9758 }
9760 }
9762 /* Finish up dynamic symbol handling. We set the contents of various
9763 dynamic sections here. */
9765 static bfd_boolean
9770 {
9774 #ifdef DEBUG
9777 #endif
9783 {
9785 {
9786 /* Mark the symbol as undefined, rather than as
9787 defined in the .plt section. Leave the value if
9788 there were any relocations where pointer equality
9789 matters (this is a clue for the dynamic linker, to
9790 make function pointer comparisons work between an
9791 application and shared library), otherwise set it
9792 to zero. */
9797 {
9798 /* This breaks function pointer comparisons, but
9799 that is better than breaking tests for a NULL
9800 function pointer. */
9802 }
9803 }
9804 else
9805 {
9806 /* Set the value of ifunc symbols in a non-pie
9807 executable to the glink entry. This is to avoid
9808 text relocations. We can't do this for ifunc in
9809 allocate_dynrelocs, as we do for normal dynamic
9810 function symbols with plt entries, because we need
9811 to keep the original value around for the ifunc
9812 relocation. */
9813 sym->st_shndx
9814 = (_bfd_elf_section_from_bfd_section
9819 }
9821 }
9824 {
9826 Elf_Internal_Rela rela;
9829 /* This symbols needs a copy reloc. Set it up. */
9831 #ifdef DEBUG
9833 #endif
9841 else
9850 }
9852 #ifdef DEBUG
9854 #endif
9857 }
9858 \f
9859 static enum elf_reloc_type_class
9863 {
9870 {
9879 }
9880 }
9881 \f
9882 /* Finish up the dynamic sections. */
9884 static bfd_boolean
9887 {
9890 bfd_vma got;
9894 #ifdef DEBUG
9896 #endif
9907 {
9915 {
9916 Elf_Internal_Dyn dyn;
9922 {
9926 else
9960 }
9963 }
9964 }
9968 {
9971 {
9976 {
9977 /* Add a blrl instruction at _GLOBAL_OFFSET_TABLE_-4
9978 so that a function can easily find the address of
9979 _GLOBAL_OFFSET_TABLE_. */
9983 }
9986 {
9991 }
9992 }
9993 else
9994 {
9995 /* xgettext:c-format */
10002 }
10005 }
10007 /* Fill in the first entry in the VxWorks procedure linkage table. */
10012 {
10014 /* Use the right PLT. */
10016 ? ppc_elf_vxworks_pic_plt0_entry
10020 {
10027 }
10028 else
10029 {
10032 }
10041 {
10042 Elf_Internal_Rela rela;
10047 /* Output the @ha relocation for the first instruction. */
10056 /* Output the @l relocation for the second instruction. */
10065 /* Fix up the remaining relocations. They may have the wrong
10066 symbol index for _G_O_T_ or _P_L_T_ depending on the order
10067 in which symbols were output. */
10069 {
10070 Elf_Internal_Rela rel;
10086 }
10087 }
10088 }
10093 {
10096 bfd_vma res0;
10098 /*
10099 * PIC glink code is the following:
10100 *
10101 * # ith PLT code stub.
10102 * addis 11,30,(plt+(i-1)*4-got)@ha
10103 * lwz 11,(plt+(i-1)*4-got)@l(11)
10104 * mtctr 11
10105 * bctr
10106 *
10107 * # A table of branches, one for each plt entry.
10108 * # The idea is that the plt call stub loads ctr and r11 with these
10109 * # addresses, so (r11 - res_0) gives the plt index * 4.
10110 * res_0: b PLTresolve
10111 * res_1: b PLTresolve
10112 * .
10113 * # Some number of entries towards the end can be nops
10114 * res_n_m3: nop
10115 * res_n_m2: nop
10116 * res_n_m1:
10117 *
10118 * PLTresolve:
10119 * addis 11,11,(1f-res_0)@ha
10120 * mflr 0
10121 * bcl 20,31,1f
10122 * 1: addi 11,11,(1b-res_0)@l
10123 * mflr 12
10124 * mtlr 0
10125 * sub 11,11,12 # r11 = index * 4
10126 * addis 12,12,(got+4-1b)@ha
10127 * lwz 0,(got+4-1b)@l(12) # got[1] address of dl_runtime_resolve
10128 * lwz 12,(got+8-1b)@l(12) # got[2] contains the map address
10129 * mtctr 0
10130 * add 0,11,11
10131 * add 11,0,11 # r11 = index * 12 = reloc offset.
10132 * bctr
10133 *
10134 * Non-PIC glink code is a little simpler.
10135 *
10136 * # ith PLT code stub.
10137 * lis 11,(plt+(i-1)*4)@ha
10138 * lwz 11,(plt+(i-1)*4)@l(11)
10139 * mtctr 11
10140 * bctr
10141 *
10142 * The branch table is the same, then comes
10143 *
10144 * PLTresolve:
10145 * lis 12,(got+4)@ha
10146 * addis 11,11,(-res_0)@ha
10147 * lwz 0,(got+4)@l(12) # got[1] address of dl_runtime_resolve
10148 * addi 11,11,(-res_0)@l # r11 = index * 4
10149 * mtctr 0
10150 * add 0,11,11
10151 * lwz 12,(got+8)@l(12) # got[2] contains the map address
10152 * add 11,0,11 # r11 = index * 12 = reloc offset.
10153 * bctr
10154 */
10156 /* Build the branch table, one for each plt entry (less one),
10157 and perhaps some padding. */
10163 {
10166 }
10168 {
10171 }
10178 {
10179 /* Ensure that a call stub at the end of a page doesn't
10180 result in prefetch over the end of the page into the
10181 glink branch table. */
10183 bfd_vma page_addr;
10190 {
10191 /* We have a plt call stub that may need fixing. */
10198 {
10199 /* By alignment, we know that there must be at least
10200 one other call stub before this one. */
10204 else
10206 }
10207 }
10208 }
10210 /* Last comes the PLTresolve stub. */
10213 {
10214 bfd_vma bcl;
10237 {
10242 }
10243 else
10244 {
10249 }
10253 }
10254 else
10255 {
10262 else
10273 else
10275 }
10282 {
10286 }
10288 }
10292 {
10294 bfd_vma val;
10297 /* FDE length. */
10299 /* CIE pointer. */
10301 /* Offset to .glink. */
10314 }
10317 }
10318 \f
10319 #define TARGET_LITTLE_SYM powerpc_elf32_le_vec
10321 #define TARGET_BIG_SYM powerpc_elf32_vec
10323 #define ELF_ARCH bfd_arch_powerpc
10324 #define ELF_TARGET_ID PPC32_ELF_DATA
10325 #define ELF_MACHINE_CODE EM_PPC
10326 #define ELF_MAXPAGESIZE 0x10000
10327 #define ELF_COMMONPAGESIZE 0x1000
10328 #define ELF_RELROPAGESIZE ELF_MAXPAGESIZE
10329 #define elf_info_to_howto ppc_elf_info_to_howto
10331 #ifdef EM_CYGNUS_POWERPC
10332 #define ELF_MACHINE_ALT1 EM_CYGNUS_POWERPC
10333 #endif
10335 #ifdef EM_PPC_OLD
10336 #define ELF_MACHINE_ALT2 EM_PPC_OLD
10337 #endif
10339 #define elf_backend_plt_not_loaded 1
10340 #define elf_backend_want_dynrelro 1
10341 #define elf_backend_can_gc_sections 1
10342 #define elf_backend_can_refcount 1
10343 #define elf_backend_rela_normal 1
10344 #define elf_backend_caches_rawsize 1
10346 #define bfd_elf32_mkobject ppc_elf_mkobject
10347 #define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
10348 #define bfd_elf32_bfd_relax_section ppc_elf_relax_section
10349 #define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
10350 #define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
10351 #define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
10352 #define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
10353 #define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
10355 #define elf_backend_object_p ppc_elf_object_p
10356 #define elf_backend_gc_mark_hook ppc_elf_gc_mark_hook
10357 #define elf_backend_section_from_shdr ppc_elf_section_from_shdr
10358 #define elf_backend_relocate_section ppc_elf_relocate_section
10359 #define elf_backend_create_dynamic_sections ppc_elf_create_dynamic_sections
10360 #define elf_backend_check_relocs ppc_elf_check_relocs
10361 #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible
10362 #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol
10363 #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol
10364 #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook
10365 #define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections
10366 #define elf_backend_hash_symbol ppc_elf_hash_symbol
10367 #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol
10368 #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
10369 #define elf_backend_fake_sections ppc_elf_fake_sections
10370 #define elf_backend_additional_program_headers ppc_elf_additional_program_headers
10371 #define elf_backend_modify_segment_map ppc_elf_modify_segment_map
10372 #define elf_backend_grok_prstatus ppc_elf_grok_prstatus
10373 #define elf_backend_grok_psinfo ppc_elf_grok_psinfo
10374 #define elf_backend_write_core_note ppc_elf_write_core_note
10375 #define elf_backend_reloc_type_class ppc_elf_reloc_type_class
10376 #define elf_backend_begin_write_processing ppc_elf_begin_write_processing
10377 #define elf_backend_final_write_processing ppc_elf_final_write_processing
10378 #define elf_backend_write_section ppc_elf_write_section
10379 #define elf_backend_get_sec_type_attr ppc_elf_get_sec_type_attr
10380 #define elf_backend_plt_sym_val ppc_elf_plt_sym_val
10381 #define elf_backend_action_discarded ppc_elf_action_discarded
10382 #define elf_backend_init_index_section _bfd_elf_init_1_index_section
10383 #define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
10387 /* FreeBSD Target */
10389 #undef TARGET_LITTLE_SYM
10390 #undef TARGET_LITTLE_NAME
10392 #undef TARGET_BIG_SYM
10393 #define TARGET_BIG_SYM powerpc_elf32_fbsd_vec
10394 #undef TARGET_BIG_NAME
10397 #undef ELF_OSABI
10398 #define ELF_OSABI ELFOSABI_FREEBSD
10400 #undef elf32_bed
10401 #define elf32_bed elf32_powerpc_fbsd_bed
10405 /* VxWorks Target */
10407 #undef TARGET_LITTLE_SYM
10408 #undef TARGET_LITTLE_NAME
10410 #undef TARGET_BIG_SYM
10411 #define TARGET_BIG_SYM powerpc_elf32_vxworks_vec
10412 #undef TARGET_BIG_NAME
10415 #undef ELF_OSABI
10417 /* VxWorks uses the elf default section flags for .plt. */
10420 {
10428 }
10430 /* Like ppc_elf_link_hash_table_create, but overrides
10431 appropriately for VxWorks. */
10434 {
10439 {
10447 }
10449 }
10451 /* Tweak magic VxWorks symbols as they are loaded. */
10452 static bfd_boolean
10460 {
10462 valp))
10466 }
10468 static bfd_boolean
10470 {
10473 }
10475 /* On VxWorks, we emit relocations against _PROCEDURE_LINKAGE_TABLE_, so
10476 define it. */
10477 #undef elf_backend_want_plt_sym
10478 #define elf_backend_want_plt_sym 1
10479 #undef elf_backend_want_got_plt
10480 #define elf_backend_want_got_plt 1
10481 #undef elf_backend_got_symbol_offset
10482 #define elf_backend_got_symbol_offset 0
10483 #undef elf_backend_plt_not_loaded
10484 #define elf_backend_plt_not_loaded 0
10485 #undef elf_backend_plt_readonly
10486 #define elf_backend_plt_readonly 1
10487 #undef elf_backend_got_header_size
10488 #define elf_backend_got_header_size 12
10489 #undef elf_backend_dtrel_excludes_plt
10490 #define elf_backend_dtrel_excludes_plt 1
10492 #undef bfd_elf32_get_synthetic_symtab
10494 #undef bfd_elf32_bfd_link_hash_table_create
10495 #define bfd_elf32_bfd_link_hash_table_create \
10496 ppc_elf_vxworks_link_hash_table_create
10497 #undef elf_backend_add_symbol_hook
10498 #define elf_backend_add_symbol_hook \
10499 ppc_elf_vxworks_add_symbol_hook
10500 #undef elf_backend_link_output_symbol_hook
10501 #define elf_backend_link_output_symbol_hook \
10502 elf_vxworks_link_output_symbol_hook
10503 #undef elf_backend_final_write_processing
10504 #define elf_backend_final_write_processing \
10505 ppc_elf_vxworks_final_write_processing
10506 #undef elf_backend_get_sec_type_attr
10507 #define elf_backend_get_sec_type_attr \
10508 ppc_elf_vxworks_get_sec_type_attr
10509 #undef elf_backend_emit_relocs
10510 #define elf_backend_emit_relocs \
10511 elf_vxworks_emit_relocs
10513 #undef elf32_bed
10514 #define elf32_bed ppc_elf_vxworks_bed