| blob | 66265ef6009ef69d2450449ea1b9ac861baa58b7 |
1 /* PowerPC-specific support for 32-bit ELF
2 Copyright (C) 1994-2020 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 /* This file is based on a preliminary PowerPC ELF ABI. The
24 information may not match the final PowerPC ELF ABI. It includes
25 suggestions from the in-progress Embedded PowerPC ABI, and that
26 information may also not match. */
29 #include <stdarg.h>
40 /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
41 #define OCTETS_PER_BYTE(ABFD, SEC) 1
44 {
46 split16d_type
47 }
48 split16_format_type;
50 /* RELA relocations are used here. */
52 static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
54 static bfd_reloc_status_type ppc_elf_unhandled_reloc
57 /* Branch prediction bit for branch taken relocs. */
58 #define BRANCH_PREDICT_BIT 0x200000
59 /* Mask to set RA in memory instructions. */
60 #define RA_REGISTER_MASK 0x001f0000
61 /* Value to shift register by to insert RA. */
62 #define RA_REGISTER_SHIFT 16
64 /* The name of the dynamic interpreter. This is put in the .interp
65 section. */
68 /* For old-style PLT. */
69 /* The number of single-slot PLT entries (the rest use two slots). */
70 #define PLT_NUM_SINGLE_ENTRIES 8192
72 /* For new-style .glink and .plt. */
73 #define GLINK_PLTRESOLVE 16*4
74 #define GLINK_ENTRY_SIZE(htab, h) \
75 ((4*4 \
76 + (h != NULL \
77 && h == htab->tls_get_addr \
78 && !htab->params->no_tls_get_addr_opt ? 8*4 : 0) \
79 + (1u << htab->params->plt_stub_align) - 1) \
80 & -(1u << htab->params->plt_stub_align))
82 /* VxWorks uses its own plt layout, filled in by the static linker. */
84 /* The standard VxWorks PLT entry. */
85 #define VXWORKS_PLT_ENTRY_SIZE 32
86 static const bfd_vma ppc_elf_vxworks_plt_entry
88 {
97 };
98 static const bfd_vma ppc_elf_vxworks_pic_plt_entry
100 {
109 };
111 /* The initial VxWorks PLT entry. */
112 #define VXWORKS_PLT_INITIAL_ENTRY_SIZE 32
113 static const bfd_vma ppc_elf_vxworks_plt0_entry
115 {
124 };
125 static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
127 {
136 };
138 /* For executables, we have some additional relocations in
139 .rela.plt.unloaded, for the kernel loader. */
141 /* The number of non-JMP_SLOT relocations per PLT0 slot. */
142 #define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
143 /* The number of relocations in the PLTResolve slot. */
144 #define VXWORKS_PLTRESOLVE_RELOCS 2
145 /* The number of relocations in the PLTResolve slot when creating
146 a shared library. */
147 #define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
149 /* Some instructions. */
150 #define ADDIS_11_11 0x3d6b0000
151 #define ADDIS_11_30 0x3d7e0000
152 #define ADDIS_12_12 0x3d8c0000
153 #define ADDI_11_11 0x396b0000
154 #define ADD_0_11_11 0x7c0b5a14
155 #define ADD_3_12_2 0x7c6c1214
156 #define ADD_11_0_11 0x7d605a14
157 #define B 0x48000000
158 #define BA 0x48000002
159 #define BCL_20_31 0x429f0005
160 #define BCTR 0x4e800420
161 #define BEQLR 0x4d820020
162 #define CMPWI_11_0 0x2c0b0000
163 #define LIS_11 0x3d600000
164 #define LIS_12 0x3d800000
165 #define LWZU_0_12 0x840c0000
166 #define LWZ_0_12 0x800c0000
167 #define LWZ_11_3 0x81630000
168 #define LWZ_11_11 0x816b0000
169 #define LWZ_11_30 0x817e0000
170 #define LWZ_12_3 0x81830000
171 #define LWZ_12_12 0x818c0000
172 #define MR_0_3 0x7c601b78
173 #define MR_3_0 0x7c030378
174 #define MFLR_0 0x7c0802a6
175 #define MFLR_12 0x7d8802a6
176 #define MTCTR_0 0x7c0903a6
177 #define MTCTR_11 0x7d6903a6
178 #define MTLR_0 0x7c0803a6
179 #define NOP 0x60000000
180 #define SUB_11_11_12 0x7d6c5850
182 /* Offset of tp and dtp pointers from start of TLS block. */
183 #define TP_OFFSET 0x7000
184 #define DTP_OFFSET 0x8000
186 /* The value of a defined global symbol. */
187 #define SYM_VAL(SYM) \
188 ((SYM)->root.u.def.section->output_section->vma \
189 + (SYM)->root.u.def.section->output_offset \
190 + (SYM)->root.u.def.value)
191 \f
192 /* Relocation HOWTO's. */
193 /* Like other ELF RELA targets that don't apply multiple
194 field-altering relocations to the same localation, src_mask is
195 always zero and pcrel_offset is the same as pc_relative.
196 PowerPC can always use a zero bitpos, even when the field is not at
197 the LSB. For example, a REL24 could use rightshift=2, bisize=24
198 and bitpos=2 which matches the ABI description, or as we do here,
199 rightshift=0, bitsize=26 and bitpos=0. */
200 #define HOW(type, size, bitsize, mask, rightshift, pc_relative, \
201 complain, special_func) \
202 HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \
203 complain_overflow_ ## complain, special_func, \
204 #type, FALSE, 0, mask, pc_relative)
209 /* This reloc does nothing. */
211 bfd_elf_generic_reloc),
213 /* A standard 32 bit relocation. */
215 bfd_elf_generic_reloc),
217 /* An absolute 26 bit branch; the lower two bits must be zero.
218 FIXME: we don't check that, we just clear them. */
220 bfd_elf_generic_reloc),
222 /* A standard 16 bit relocation. */
224 bfd_elf_generic_reloc),
226 /* A 16 bit relocation without overflow. */
228 bfd_elf_generic_reloc),
230 /* The high order 16 bits of an address. */
232 bfd_elf_generic_reloc),
234 /* The high order 16 bits of an address, plus 1 if the contents of
235 the low 16 bits, treated as a signed number, is negative. */
237 ppc_elf_addr16_ha_reloc),
239 /* An absolute 16 bit branch; the lower two bits must be zero.
240 FIXME: we don't check that, we just clear them. */
242 bfd_elf_generic_reloc),
244 /* An absolute 16 bit branch, for which bit 10 should be set to
245 indicate that the branch is expected to be taken. The lower two
246 bits must be zero. */
248 bfd_elf_generic_reloc),
250 /* An absolute 16 bit branch, for which bit 10 should be set to
251 indicate that the branch is not expected to be taken. The lower
252 two bits must be zero. */
254 bfd_elf_generic_reloc),
256 /* A relative 26 bit branch; the lower two bits must be zero. */
258 bfd_elf_generic_reloc),
260 /* A relative 16 bit branch; the lower two bits must be zero. */
262 bfd_elf_generic_reloc),
264 /* A relative 16 bit branch. Bit 10 should be set to indicate that
265 the branch is expected to be taken. The lower two bits must be
266 zero. */
268 bfd_elf_generic_reloc),
270 /* A relative 16 bit branch. Bit 10 should be set to indicate that
271 the branch is not expected to be taken. The lower two bits must
272 be zero. */
274 bfd_elf_generic_reloc),
276 /* Like R_PPC_ADDR16, but referring to the GOT table entry for the
277 symbol. */
279 ppc_elf_unhandled_reloc),
281 /* Like R_PPC_ADDR16_LO, but referring to the GOT table entry for
282 the symbol. */
284 ppc_elf_unhandled_reloc),
286 /* Like R_PPC_ADDR16_HI, but referring to the GOT table entry for
287 the symbol. */
289 ppc_elf_unhandled_reloc),
291 /* Like R_PPC_ADDR16_HA, but referring to the GOT table entry for
292 the symbol. */
294 ppc_elf_unhandled_reloc),
296 /* Like R_PPC_REL24, but referring to the procedure linkage table
297 entry for the symbol. */
299 ppc_elf_unhandled_reloc),
301 /* This is used only by the dynamic linker. The symbol should exist
302 both in the object being run and in some shared library. The
303 dynamic linker copies the data addressed by the symbol from the
304 shared library into the object, because the object being
305 run has to have the data at some particular address. */
307 ppc_elf_unhandled_reloc),
309 /* Like R_PPC_ADDR32, but used when setting global offset table
310 entries. */
312 ppc_elf_unhandled_reloc),
314 /* Marks a procedure linkage table entry for a symbol. */
316 ppc_elf_unhandled_reloc),
318 /* Used only by the dynamic linker. When the object is run, this
319 longword is set to the load address of the object, plus the
320 addend. */
322 bfd_elf_generic_reloc),
324 /* Like R_PPC_REL24, but uses the value of the symbol within the
325 object rather than the final value. Normally used for
326 _GLOBAL_OFFSET_TABLE_. */
328 bfd_elf_generic_reloc),
330 /* Like R_PPC_ADDR32, but may be unaligned. */
332 bfd_elf_generic_reloc),
334 /* Like R_PPC_ADDR16, but may be unaligned. */
336 bfd_elf_generic_reloc),
338 /* 32-bit PC relative */
340 bfd_elf_generic_reloc),
342 /* 32-bit relocation to the symbol's procedure linkage table.
343 FIXME: not supported. */
345 ppc_elf_unhandled_reloc),
347 /* 32-bit PC relative relocation to the symbol's procedure linkage table.
348 FIXME: not supported. */
350 ppc_elf_unhandled_reloc),
352 /* Like R_PPC_ADDR16_LO, but referring to the PLT table entry for
353 the symbol. */
355 ppc_elf_unhandled_reloc),
357 /* Like R_PPC_ADDR16_HI, but referring to the PLT table entry for
358 the symbol. */
360 ppc_elf_unhandled_reloc),
362 /* Like R_PPC_ADDR16_HA, but referring to the PLT table entry for
363 the symbol. */
365 ppc_elf_unhandled_reloc),
367 /* A sign-extended 16 bit value relative to _SDA_BASE_, for use with
368 small data items. */
370 ppc_elf_unhandled_reloc),
372 /* 16-bit section relative relocation. */
374 ppc_elf_unhandled_reloc),
376 /* 16-bit lower half section relative relocation. */
378 ppc_elf_unhandled_reloc),
380 /* 16-bit upper half section relative relocation. */
382 ppc_elf_unhandled_reloc),
384 /* 16-bit upper half adjusted section relative relocation. */
386 ppc_elf_unhandled_reloc),
388 /* Marker relocs for TLS. */
390 bfd_elf_generic_reloc),
393 bfd_elf_generic_reloc),
396 bfd_elf_generic_reloc),
398 /* Marker relocs on inline plt call instructions. */
400 bfd_elf_generic_reloc),
403 bfd_elf_generic_reloc),
405 /* Computes the load module index of the load module that contains the
406 definition of its TLS sym. */
408 ppc_elf_unhandled_reloc),
410 /* Computes a dtv-relative displacement, the difference between the value
411 of sym+add and the base address of the thread-local storage block that
412 contains the definition of sym, minus 0x8000. */
414 ppc_elf_unhandled_reloc),
416 /* A 16 bit dtprel reloc. */
418 ppc_elf_unhandled_reloc),
420 /* Like DTPREL16, but no overflow. */
422 ppc_elf_unhandled_reloc),
424 /* Like DTPREL16_LO, but next higher group of 16 bits. */
426 ppc_elf_unhandled_reloc),
428 /* Like DTPREL16_HI, but adjust for low 16 bits. */
430 ppc_elf_unhandled_reloc),
432 /* Computes a tp-relative displacement, the difference between the value of
433 sym+add and the value of the thread pointer (r13). */
435 ppc_elf_unhandled_reloc),
437 /* A 16 bit tprel reloc. */
439 ppc_elf_unhandled_reloc),
441 /* Like TPREL16, but no overflow. */
443 ppc_elf_unhandled_reloc),
445 /* Like TPREL16_LO, but next higher group of 16 bits. */
447 ppc_elf_unhandled_reloc),
449 /* Like TPREL16_HI, but adjust for low 16 bits. */
451 ppc_elf_unhandled_reloc),
453 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
454 with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset
455 to the first entry. */
457 ppc_elf_unhandled_reloc),
459 /* Like GOT_TLSGD16, but no overflow. */
461 ppc_elf_unhandled_reloc),
463 /* Like GOT_TLSGD16_LO, but next higher group of 16 bits. */
465 ppc_elf_unhandled_reloc),
467 /* Like GOT_TLSGD16_HI, but adjust for low 16 bits. */
469 ppc_elf_unhandled_reloc),
471 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
472 with values (sym+add)@dtpmod and zero, and computes the offset to the
473 first entry. */
475 ppc_elf_unhandled_reloc),
477 /* Like GOT_TLSLD16, but no overflow. */
479 ppc_elf_unhandled_reloc),
481 /* Like GOT_TLSLD16_LO, but next higher group of 16 bits. */
483 ppc_elf_unhandled_reloc),
485 /* Like GOT_TLSLD16_HI, but adjust for low 16 bits. */
487 ppc_elf_unhandled_reloc),
489 /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes
490 the offset to the entry. */
492 ppc_elf_unhandled_reloc),
494 /* Like GOT_DTPREL16, but no overflow. */
496 ppc_elf_unhandled_reloc),
498 /* Like GOT_DTPREL16_LO, but next higher group of 16 bits. */
500 ppc_elf_unhandled_reloc),
502 /* Like GOT_DTPREL16_HI, but adjust for low 16 bits. */
504 ppc_elf_unhandled_reloc),
506 /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the
507 offset to the entry. */
509 ppc_elf_unhandled_reloc),
511 /* Like GOT_TPREL16, but no overflow. */
513 ppc_elf_unhandled_reloc),
515 /* Like GOT_TPREL16_LO, but next higher group of 16 bits. */
517 ppc_elf_unhandled_reloc),
519 /* Like GOT_TPREL16_HI, but adjust for low 16 bits. */
521 ppc_elf_unhandled_reloc),
523 /* The remaining relocs are from the Embedded ELF ABI, and are not
524 in the SVR4 ELF ABI. */
526 /* 32 bit value resulting from the addend minus the symbol. */
528 ppc_elf_unhandled_reloc),
530 /* 16 bit value resulting from the addend minus the symbol. */
532 ppc_elf_unhandled_reloc),
534 /* 16 bit value resulting from the addend minus the symbol. */
536 ppc_elf_unhandled_reloc),
538 /* The high order 16 bits of the addend minus the symbol. */
540 ppc_elf_unhandled_reloc),
542 /* The high order 16 bits of the result of the addend minus the address,
543 plus 1 if the contents of the low 16 bits, treated as a signed number,
544 is negative. */
546 ppc_elf_unhandled_reloc),
548 /* 16 bit value resulting from allocating a 4 byte word to hold an
549 address in the .sdata section, and returning the offset from
550 _SDA_BASE_ for that relocation. */
552 ppc_elf_unhandled_reloc),
554 /* 16 bit value resulting from allocating a 4 byte word to hold an
555 address in the .sdata2 section, and returning the offset from
556 _SDA2_BASE_ for that relocation. */
558 ppc_elf_unhandled_reloc),
560 /* A sign-extended 16 bit value relative to _SDA2_BASE_, for use with
561 small data items. */
563 ppc_elf_unhandled_reloc),
565 /* Relocate against either _SDA_BASE_ or _SDA2_BASE_, filling in the 16 bit
566 signed offset from the appropriate base, and filling in the register
567 field with the appropriate register (0, 2, or 13). */
569 ppc_elf_unhandled_reloc),
571 /* Relocation not handled: R_PPC_EMB_MRKREF */
572 /* Relocation not handled: R_PPC_EMB_RELSEC16 */
573 /* Relocation not handled: R_PPC_EMB_RELST_LO */
574 /* Relocation not handled: R_PPC_EMB_RELST_HI */
575 /* Relocation not handled: R_PPC_EMB_RELST_HA */
576 /* Relocation not handled: R_PPC_EMB_BIT_FLD */
578 /* PC relative relocation against either _SDA_BASE_ or _SDA2_BASE_, filling
579 in the 16 bit signed offset from the appropriate base, and filling in the
580 register field with the appropriate register (0, 2, or 13). */
582 ppc_elf_unhandled_reloc),
584 /* A relative 8 bit branch. */
586 bfd_elf_generic_reloc),
588 /* A relative 15 bit branch. */
590 bfd_elf_generic_reloc),
592 /* A relative 24 bit branch. */
594 bfd_elf_generic_reloc),
596 /* The 16 LSBS in split16a format. */
598 ppc_elf_unhandled_reloc),
600 /* The 16 LSBS in split16d format. */
602 ppc_elf_unhandled_reloc),
604 /* Bits 16-31 split16a format. */
606 ppc_elf_unhandled_reloc),
608 /* Bits 16-31 split16d format. */
610 ppc_elf_unhandled_reloc),
612 /* Bits 16-31 (High Adjusted) in split16a format. */
614 ppc_elf_unhandled_reloc),
616 /* Bits 16-31 (High Adjusted) in split16d format. */
618 ppc_elf_unhandled_reloc),
620 /* This reloc is like R_PPC_EMB_SDA21 but only applies to e_add16i
621 instructions. If the register base is 0 then the linker changes
622 the e_add16i to an e_li instruction. */
624 ppc_elf_unhandled_reloc),
626 /* Like R_PPC_VLE_SDA21 but ignore overflow. */
628 ppc_elf_unhandled_reloc),
630 /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
632 ppc_elf_unhandled_reloc),
634 /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
636 ppc_elf_unhandled_reloc),
638 /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
640 ppc_elf_unhandled_reloc),
642 /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
644 ppc_elf_unhandled_reloc),
646 /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
648 ppc_elf_unhandled_reloc),
650 /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
652 ppc_elf_unhandled_reloc),
654 /* e_li split20 format. */
656 ppc_elf_unhandled_reloc),
659 ppc_elf_unhandled_reloc),
661 /* A 16 bit relative relocation. */
663 bfd_elf_generic_reloc),
665 /* A 16 bit relative relocation without overflow. */
667 bfd_elf_generic_reloc),
669 /* The high order 16 bits of a relative address. */
671 bfd_elf_generic_reloc),
673 /* The high order 16 bits of a relative address, plus 1 if the contents of
674 the low 16 bits, treated as a signed number, is negative. */
676 ppc_elf_addr16_ha_reloc),
678 /* Like R_PPC_REL16_HA but for split field in addpcis. */
680 ppc_elf_addr16_ha_reloc),
682 /* A split-field reloc for addpcis, non-relative (gas internal use only). */
684 ppc_elf_addr16_ha_reloc),
686 /* GNU extension to record C++ vtable hierarchy. */
688 NULL),
690 /* GNU extension to record C++ vtable member usage. */
692 NULL),
694 /* Phony reloc to handle AIX style TOC entries. */
696 ppc_elf_unhandled_reloc),
697 };
698 \f
699 /* Initialize the ppc_elf_howto_table, so that linear accesses can be done. */
701 static void
703 {
708 i++)
709 {
715 }
716 }
720 bfd_reloc_code_real_type code)
721 {
724 /* Initialize howto table if not already done. */
729 {
863 }
866 };
871 {
876 i++)
882 }
884 /* Set the howto pointer for a PowerPC ELF reloc. */
886 static bfd_boolean
890 {
893 /* Initialize howto table if not already done. */
899 {
900 /* xgettext:c-format */
905 }
909 /* Just because the above assert didn't trigger doesn't mean that
910 ELF32_R_TYPE (dst->r_info) is necessarily a valid relocation. */
912 {
913 /* xgettext:c-format */
919 }
922 }
924 /* Handle the R_PPC_ADDR16_HA and R_PPC_REL16_HA relocs. */
926 static bfd_reloc_status_type
934 {
937 bfd_size_type octets;
938 bfd_vma value;
941 {
944 }
968 }
970 static bfd_reloc_status_type
978 {
979 /* If this is a relocatable link (output_bfd test tells us), just
980 call the generic function. Any adjustment will be done at final
981 link time. */
987 {
992 }
994 }
995 \f
996 /* Sections created by the linker. */
999 {
1000 /* Pointer to the bfd section. */
1002 /* Section name. */
1004 /* Associated bss section name. */
1006 /* Associated symbol name. */
1008 /* Associated symbol. */
1012 /* Linked list of allocated pointer entries. This hangs off of the
1013 symbol lists, and provides allows us to return different pointers,
1014 based on different addend's. */
1017 {
1018 /* next allocated pointer for this symbol */
1020 /* offset of pointer from beginning of section */
1021 bfd_vma offset;
1022 /* addend used */
1023 bfd_vma addend;
1024 /* which linker section this is */
1028 struct ppc_elf_obj_tdata
1029 {
1032 /* A mapping from local symbols to offsets into the various linker
1033 sections added. This is index by the symbol index. */
1036 /* Flags used to auto-detect plt type. */
1039 };
1041 #define ppc_elf_tdata(bfd) \
1042 ((struct ppc_elf_obj_tdata *) (bfd)->tdata.any)
1044 #define elf_local_ptr_offsets(bfd) \
1045 (ppc_elf_tdata (bfd)->linker_section_pointers)
1047 #define is_ppc_elf(bfd) \
1048 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
1049 && elf_object_id (bfd) == PPC32_ELF_DATA)
1051 /* Override the generic function because we store some extras. */
1053 static bfd_boolean
1055 {
1057 PPC32_ELF_DATA);
1058 }
1060 /* When defaulting arch/mach, decode apuinfo to find a better match. */
1062 bfd_boolean
1064 {
1071 {
1078 }
1081 {
1086 {
1091 {
1094 {
1120 }
1121 }
1123 }
1124 }
1127 {
1132 {
1135 }
1136 }
1138 }
1140 /* Fix bad default arch selected for a 32 bit input bfd when the
1141 default is 64 bit. Also select arch based on apuinfo. */
1143 static bfd_boolean
1145 {
1150 {
1154 {
1155 /* Relies on arch after 64 bit default being 32 bit default. */
1158 }
1159 }
1161 }
1163 /* Function to set whether a module needs the -mrelocatable bit set. */
1165 static bfd_boolean
1167 {
1174 }
1176 /* Support for core dump NOTE sections. */
1178 static bfd_boolean
1180 {
1185 {
1190 /* pr_cursig */
1193 /* pr_pid */
1196 /* pr_reg */
1201 }
1203 /* Make a ".reg/999" section. */
1206 }
1208 static bfd_boolean
1210 {
1212 {
1223 }
1225 /* Note that for some reason, a spurious space is tacked
1226 onto the end of the args in some (at least one anyway)
1227 implementations, so strip it off if it exists. */
1229 {
1235 }
1238 }
1242 {
1244 {
1249 {
1256 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1257 DIAGNOSTIC_PUSH;
1258 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
1259 -Wstringop-truncation:
1260 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
1261 */
1262 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
1263 #endif
1265 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1266 DIAGNOSTIC_POP;
1267 #endif
1271 }
1274 {
1293 }
1294 }
1295 }
1297 static flagword
1299 {
1305 }
1307 /* Return address for Ith PLT stub in section PLT, for relocation REL
1308 or (bfd_vma) -1 if it should not be included. */
1310 static bfd_vma
1314 {
1316 }
1318 /* Handle a PowerPC specific section when reading an object file. This
1319 is called when bfd_section_from_shdr finds a section with an unknown
1320 type. */
1322 static bfd_boolean
1327 {
1329 flagword flags;
1350 }
1352 /* Set up any other section flags and such that may be necessary. */
1354 static bfd_boolean
1358 {
1363 }
1365 /* If we have .sbss2 or .PPC.EMB.sbss0 output sections, we
1366 need to bump up the number of section headers. */
1368 static int
1371 {
1384 }
1386 /* Modify the segment map for VLE executables. */
1388 bfd_boolean
1391 {
1394 /* At this point in the link, output sections have already been sorted by
1395 LMA and assigned to segments. All that is left to do is to ensure
1396 there is no mixing of VLE & non-VLE sections in a text segment.
1397 If we find that case, we split the segment.
1398 We maintain the original output section order. */
1401 {
1411 {
1415 {
1420 }
1421 }
1424 {
1430 {
1436 }
1438 }
1439 /* If we're splitting a segment which originally contained rw
1440 sections then those sections might now only be in one of the
1441 two parts. So always set p_flags if splitting, even if we
1442 are being called for objcopy with p_flags_valid set. */
1444 {
1447 }
1451 /* Sections 0..j-1 stay in this (current) segment,
1452 the remainder are put in a new segment.
1453 The scan resumes with the new segment. */
1469 }
1472 }
1474 /* Add extra PPC sections -- Note, for now, make .sbss2 and
1475 .PPC.EMB.sbss0 a normal section, and not a bss section so
1476 that the linker doesn't crater when trying to make more than
1477 2 sections. */
1480 {
1491 };
1493 /* This is what we want for new plt/got. */
1499 {
1502 /* See if this is one of the special sections. */
1509 {
1513 }
1516 }
1517 \f
1518 /* Very simple linked list structure for recording apuinfo values. */
1520 {
1523 }
1524 apuinfo_list;
1529 static void
1531 {
1534 }
1536 static void
1538 {
1542 {
1546 }
1555 }
1557 static unsigned
1559 {
1564 entry;
1569 }
1573 {
1579 ;
1582 }
1584 static void
1586 {
1590 {
1594 }
1597 }
1599 /* Scan the input BFDs and create a linked list of
1600 the APUinfo values that will need to be emitted. */
1602 static void
1604 {
1618 /* Read in the input sections contents. */
1620 {
1627 /* xgettext:c-format */
1635 {
1641 }
1645 {
1646 /* xgettext:c-format */
1649 }
1651 /* Verify the contents of the header. Note - we have to
1652 extract the values this way in order to allow for a
1653 host whose endian-ness is different from the target. */
1665 /* Get the number of bytes used for apuinfo entries. */
1670 /* Scan the apuinfo section, building a list of apuinfo numbers. */
1673 }
1678 {
1679 /* Compute the size of the output section. */
1682 /* Set the output section size, if it exists. */
1686 {
1688 /* xgettext:c-format */
1690 }
1691 }
1693 fail:
1698 }
1700 /* Prevent the output section from accumulating the input sections'
1701 contents. We have already stored this in our linked list structure. */
1703 static bfd_boolean
1708 {
1710 }
1712 /* Finally we can generate the output section. */
1714 static void
1716 {
1721 bfd_size_type length;
1736 {
1737 _bfd_error_handler
1740 }
1742 /* Create the apuinfo header. */
1751 {
1754 }
1765 }
1767 static bfd_boolean
1769 {
1772 }
1773 \f
1774 static bfd_boolean
1776 {
1786 }
1788 static bfd_boolean
1790 {
1795 }
1797 static long
1801 {
1806 bfd_vma stub_off;
1830 /* Call common code to handle old-style executable PLTs. */
1835 /* If this object was prelinked, the prelinker stored the address
1836 of .glink at got[1]. If it wasn't prelinked, got[1] will be zero. */
1839 {
1853 {
1854 Elf_Internal_Dyn dyn;
1861 {
1869 }
1870 }
1872 }
1874 /* Otherwise we read the first plt entry. */
1876 {
1879 }
1884 /* The .glink section usually does not survive the final
1885 link; search for the section (usually .text) where the
1886 glink stubs now reside. */
1891 /* Determine glink PLT resolver by reading the relative branch
1892 from the first glink stub. */
1895 {
1898 /* The first glink stub may either branch to the resolver ... */
1903 /* ... or fall through a bunch of NOPs. */
1910 {
1913 }
1914 }
1917 /* If the stubs are those for -shared/-pie then we might have
1918 multiple stubs for each plt entry. If that is the case then
1919 there is no way to associate stubs with their plt entries short
1920 of figuring out the GOT pointer value used in the stub.
1921 The offsets tested here need to cover all possible values of
1922 GLINK_ENTRY_SIZE for other than __tls_get_addr_opt. */
1937 {
1941 }
1956 {
1963 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
1964 we are defining a symbol, ensure one of them is set. */
1976 {
1981 }
1986 }
1988 /* Add a symbol at the start of the glink branch table. */
1997 s++;
1998 count++;
2001 {
2002 /* Add a symbol for the glink PLT resolver. */
2011 s++;
2012 count++;
2013 }
2016 }
2017 \f
2018 /* The following functions are specific to the ELF linker, while
2019 functions above are used generally. They appear in this file more
2020 or less in the order in which they are called. eg.
2021 ppc_elf_check_relocs is called early in the link process,
2022 ppc_elf_finish_dynamic_sections is one of the last functions
2023 called. */
2025 /* Track PLT entries needed for a given symbol. We might need more
2026 than one glink entry per symbol when generating a pic binary. */
2027 struct plt_entry
2028 {
2031 /* -fPIC uses multiple GOT sections, one per file, called ".got2".
2032 This field stores the offset into .got2 used to initialise the
2033 GOT pointer reg. It will always be at least 32768. (Current
2034 gcc always uses an offset of 32768, but ld -r will pack .got2
2035 sections together resulting in larger offsets). */
2036 bfd_vma addend;
2038 /* The .got2 section. */
2041 /* PLT refcount or offset. */
2042 union
2043 {
2044 bfd_signed_vma refcount;
2045 bfd_vma offset;
2048 /* .glink stub offset. */
2049 bfd_vma glink_offset;
2050 };
2052 /* Of those relocs that might be copied as dynamic relocs, this
2053 function selects those that must be copied when linking a shared
2054 library or PIE, even when the symbol is local. */
2056 static int
2059 {
2061 {
2063 /* Only relative relocs can be resolved when the object load
2064 address isn't fixed. DTPREL32 is excluded because the
2065 dynamic linker needs to differentiate global dynamic from
2066 local dynamic __tls_index pairs when PPC_OPT_TLS is set. */
2081 /* These relocations are relative but in a shared library the
2082 linker doesn't know the thread pointer base. */
2084 }
2085 }
2087 /* If ELIMINATE_COPY_RELOCS is non-zero, the linker will try to avoid
2088 copying dynamic variables from a shared lib into an app's dynbss
2089 section, and instead use a dynamic relocation to point into the
2090 shared lib. */
2091 #define ELIMINATE_COPY_RELOCS 1
2093 /* Used to track dynamic relocations for local symbols. */
2094 struct ppc_dyn_relocs
2095 {
2098 /* The input section of the reloc. */
2101 /* Total number of relocs copied for the input section. */
2104 /* Whether this entry is for STT_GNU_IFUNC symbols. */
2106 };
2108 /* PPC ELF linker hash entry. */
2110 struct ppc_elf_link_hash_entry
2111 {
2114 /* If this symbol is used in the linker created sections, the processor
2115 specific backend uses this field to map the field into the offset
2116 from the beginning of the section. */
2119 /* Contexts in which symbol is used in the GOT.
2120 Bits are or'd into the mask as the corresponding relocs are
2121 encountered during check_relocs, with TLS_TLS being set when any
2122 of the other TLS bits are set. tls_optimize clears bits when
2123 optimizing to indicate the corresponding GOT entry type is not
2124 needed. If set, TLS_TLS is never cleared. tls_optimize may also
2125 set TLS_GDIE when a GD reloc turns into an IE one.
2126 These flags are also kept for local symbols. */
2136 /* The above field is also used to mark function symbols. In which
2137 case TLS_TLS will be 0. */
2142 /* Nonzero if we have seen a small data relocation referring to this
2143 symbol. */
2146 /* Flag use of given relocations. */
2149 };
2151 #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
2153 /* PPC ELF linker hash table. */
2155 struct ppc_elf_link_hash_table
2156 {
2159 /* Various options passed from the linker. */
2162 /* Short-cuts to get to dynamic linker sections. */
2172 /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */
2175 /* Shortcut to __tls_get_addr. */
2178 /* The bfd that forced an old-style PLT. */
2181 /* TLS local dynamic got entry handling. */
2183 bfd_signed_vma refcount;
2184 bfd_vma offset;
2187 /* Offset of branch table to PltResolve function in glink. */
2188 bfd_vma glink_pltresolve;
2190 /* Size of reserved GOT entries. */
2192 /* Non-zero if allocating the header left a gap. */
2195 /* The type of PLT we have chosen to use. */
2198 /* Whether there exist local gnu indirect function resolvers,
2199 referenced by dynamic relocations. */
2203 /* Set if tls optimization is enabled. */
2206 /* Set if inline plt calls should be converted to direct calls. */
2209 /* The size of PLT entries. */
2211 /* The distance between adjacent PLT slots. */
2213 /* The size of the first PLT entry. */
2215 };
2217 /* Rename some of the generic section flags to better document how they
2218 are used for ppc32. The flags are only valid for ppc32 elf objects. */
2220 /* Nonzero if this section has TLS related relocations. */
2221 #define has_tls_reloc sec_flg0
2223 /* Nonzero if this section has a call to __tls_get_addr lacking marker
2224 relocs. */
2225 #define nomark_tls_get_addr sec_flg1
2227 /* Flag set when PLTCALL relocs are detected. */
2228 #define has_pltcall sec_flg2
2230 /* Get the PPC ELF linker hash table from a link_info structure. */
2232 #define ppc_elf_hash_table(p) \
2233 ((is_elf_hash_table ((p)->hash) \
2234 && elf_hash_table_id (elf_hash_table (p)) == PPC32_ELF_DATA) \
2235 ? (struct ppc_elf_link_hash_table *) (p)->hash : NULL)
2237 /* Create an entry in a PPC ELF linker hash table. */
2243 {
2244 /* Allocate the structure if it has not already been allocated by a
2245 subclass. */
2247 {
2252 }
2254 /* Call the allocation method of the superclass. */
2257 {
2261 }
2264 }
2266 /* Create a PPC ELF linker hash table. */
2270 {
2272 static struct ppc_elf_params default_params
2280 ppc_elf_link_hash_newfunc,
2282 PPC32_ELF_DATA))
2283 {
2286 }
2308 }
2310 /* Hook linker params into hash table. */
2312 void
2314 {
2320 }
2322 /* Create .got and the related sections. */
2324 static bfd_boolean
2326 {
2334 {
2335 /* The powerpc .got has a blrl instruction in it. Mark it
2336 executable. */
2341 }
2344 }
2346 /* Create a special linker section, used for R_PPC_EMB_SDAI16 and
2347 R_PPC_EMB_SDA2I16 pointers. These sections become part of .sdata
2348 and .sdata2. Create _SDA_BASE_ and _SDA2_BASE too. */
2350 static bfd_boolean
2353 flagword flags,
2355 {
2366 /* Define the sym on the first section of this name. */
2374 }
2376 static bfd_boolean
2378 {
2381 flagword flags;
2396 {
2404 }
2421 /* Local plt entries. */
2425 flags);
2431 {
2434 htab->relpltlocal
2439 }
2450 }
2452 /* We have to create .dynsbss and .rela.sbss here so that they get mapped
2453 to output sections (just like _bfd_elf_create_dynamic_sections has
2454 to create .dynbss and .rela.bss). */
2456 static bfd_boolean
2458 {
2461 flagword flags;
2483 {
2491 }
2500 /* The VxWorks PLT is a loaded section with contents. */
2503 }
2505 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2507 static void
2511 {
2528 /* If we were called to copy over info for a weak sym, that's all. */
2533 {
2535 {
2539 /* Add reloc counts against the indirect sym to the direct sym
2540 list. Merge any entries against the same section. */
2542 {
2547 {
2552 }
2555 }
2557 }
2561 }
2563 /* Copy over the GOT refcount entries that we may have already seen to
2564 the symbol which just became indirect. */
2568 /* And plt entries. */
2570 {
2572 {
2577 {
2582 {
2586 }
2589 }
2591 }
2595 }
2598 {
2606 }
2607 }
2609 /* Hook called by the linker routine which adds symbols from an object
2610 file. We use it to put .comm items in .sbss, and not .bss. */
2612 static bfd_boolean
2620 {
2625 {
2626 /* Common symbols less than or equal to -G nn bytes are automatically
2627 put into .sbss. */
2632 {
2640 flags);
2643 }
2647 }
2650 }
2651 \f
2652 /* Find a linker generated pointer with a given addend and type. */
2655 elf_find_pointer_linker_section
2657 bfd_vma addend,
2659 {
2665 }
2667 /* Allocate a pointer to live in a linker created section. */
2669 static bfd_boolean
2674 {
2678 bfd_size_type amt;
2682 /* Is this a global symbol? */
2684 {
2687 /* Has this symbol already been allocated? If so, our work is done. */
2691 lsect))
2695 }
2696 else
2697 {
2700 /* Allocation of a pointer to a local symbol. */
2703 /* Allocate a table to hold the local symbols if first time. */
2705 {
2716 }
2718 /* Has this symbol already been allocated? If so, our work is done. */
2721 lsect))
2725 }
2727 /* Allocate space for a pointer in the linker section, and allocate
2728 a new pointer record from internal memory. */
2746 #ifdef DEBUG
2751 #endif
2754 }
2761 {
2767 {
2777 }
2785 }
2787 static bfd_boolean
2790 {
2799 {
2809 }
2812 }
2816 {
2825 }
2827 static bfd_boolean
2829 {
2841 }
2843 /* Relocs on inline plt call sequence insns prior to the call. */
2845 static bfd_boolean
2847 {
2852 }
2854 static void
2856 {
2857 _bfd_error_handler
2858 /* xgettext:c-format */
2860 abfd,
2863 }
2865 /* Look through the relocs for a section during the first phase, and
2866 allocate space in the global offset table or procedure linkage
2867 table. */
2869 static bfd_boolean
2874 {
2886 #ifdef DEBUG
2889 #endif
2893 /* Initialize howto table if not already done. */
2899 {
2904 }
2914 {
2921 bfd_vma addend;
2926 else
2927 {
2932 }
2934 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
2935 This shows up in particular in an R_PPC_ADDR32 in the eabi
2936 startup code. */
2940 {
2946 }
2952 {
2959 {
2960 /* Set PLT_IFUNC flag for this sym, no GOT entry yet. */
2966 /* STT_GNU_IFUNC symbols must have a PLT entry;
2967 In a non-pie executable even when there are
2968 no plt calls. */
2974 {
2986 }
2987 }
2988 }
2994 {
2998 /* We have a new-style __tls_get_addr call with a marker
2999 reloc. */
3000 ;
3001 else
3002 /* Mark this section as having an old-style call. */
3004 }
3007 {
3010 /* These special tls relocs tie a call to __tls_get_addr with
3011 its parameter symbol. */
3014 else
3051 dogottls:
3053 /* Fall through. */
3055 /* GOT16 relocations */
3060 /* This symbol requires a global offset table entry. */
3062 {
3067 }
3069 {
3072 }
3073 else
3074 /* This is a global offset table entry for a local symbol. */
3078 /* We may also need a plt entry if the symbol turns out to be
3079 an ifunc. */
3081 {
3084 }
3087 /* Indirect .sdata relocation. */
3094 {
3097 }
3100 /* Indirect .sdata2 relocation. */
3103 {
3106 }
3112 {
3115 }
3120 /* Fall through. */
3129 {
3132 }
3149 {
3152 }
3155 {
3158 }
3166 {
3169 }
3189 /* Fall through. */
3196 pltentry:
3197 #ifdef DEBUG
3199 #endif
3200 /* This symbol requires a procedure linkage table entry. */
3202 {
3207 }
3208 else
3209 {
3214 }
3226 /* The following relocations don't need to propagate the
3227 relocation if linking a shared object since they are
3228 section relative. */
3248 /* These are just markers. */
3259 /* These should only appear in dynamic objects. */
3267 /* These aren't handled yet. We'll report an error later. */
3276 /* This refers only to functions defined in the shared library. */
3279 {
3282 }
3284 {
3288 }
3291 /* This relocation describes the C++ object vtable hierarchy.
3292 Reconstruct it for later use during GC. */
3298 /* This relocation describes which C++ vtable entries are actually
3299 used. Record for later use during GC. */
3308 /* Fall through. */
3309 /* We shouldn't really be seeing TPREL32. */
3317 /* Nor these. */
3328 {
3329 /* Old -fPIC gcc code has .long LCTOC1-LCFx just before
3330 the start of a function, which assembles to a REL32
3331 reference to .got2. If we detect one of these, then
3332 force the old PLT layout because the linker cannot
3333 reliably deduce the GOT pointer value needed for
3334 PLT call stubs. */
3345 {
3348 }
3349 }
3352 /* fall through */
3362 {
3363 /* We may need a plt entry if the symbol turns out to be
3364 a function defined in a dynamic object. */
3368 /* We may need a copy reloc too. */
3375 }
3385 {
3387 {
3390 }
3392 }
3393 /* fall through */
3400 {
3401 /* We may need a plt entry if the symbol turns out to be
3402 a function defined in a dynamic object. */
3407 }
3409 dodyn:
3410 /* If we are creating a shared library, and this is a reloc
3411 against a global symbol, or a non PC relative reloc
3412 against a local symbol, then we need to copy the reloc
3413 into the shared library. However, if we are linking with
3414 -Bsymbolic, we do not need to copy a reloc against a
3415 global symbol which is defined in an object we are
3416 including in the link (i.e., DEF_REGULAR is set). At
3417 this point we have not seen all the input files, so it is
3418 possible that DEF_REGULAR is not set now but will be set
3419 later (it is never cleared). In case of a weak definition,
3420 DEF_REGULAR may be cleared later by a strong definition in
3421 a shared library. We account for that possibility below by
3422 storing information in the dyn_relocs field of the hash
3423 table entry. A similar situation occurs when creating
3424 shared libraries and symbol visibility changes render the
3425 symbol local.
3427 If on the other hand, we are creating an executable, we
3428 may need to keep relocations for symbols satisfied by a
3429 dynamic library if we manage to avoid copy relocs for the
3430 symbol. */
3437 || (ELIMINATE_COPY_RELOCS
3442 {
3443 #ifdef DEBUG
3445 "ppc_elf_check_relocs needs to "
3449 #endif
3451 {
3455 sreloc = _bfd_elf_make_dynamic_reloc_section
3460 }
3462 /* If this is a global symbol, we count the number of
3463 relocations we need for this symbol. */
3465 {
3472 {
3481 }
3485 }
3486 else
3487 {
3488 /* Track dynamic relocs needed for local syms too.
3489 We really need local syms available to do this
3490 easily. Oh well. */
3493 bfd_boolean is_ifunc;
3514 {
3523 }
3525 }
3526 }
3529 }
3530 }
3533 }
3534 \f
3535 /* Warn for conflicting Tag_GNU_Power_ABI_FP attributes between IBFD
3536 and OBFD, and merge non-conflicting ones. */
3537 bfd_boolean
3539 {
3544 bfd_boolean warn_only;
3546 /* We only warn about shared library mismatches, because common
3547 libraries advertise support for a particular long double variant
3548 but actually support more than one variant. For example, glibc
3549 typically supports 128-bit IBM long double in the shared library
3550 but has a compatibility static archive for 64-bit long double.
3551 The linker doesn't have the smarts to see that an app using
3552 object files marked as 64-bit long double call the compatibility
3553 layer objects and only from there call into the shared library. */
3563 {
3569 ;
3571 {
3573 {
3577 }
3578 }
3580 {
3581 _bfd_error_handler
3582 /* xgettext:c-format */
3586 }
3588 {
3589 _bfd_error_handler
3590 /* xgettext:c-format */
3594 }
3596 {
3597 _bfd_error_handler
3598 /* xgettext:c-format */
3602 }
3604 {
3605 _bfd_error_handler
3606 /* xgettext:c-format */
3610 }
3615 ;
3617 {
3619 {
3623 }
3624 }
3626 {
3627 _bfd_error_handler
3628 /* xgettext:c-format */
3632 }
3634 {
3635 _bfd_error_handler
3636 /* xgettext:c-format */
3640 }
3642 {
3643 _bfd_error_handler
3644 /* xgettext:c-format */
3648 }
3650 {
3651 _bfd_error_handler
3652 /* xgettext:c-format */
3656 }
3657 }
3660 {
3663 }
3665 }
3667 /* Merge object attributes from IBFD into OBFD. Warn if
3668 there are conflicting attributes. */
3669 static bfd_boolean
3671 {
3675 bfd_boolean ret;
3684 /* Check for conflicting Tag_GNU_Power_ABI_Vector attributes and
3685 merge non-conflicting ones. */
3690 {
3696 ;
3698 {
3702 }
3703 /* For now, allow generic to transition to AltiVec or SPE
3704 without a warning. If GCC marked files with their stack
3705 alignment and used don't-care markings for files which are
3706 not affected by the vector ABI, we could warn about this
3707 case too. */
3709 ;
3711 {
3715 }
3717 {
3718 _bfd_error_handler
3719 /* xgettext:c-format */
3724 }
3726 {
3727 _bfd_error_handler
3728 /* xgettext:c-format */
3733 }
3734 }
3736 /* Check for conflicting Tag_GNU_Power_ABI_Struct_Return attributes
3737 and merge non-conflicting ones. */
3741 {
3747 ;
3749 {
3753 }
3755 {
3756 _bfd_error_handler
3757 /* xgettext:c-format */
3762 }
3764 {
3765 _bfd_error_handler
3766 /* xgettext:c-format */
3771 }
3772 }
3774 {
3777 }
3779 /* Merge Tag_compatibility attributes and any common GNU ones. */
3781 }
3783 /* Merge backend specific data from an object file to the output
3784 object file when linking. */
3786 static bfd_boolean
3788 {
3790 flagword old_flags;
3791 flagword new_flags;
3792 bfd_boolean error;
3797 /* Check if we have the same endianness. */
3810 {
3811 /* First call, no flags set. */
3814 }
3816 /* Compatible flags are ok. */
3818 ;
3820 /* Incompatible flags. */
3821 else
3822 {
3823 /* Warn about -mrelocatable mismatch. Allow -mrelocatable-lib
3824 to be linked with either. */
3828 {
3830 _bfd_error_handler
3833 }
3836 {
3838 _bfd_error_handler
3841 }
3843 /* The output is -mrelocatable-lib iff both the input files are. */
3847 /* The output is -mrelocatable iff it can't be -mrelocatable-lib,
3848 but each input file is either -mrelocatable or -mrelocatable-lib. */
3854 /* Do not warn about eabi vs. V.4 mismatch, just or in the bit if
3855 any module uses it. */
3861 /* Warn about any other mismatches. */
3863 {
3865 _bfd_error_handler
3866 /* xgettext:c-format */
3870 }
3873 {
3876 }
3877 }
3880 }
3882 static void
3887 bfd_vma value,
3888 split16_format_type split16_format,
3889 bfd_boolean fixup)
3890 {
3900 {
3902 {
3905 else
3906 _bfd_error_handler
3907 /* xgettext:c-format */
3910 }
3911 }
3919 {
3921 {
3924 else
3925 _bfd_error_handler
3926 /* xgettext:c-format */
3929 }
3930 }
3932 {
3936 {
3937 /* Hack for e_li. Extend sign. */
3940 }
3941 }
3942 else
3943 {
3946 }
3949 }
3951 static void
3953 {
3957 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
3958 /* Top 4 bits of value to 17..20. */
3960 /* Next 5 bits of the value to 11..15. */
3962 /* And the final 11 bits of the value to bits 21 to 31. */
3965 }
3967 \f
3968 /* Choose which PLT scheme to use, and set .plt flags appropriately.
3969 Returns -1 on error, 0 for old PLT, 1 for new PLT. */
3970 int
3973 {
3975 flagword flags;
3980 {
3994 {
3995 /* Profiling of shared libs (and pies) is not supported with
3996 secure plt, because ppc32 does profiling before a
3997 function prologue and a secure plt pic call stubs needs
3998 r30 to be set up. */
4000 }
4001 else
4002 {
4006 /* Look through the reloc flags left by ppc_elf_check_relocs.
4007 Use the old style bss plt if a file makes plt calls
4008 without using the new relocs, and if ld isn't given
4009 --secure-plt and we never see REL16 relocs. */
4014 {
4018 {
4022 }
4023 }
4025 }
4026 }
4028 {
4031 else
4033 }
4038 {
4042 /* The new PLT is a loaded section. */
4047 /* The new GOT is not executable. */
4051 }
4052 else
4053 {
4054 /* Stop an unused .glink section from affecting .text alignment. */
4058 }
4060 }
4061 \f
4062 /* Return the section that should be marked against GC for a given
4063 relocation. */
4071 {
4074 {
4078 }
4081 }
4083 static bfd_boolean
4091 {
4095 {
4111 {
4117 }
4121 }
4122 else
4123 {
4128 {
4137 }
4150 {
4157 {
4163 }
4165 }
4166 }
4168 }
4169 \f
4170 /* Analyze inline PLT call relocations to see whether calls to locally
4171 defined functions can be converted to direct calls. */
4173 bfd_boolean
4175 {
4185 /* A bl insn can reach -0x2000000 to 0x1fffffc. The limit is
4186 reduced somewhat to cater for possible stubs that might be added
4187 between the call and its destination. */
4193 {
4198 }
4200 /* If a "bl" can reach anywhere in local code sections, then we can
4201 convert all inline PLT sequences to direct calls when the symbol
4202 is local. */
4204 {
4207 }
4209 /* Otherwise, go looking through relocs for cases where a direct
4210 call won't reach. Mark the symbol on any such reloc to disable
4211 the optimization and keep the PLT entry as it seems likely that
4212 this will be better than creating trampolines. Note that this
4213 will disable the optimization for all inline PLT calls to a
4214 particular symbol, not just those that won't reach. The
4215 difficulty in doing a more precise optimization is that the
4216 linker needs to make a decision depending on whether a
4217 particular R_PPC_PLTCALL insn can be turned into a direct
4218 call, for each of the R_PPC_PLTSEQ and R_PPC_PLT16* insns in
4219 the sequence, and there is nothing that ties those relocs
4220 together except their symbol. */
4223 {
4236 {
4239 /* Read the relocations. */
4247 {
4262 {
4268 }
4271 {
4275 else
4285 }
4286 }
4289 }
4293 {
4296 else
4298 }
4299 }
4302 }
4304 /* Set plt output section type, htab->tls_get_addr, and call the
4305 generic ELF tls_setup function. */
4307 asection *
4309 {
4319 {
4326 {
4327 /* If glibc supports an optimized __tls_get_addr call stub,
4328 signalled by the presence of __tls_get_addr_opt, and we'll
4329 be calling __tls_get_addr via a plt call stub, then
4330 make __tls_get_addr point to __tls_get_addr_opt. */
4338 {
4344 {
4350 {
4351 /* Use __tls_get_addr_opt in dynamic relocations. */
4357 }
4359 }
4360 }
4361 }
4362 else
4364 }
4368 {
4371 }
4374 }
4376 /* Return TRUE iff REL is a branch reloc with a global symbol matching
4377 HASH. */
4379 static bfd_boolean
4383 {
4389 {
4399 }
4401 }
4403 /* Run through all the TLS relocs looking for optimization
4404 opportunities. */
4406 bfd_boolean
4409 {
4424 /* Make two passes through the relocs. First time check that tls
4425 relocs involved in setting up a tls_get_addr call are indeed
4426 followed by such a call. If they are not, don't do any tls
4427 optimization. On the second pass twiddle tls_mask flags to
4428 notify relocate_section that optimization can be done, and
4429 adjust got and plt refcounts. */
4432 {
4438 {
4442 /* Read the relocations. */
4450 {
4456 bfd_boolean is_local;
4461 {
4469 }
4473 /* If this section has old-style __tls_get_addr calls
4474 without marker relocs, then check that each
4475 __tls_get_addr call reloc is preceded by a reloc
4476 that conceivably belongs to the __tls_get_addr arg
4477 setup insn. If we don't find matching arg setup
4478 relocs, don't do any tls optimization. */
4483 && !expecting_tls_get_addr
4485 {
4492 }
4496 {
4500 /* Fall through. */
4504 /* These relocs should never be against a symbol
4505 defined in a shared lib. Leave them alone if
4506 that turns out to be the case. */
4510 /* LD -> LE */
4518 /* Fall through. */
4523 /* GD -> LE */
4525 else
4526 /* GD -> IE */
4536 {
4537 /* IE -> LE */
4541 }
4542 else
4548 /* Fall through. */
4552 {
4555 {
4559 {
4568 {
4579 }
4580 }
4581 }
4583 }
4591 {
4597 {
4601 }
4603 /* addis rt,2,imm */
4606 {
4607 /* xgettext:c-format */
4612 }
4613 }
4622 }
4625 {
4635 /* Uh oh, we didn't find the expected call. We
4636 could just mark this symbol to exclude it
4637 from tls optimization but it's safer to skip
4638 the entire optimization. */
4645 }
4648 {
4651 }
4652 else
4653 {
4667 }
4669 /* If we don't have old-style __tls_get_addr calls
4670 without TLSGD/TLSLD marker relocs, and we haven't
4671 found a new-style __tls_get_addr call with a
4672 marker for this symbol, then we either have a
4673 broken object file or an -mlongcall style
4674 indirect call to __tls_get_addr without a marker.
4675 Disable optimization in this case. */
4683 {
4695 }
4700 {
4701 /* We managed to get rid of a got entry. */
4704 }
4708 }
4712 }
4713 }
4715 }
4716 \f
4717 /* Return true if we have dynamic relocs against H or any of its weak
4718 aliases, that apply to read-only sections. Cannot be used after
4719 size_dynamic_sections. */
4721 static bfd_boolean
4723 {
4725 do
4726 {
4733 }
4735 /* Return whether H has pc-relative dynamic relocs. */
4737 static bfd_boolean
4739 {
4746 }
4748 /* Adjust a symbol defined by a dynamic object and referenced by a
4749 regular object. The current definition is in some section of the
4750 dynamic object, but we're not including those sections. We have to
4751 change the definition to something the rest of the link can
4752 understand. */
4754 static bfd_boolean
4757 {
4761 #ifdef DEBUG
4764 #endif
4766 /* Make sure we know what is going on here. */
4776 /* Deal with function syms. */
4780 {
4783 /* Discard dyn_relocs when non-pic if we've decided that a
4784 function symbol is local. */
4788 /* Clear procedure linkage table information for any symbol that
4789 won't need a .plt entry. */
4796 && local
4800 {
4801 /* A PLT entry is not required/allowed when:
4803 1. We are not using ld.so; because then the PLT entry
4804 can't be set up, so we can't use one. In this case,
4805 ppc_elf_adjust_dynamic_symbol won't even be called.
4807 2. GC has rendered the entry unused.
4809 3. We know for certain that a call to this symbol
4810 will go to this object, or will remain undefined. */
4814 }
4815 else
4816 {
4817 /* Taking a function's address in a read/write section
4818 doesn't require us to define the function symbol in the
4819 executable on a plt call stub. A dynamic reloc can
4820 be used instead, giving better runtime performance.
4821 (Calls via that function pointer don't need to bounce
4822 through the plt call stub.) Similarly, use a dynamic
4823 reloc for a weak reference when possible, allowing the
4824 resolution of the symbol to be set at load time rather
4825 than link time. */
4833 {
4835 /* If we haven't seen a branch reloc and the symbol
4836 isn't an ifunc then we don't need a plt entry. */
4839 }
4841 /* We are going to be defining the function symbol on the
4842 plt stub, so no dyn_relocs needed when non-pic. */
4844 }
4846 /* Function symbols can't have copy relocs. */
4848 }
4849 else
4852 /* If this is a weak symbol, and there is a real definition, the
4853 processor independent code will have arranged for us to see the
4854 real definition first, and we can just use the same value. */
4856 {
4866 }
4868 /* This is a reference to a symbol defined by a dynamic object which
4869 is not a function. */
4871 /* If we are creating a shared library, we must presume that the
4872 only references to the symbol are via the global offset table.
4873 For such cases we need not do anything here; the relocations will
4874 be handled correctly by relocate_section. */
4876 {
4879 }
4881 /* If there are no references to this symbol that do not use the
4882 GOT, we don't need to generate a copy reloc. */
4884 {
4887 }
4889 /* Protected variables do not work with .dynbss. The copy in
4890 .dynbss won't be used by the shared library with the protected
4891 definition for the variable. Editing to PIC, or text relocations
4892 are preferable to an incorrect program. */
4894 {
4902 }
4904 /* If -z nocopyreloc was given, we won't generate them either. */
4908 /* If we don't find any dynamic relocs in read-only sections, then
4909 we'll be keeping the dynamic relocs and avoiding the copy reloc.
4910 We can't do this if there are any small data relocations. This
4911 doesn't work on VxWorks, where we can not have dynamic
4912 relocations (other than copy and jump slot relocations) in an
4913 executable. */
4921 /* We must allocate the symbol in our .dynbss section, which will
4922 become part of the .bss section of the executable. There will be
4923 an entry for this symbol in the .dynsym section. The dynamic
4924 object will contain position independent code, so all references
4925 from the dynamic object to this symbol will go through the global
4926 offset table. The dynamic linker will use the .dynsym entry to
4927 determine the address it must put in the global offset table, so
4928 both the dynamic object and the regular object will refer to the
4929 same memory location for the variable.
4931 Of course, if the symbol is referenced using SDAREL relocs, we
4932 must instead allocate it in .sbss. */
4937 else
4942 {
4945 /* We must generate a R_PPC_COPY reloc to tell the dynamic
4946 linker to copy the initial value out of the dynamic object
4947 and into the runtime process image. */
4952 else
4957 }
4959 /* We no longer want dyn_relocs. */
4962 }
4963 \f
4964 /* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
4965 xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
4966 specifying the addend on the plt relocation. For -fpic code, the sym
4967 is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
4968 xxxxxxxx.got2.plt_pic32.<callee>. */
4970 static bfd_boolean
4974 {
4983 else
5003 {
5013 }
5015 }
5017 /* Allocate NEED contiguous space in .got, and return the offset.
5018 Handles allocation of the got header when crossing 32k. */
5020 static bfd_vma
5022 {
5023 bfd_vma where;
5027 {
5030 }
5031 else
5032 {
5035 {
5038 }
5039 else
5040 {
5043 {
5046 }
5049 }
5050 }
5052 }
5054 /* Calculate size of GOT entries for symbol given its TLS_MASK.
5055 TLS_LD is excluded because those go in a special GOT slot. */
5059 {
5063 else
5064 {
5072 }
5074 }
5076 /* If H is undefined, make it dynamic if that makes sense. */
5078 static bfd_boolean
5081 {
5093 }
5095 /* Allocate space in associated reloc sections for dynamic relocs. */
5097 static bfd_boolean
5099 {
5104 bfd_boolean dyn;
5112 || (ELIMINATE_COPY_RELOCS
5118 {
5121 /* Make sure this symbol is output as a dynamic symbol. */
5127 {
5129 /* We'll just use htab->tlsld_got.offset. This should
5130 always be the case. It's a little odd if we have
5131 a local dynamic reloc against a non-local symbol. */
5133 else
5135 }
5139 else
5140 {
5150 {
5160 }
5161 }
5162 }
5163 else
5166 /* If no dynamic sections we can't have dynamic relocs, except for
5167 IFUNCs which are handled even in static executables. */
5172 /* Discard relocs on undefined symbols that must be local. */
5177 /* Also discard relocs on undefined weak syms with non-default
5178 visibility, or when dynamic_undefined_weak says so. */
5183 ;
5185 /* In the shared -Bsymbolic case, discard space allocated for
5186 dynamic pc-relative relocs against symbols which turn out to be
5187 defined in regular objects. For the normal shared case, discard
5188 space for relocs that have become local due to symbol visibility
5189 changes. */
5191 {
5192 /* Relocs that use pc_count are those that appear on a call insn,
5193 or certain REL relocs (see must_be_dyn_reloc) that can be
5194 generated via assembly. We want calls to protected symbols to
5195 resolve directly to the function rather than going via the plt.
5196 If people want function pointer comparisons to work as expected
5197 then they should avoid writing weird assembly. */
5199 {
5203 {
5208 else
5210 }
5211 }
5214 {
5218 {
5221 else
5223 }
5224 }
5227 {
5228 /* Make sure this symbol is output as a dynamic symbol. */
5231 }
5232 }
5234 {
5235 /* For the non-pic case, discard space for relocs against
5236 symbols which turn out to need copy relocs or are not
5237 dynamic. */
5245 {
5246 /* Make sure this symbol is output as a dynamic symbol. */
5252 }
5253 else
5255 }
5257 /* Allocate space. */
5259 {
5264 }
5266 /* Handle PLT relocs. Done last, after dynindx has settled.
5267 We might need a PLT entry when the symbol
5268 a) is dynamic, or
5269 b) is an ifunc, or
5270 c) has plt16 relocs and has been processed by adjust_dynamic_symbol, or
5271 d) has plt16 relocs and we are linking statically. */
5282 {
5289 {
5293 {
5296 else
5298 }
5301 {
5303 {
5306 }
5311 else
5312 {
5315 {
5318 }
5323 {
5326 }
5332 }
5333 }
5334 else
5335 {
5337 {
5338 /* If this is the first .plt entry, make room
5339 for the special first entry. */
5343 /* The PowerPC PLT is actually composed of two
5344 parts, the first part is 2 words (for a load
5345 and a jump), and then there is a remaining
5346 word available at the end. */
5353 /* If this symbol is not defined in a regular
5354 file, and we are not generating a shared
5355 library, then set the symbol to this location
5356 in the .plt. This is to avoid text
5357 relocations, and is required to make
5358 function pointers compare as equal between
5359 the normal executable and the shared library. */
5363 {
5366 }
5368 /* Make room for this entry. */
5370 /* After the 8192nd entry, room for two entries
5371 is allocated. */
5377 }
5379 }
5381 /* We also need to make an entry in the .rela.plt section. */
5383 {
5385 {
5387 {
5390 }
5392 {
5395 }
5396 }
5397 else
5398 {
5402 {
5403 /* Allocate space for the unloaded relocations. */
5406 {
5409 {
5413 }
5418 }
5420 /* Every PLT entry has an associated GOT entry in
5421 .got.plt. */
5423 }
5424 }
5426 }
5427 }
5428 else
5432 {
5435 }
5436 }
5437 else
5438 {
5441 }
5444 }
5447 {
5458 };
5460 /* Set the sizes of the dynamic sections. */
5462 static bfd_boolean
5465 {
5468 bfd_boolean relocs;
5471 #ifdef DEBUG
5473 #endif
5479 {
5480 /* Set the contents of the .interp section to the interpreter. */
5482 {
5487 }
5488 }
5495 /* Set up .got offsets for local syms, and space for local dynamic
5496 relocs. */
5498 {
5504 bfd_size_type locsymcount;
5511 {
5518 {
5521 {
5522 /* Input section has been discarded, either because
5523 it is a copy of a linkonce section or due to
5524 linker script /DISCARD/, so we'll be discarding
5525 the relocs too. */
5526 }
5530 {
5531 /* Relocations in vxworks .tls_vars sections are
5532 handled specially by the loader. */
5533 }
5535 {
5543 {
5547 }
5548 }
5549 }
5550 }
5565 {
5572 else
5573 {
5578 {
5586 }
5587 }
5588 }
5589 else
5595 /* Allocate space for calls to local STT_GNU_IFUNC syms in .iplt. */
5598 {
5605 {
5610 {
5613 }
5614 else
5618 {
5621 }
5625 {
5629 }
5633 {
5635 {
5638 }
5640 {
5643 }
5645 }
5646 }
5647 else
5649 }
5650 }
5652 /* Allocate space for global sym dynamic relocs. */
5656 {
5660 }
5661 else
5665 {
5668 /* If we haven't allocated the header, do so now. When we get here,
5669 for old plt/got the got size will be 0 to 32764 (not allocated),
5670 or 32780 to 65536 (header allocated). For new plt/got, the
5671 corresponding ranges are 0 to 32768 and 32780 to 65536. */
5673 {
5678 }
5681 }
5683 {
5688 }
5690 {
5698 }
5703 {
5705 /* Space for the branch table. */
5708 /* Pad out to align the start of PLTresolve. */
5714 {
5721 {
5731 }
5737 {
5747 }
5748 }
5749 }
5756 {
5760 {
5764 }
5765 }
5767 /* We've now determined the sizes of the various dynamic sections.
5768 Allocate memory for them. */
5771 {
5779 {
5780 /* We'd like to strip these sections if they aren't needed, but if
5781 we've exported dynamic symbols from them we must leave them.
5782 It's too late to tell BFD to get rid of the symbols. */
5785 /* Strip this section if we don't need it; see the
5786 comment below. */
5787 }
5797 {
5798 /* Strip these too. */
5799 }
5802 {
5804 }
5806 {
5808 {
5809 /* Remember whether there are any relocation sections. */
5812 /* We use the reloc_count field as a counter if we need
5813 to copy relocs into the output file. */
5815 }
5816 }
5817 else
5818 {
5819 /* It's not one of our sections, so don't allocate space. */
5821 }
5824 {
5825 /* If we don't need this section, strip it from the
5826 output file. This is mostly to handle .rela.bss and
5827 .rela.plt. We must create both sections in
5828 create_dynamic_sections, because they must be created
5829 before the linker maps input sections to output
5830 sections. The linker does that before
5831 adjust_dynamic_symbol is called, and it is that
5832 function which decides whether anything needs to go
5833 into these sections. */
5836 }
5841 /* Allocate memory for the section contents. */
5845 }
5848 {
5849 /* Add some entries to the .dynamic section. We fill in the
5850 values later, in ppc_elf_finish_dynamic_sections, but we
5851 must add the entries now so that we get the correct size for
5852 the .dynamic section. The DT_DEBUG entry is filled in by the
5853 dynamic linker and used by the debugger. */
5854 #define add_dynamic_entry(TAG, VAL) \
5855 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
5858 relocs))
5864 {
5872 }
5873 }
5874 #undef add_dynamic_entry
5878 {
5880 bfd_vma val;
5883 /* CIE length (rewrite in case little-endian). */
5886 /* FDE length. */
5890 /* CIE pointer. */
5894 /* Offset to .glink. Set later. */
5896 /* .glink size. */
5899 /* Augmentation. */
5904 {
5909 {
5912 }
5914 {
5918 }
5919 else
5920 {
5924 }
5927 p++;
5931 }
5934 }
5937 }
5939 /* Arrange to have _SDA_BASE_ or _SDA2_BASE_ stripped from the output
5940 if it looks like nothing is using them. */
5942 static void
5944 {
5948 {
5953 {
5956 {
5958 /* This is somewhat magic. See elf_link_output_extsym. */
5961 }
5962 }
5963 }
5964 }
5966 void
5968 {
5972 {
5975 }
5976 }
5979 /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */
5981 static bfd_boolean
5983 {
5991 }
5992 \f
5993 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
5995 /* Relaxation trampolines. r12 is available for clobbering (r11, is
5996 used for some functions that are allowed to break the ABI). */
5998 {
6007 };
6010 {
6015 };
6017 struct ppc_elf_relax_info
6018 {
6021 };
6023 /* This function implements long branch trampolines, and the ppc476
6024 icache bug workaround. Any section needing trampolines or patch
6025 space for the workaround has its size extended so that we can
6026 add trampolines at the end of the section. */
6028 static bfd_boolean
6033 {
6034 struct one_branch_fixup
6035 {
6038 /* Final link, can use the symbol offset. For a
6039 relocatable link we use the symbol's index. */
6040 bfd_vma toff;
6041 bfd_vma trampoff;
6042 };
6052 bfd_boolean workaround_change;
6056 bfd_boolean maybe_pasted;
6060 /* No need to do anything with non-alloc or non-code sections. */
6067 /* We cannot represent the required PIC relocs in the output, so don't
6068 do anything. The linker doesn't support mixing -shared and -r
6069 anyway. */
6088 {
6090 {
6095 }
6098 }
6102 /* Space for a branch around any trampolines. */
6111 {
6112 /* Get a copy of the native relocations. */
6114 {
6119 }
6125 {
6140 {
6161 }
6163 /* Get the value of the symbol referred to by the reloc. */
6169 {
6171 ;
6174 else
6179 }
6180 else
6181 {
6186 {
6192 }
6193 else
6196 /* If this branch is to __tls_get_addr then we may later
6197 optimise away the call. We won't be needing a long-
6198 branch stub in that case. */
6202 {
6207 /* The previous reloc should be one of R_PPC_TLSGD or
6208 R_PPC_TLSLD, or for older object files, a reloc
6209 on the __tls_get_addr arg setup insn. Get tls
6210 mask bits from the symbol on that reloc. */
6212 {
6216 {
6222 }
6223 }
6224 else
6225 {
6233 tls_mask
6235 }
6237 /* The mask bits tell us if the call will be
6238 optimised away. */
6249 }
6252 }
6255 {
6263 }
6265 /* The condition here under which we call find_plt_ent must
6266 match that in relocate_section. If we call find_plt_ent here
6267 but not in relocate_section, or vice versa, then the branch
6268 destination used here may be incorrect. */
6271 {
6272 /* We know is_branch_reloc (r_type) is true. */
6276 }
6279 {
6284 }
6286 {
6294 {
6299 {
6302 }
6303 else
6304 {
6307 }
6308 }
6309 }
6311 /* If the branch and target are in the same section, you have
6312 no hope of adding stubs. We'll error out later should the
6313 branch overflow. */
6317 /* toff is used for the symbol index when the symbol is
6318 undefined and we're doing a relocatable link, so we can't
6319 support addends. It would be possible to do so by
6320 putting the addend in one_branch_fixup but addends on
6321 branches are rare so it hardly seems worth supporting. */
6328 /* There probably isn't any reason to handle symbols in
6329 SEC_MERGE sections; SEC_MERGE doesn't seem a likely
6330 attribute for a code section, and we are only looking at
6331 branches. However, implement it correctly here as a
6332 reference for other target relax_section functions. */
6334 {
6335 /* At this stage in linking, no SEC_MERGE symbol has been
6336 adjusted, so all references to such symbols need to be
6337 passed through _bfd_merged_section_offset. (Later, in
6338 relocate_section, all SEC_MERGE symbols *except* for
6339 section symbols have been adjusted.)
6341 gas may reduce relocations against symbols in SEC_MERGE
6342 sections to a relocation against the section symbol when
6343 the original addend was zero. When the reloc is against
6344 a section symbol we should include the addend in the
6345 offset passed to _bfd_merged_section_offset, since the
6346 location of interest is the original symbol. On the
6347 other hand, an access to "sym+addend" where "sym" is not
6348 a section symbol should not include the addend; Such an
6349 access is presumed to be an offset from "sym"; The
6350 location of interest is just "sym". */
6355 toff
6358 toff);
6363 }
6364 /* PLTREL24 addends are special. */
6368 /* Attempted -shared link of non-pic code loses. */
6378 /* Avoid creating a lot of unnecessary fixups when
6379 relocatable if the output section size is such that a
6380 fixup can be created at final link.
6381 The max_branch_offset adjustment allows for some number
6382 of other fixups being needed at final link. */
6388 /* If the branch is in range, no need to do anything. */
6391 /* A relocatable link may have sections moved during
6392 final link, so do not presume they remain in range. */
6394 {
6402 }
6404 /* Look for an existing fixup to this address. */
6410 {
6416 /* Oh dear, we can't reach a trampoline. Don't try to add
6417 one. We'll report an error later. */
6421 {
6424 }
6425 else
6426 {
6429 }
6433 {
6437 }
6439 /* Hijack the old relocation. Since we need two
6440 relocations for this use a "composite" reloc. */
6442 stub_rtype);
6448 /* Record the fixup so we don't do it again this section. */
6457 changes++;
6458 }
6459 else
6460 {
6465 /* Nop out the reloc, since we're finalizing things here. */
6467 }
6469 /* Get the section contents. */
6471 {
6472 /* Get cached copy if it exists. */
6475 /* Go get them off disk. */
6478 }
6480 /* Fix up the existing branch to hit the trampoline. */
6483 {
6501 }
6502 }
6505 {
6509 }
6510 }
6517 {
6527 {
6528 /* Keep space aligned, to ensure the patch code itself does
6529 not cross a page. Don't decrease size calculated on a
6530 previous pass as otherwise we might never settle on a layout. */
6534 {
6537 }
6538 /* Ensure relocate_section is called. */
6540 }
6542 }
6545 {
6550 }
6557 {
6560 else
6561 {
6562 /* Cache the symbols for elf_link_input_bfd. */
6564 }
6565 }
6569 {
6572 else
6573 {
6574 /* Cache the section contents for elf_link_input_bfd. */
6576 }
6577 }
6581 {
6582 /* Append sufficient NOP relocs so we can write out relocation
6583 information for the trampolines. */
6594 {
6598 }
6605 }
6612 error_return:
6614 {
6618 }
6626 }
6627 \f
6628 /* What to do when ld finds relocations against symbols defined in
6629 discarded sections. */
6631 static unsigned int
6633 {
6641 }
6642 \f
6643 /* Fill in the address for a pointer generated in a linker section. */
6645 static bfd_vma
6649 bfd_vma relocation,
6651 {
6657 {
6658 /* Handle global symbol. */
6664 }
6665 else
6666 {
6667 /* Handle local symbol. */
6673 }
6677 lsect);
6680 /* Offset will always be a multiple of four, so use the bottom bit
6681 as a "written" flag. */
6683 {
6688 }
6695 #ifdef DEBUG
6699 #endif
6702 }
6704 #define PPC_LO(v) ((v) & 0xffff)
6705 #define PPC_HI(v) (((v) >> 16) & 0xffff)
6706 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
6708 static void
6712 {
6715 bfd_vma plt;
6721 {
6738 }
6745 {
6759 else
6760 {
6764 }
6765 }
6766 else
6767 {
6771 }
6778 {
6781 }
6782 }
6784 /* Return true if symbol is defined statically. */
6786 static bfd_boolean
6788 {
6793 }
6795 /* If INSN is an opcode that may be used with an @tls operand, return
6796 the transformed insn for TLS optimisation, otherwise return 0. If
6797 REG is non-zero only match an insn with RB or RA equal to REG. */
6799 unsigned int
6801 {
6811 else
6815 /* add -> addi. */
6821 /* load and store indexed -> dform. */
6824 /* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
6827 /* lwax -> lwa. */
6829 else
6833 }
6835 /* If INSN is an opcode that may be used with an @tprel operand, return
6836 the transformed insn for an undefined weak symbol, ie. with the
6837 thread pointer REG operand removed. Otherwise return 0. */
6839 unsigned int
6841 {
6862 {
6864 }
6869 {
6874 }
6875 else
6878 }
6880 static bfd_boolean
6882 {
6887 }
6889 static bfd_boolean
6891 {
6895 }
6897 /* The RELOCATE_SECTION function is called by the ELF backend linker
6898 to handle the relocations for a section.
6900 The relocs are always passed as Rela structures; if the section
6901 actually uses Rel structures, the r_addend field will always be
6902 zero.
6904 This function is responsible for adjust the section contents as
6905 necessary, and (if using Rela relocs and generating a
6906 relocatable output file) adjusting the reloc addend as
6907 necessary.
6909 This function does not have to worry about setting the reloc
6910 address or the reloc symbol index.
6912 LOCAL_SYMS is a pointer to the swapped in local symbols.
6914 LOCAL_SECTIONS is an array giving the section in the input file
6915 corresponding to the st_shndx field of each local symbol.
6917 The global hash table entry for the global symbols can be found
6918 via elf_sym_hashes (input_bfd).
6920 When generating relocatable output, this function must handle
6921 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
6922 going to be the section symbol corresponding to the output
6923 section, which means that the addend must be adjusted
6924 accordingly. */
6926 static bfd_boolean
6935 {
6942 Elf_Internal_Rela outrel;
6947 bfd_boolean is_vxworks_tls;
6951 #ifdef DEBUG
6957 #endif
6960 {
6963 }
6967 /* Initialize howto table if not already done. */
6975 /* We have to handle relocations in vxworks .tls_vars sections
6976 specially, because the dynamic loader is 'weird'. */
6985 {
6987 bfd_vma addend;
6988 bfd_reloc_status_type r;
6995 bfd_vma relocation;
6998 bfd_boolean warned;
7003 again:
7013 {
7019 }
7020 else
7021 {
7022 bfd_boolean ignored;
7030 }
7033 {
7034 /* For relocs against symbols from removed linkonce sections,
7035 or sections discarded by a linker script, we just want the
7036 section contents zeroed. Avoid any special processing. */
7047 /* For ld -r, remove relocations in debug sections against
7048 symbols defined in discarded sections. Not done for
7049 non-debug to preserve relocs in .eh_frame which the
7050 eh_frame editing code expects to be present. */
7053 wrel--;
7056 }
7059 {
7063 {
7064 /* R_PPC_PLTREL24 is rather special. If non-zero, the
7065 addend specifies the GOT pointer offset within .got2. */
7067 }
7072 }
7074 /* TLS optimizations. Replace instruction sequences and relocs
7075 based on information we collected in tls_optimize. We edit
7076 RELOCS so that --emit-relocs will output something sensible
7077 for the final instruction stream. */
7083 {
7086 local_plt
7090 }
7092 /* Ensure reloc mapping code below stays sane. */
7103 {
7111 {
7112 bfd_vma insn;
7122 }
7128 {
7129 bfd_vma insn;
7139 /* Was PPC_TLS which sits on insn boundary, now
7140 PPC_TPREL16_LO which is at low-order half-word. */
7142 }
7155 {
7156 tls_gdld_hi:
7160 else
7161 {
7165 }
7167 }
7180 {
7182 bfd_vma offset;
7184 tls_ldgd_opt:
7186 /* If not using the newer R_PPC_TLSGD/LD to mark
7187 __tls_get_addr calls, we must trust that the call
7188 stays with its arg setup insns, ie. that the next
7189 reloc is the __tls_get_addr call associated with
7190 the current reloc. Edit both insns. */
7196 /* We read the low GOT_TLS insn because we need to keep
7197 the destination reg. It may be something other than
7198 the usual r3, and moved to r3 before the call by
7199 intervening code. */
7203 {
7204 /* IE */
7208 {
7212 }
7216 }
7217 else
7218 {
7219 /* LE */
7223 {
7224 /* Was an LD reloc. */
7227 r_symndx++)
7237 }
7241 {
7247 }
7248 }
7252 {
7253 /* We changed the symbol on an LD reloc. Start over
7254 in order to get h, sym, sec etc. right. */
7256 }
7257 }
7263 {
7268 {
7272 }
7275 {
7276 /* IE */
7279 }
7280 else
7281 {
7282 /* LE */
7286 }
7289 /* Zap the reloc on the _tls_get_addr call too. */
7292 }
7298 {
7302 {
7306 }
7310 r_symndx++)
7326 /* Zap the reloc on the _tls_get_addr call too. */
7330 }
7332 }
7334 /* Handle other relocations that tweak non-addend part of insn. */
7337 {
7341 /* Branch taken prediction relocations. */
7345 /* Fall through. */
7347 /* Branch not taken prediction relocations. */
7350 {
7361 /* Invert 'y' bit if not the default. */
7366 }
7370 {
7377 {
7379 {
7380 /* Convert addis to lis. */
7384 }
7385 }
7391 }
7393 }
7402 {
7403 /* Convert lis;addi or lis;load/store accessing a protected
7404 variable defined in a shared library to PIC. */
7408 {
7413 {
7415 bfd_vma off;
7416 bfd_vma got_addr;
7440 /* Convert lis to lwz, loading address from GOT. */
7450 /* Use one of the spare relocs, so --emit-relocs
7451 output is reasonable. */
7458 /* Continue on as if we had a got reloc, to output
7459 dynamic reloc. */
7461 }
7462 else
7463 _bfd_error_handler
7464 /* xgettext:c-format */
7469 }
7471 {
7492 {
7493 /* Arrange to apply the reloc addend, if any. */
7497 }
7498 else
7499 _bfd_error_handler
7500 /* xgettext:c-format */
7505 }
7506 }
7510 {
7514 {
7517 }
7520 {
7526 }
7535 {
7544 }
7546 {
7553 {
7554 /* Uh oh, we are going to create a pic glink stub
7555 for an ifunc (here for h == NULL and later in
7556 finish_dynamic_symbol for h != NULL), and
7557 apparently are using code compiled with
7558 -mbss-plt. The difficulty is that -mbss-plt code
7559 gives no indication via a magic PLTREL24 addend
7560 whether r30 is equal to _GLOBAL_OFFSET_TABLE_ or
7561 is pointing into a .got2 section (and how far
7562 into .got2). */
7564 /* xgettext:c-format */
7567 }
7577 else
7581 }
7582 }
7592 {
7594 /* xgettext:c-format */
7611 /* GOT16 relocations. Like an ADDR16 using the symbol's
7612 address in the GOT as relocation value instead of the
7613 symbol's value itself. Also, create a GOT entry for the
7614 symbol and put the symbol value there. */
7648 dogot:
7649 {
7650 /* Relocation is to the entry for this symbol in the global
7651 offset table. */
7652 bfd_vma off;
7664 {
7669 /* This is actually a static link, or it is a
7670 -Bsymbolic link and the symbol is defined
7671 locally, or the symbol was forced to be local
7672 because of a version file. */
7673 ;
7674 else
7675 {
7678 }
7680 }
7681 else
7682 {
7686 }
7688 /* The offset must always be a multiple of 4. We use the
7689 least significant bit to record whether we have already
7690 processed this entry. */
7694 else
7695 {
7707 /* We might have multiple got entries for this sym.
7708 Initialize them all. */
7709 do
7710 {
7714 {
7717 }
7719 {
7722 }
7724 {
7727 }
7729 {
7732 }
7734 /* Generate relocs for the dynamic linker. */
7742 {
7747 {
7753 }
7759 {
7762 {
7769 outrel.r_info
7771 }
7772 }
7781 else
7784 {
7787 {
7790 else
7792 }
7793 }
7798 }
7800 /* Init the .got section contents if we're not
7801 emitting a reloc. */
7802 else
7803 {
7807 {
7810 else
7811 {
7814 else
7818 }
7821 {
7825 }
7826 }
7829 }
7834 }
7839 }
7845 {
7847 {
7852 {
7856 {
7859 }
7860 }
7861 }
7862 }
7864 /* If here for a picfixup, we're done. */
7870 + off
7873 /* Addends on got relocations don't make much sense.
7874 x+off@got is actually x@got+off, and since the got is
7875 generated by a hash table traversal, the value in the
7876 got at entry m+n bears little relation to the entry m. */
7879 /* xgettext:c-format */
7883 sym_name);
7884 }
7887 /* Relocations that need no special processing. */
7889 /* It makes no sense to point a local relocation
7890 at a symbol not in this object. */
7892 {
7895 input_bfd,
7896 input_section,
7898 TRUE);
7900 }
7902 {
7903 /* @local on an ifunc does not really make sense since
7904 the ifunc resolver can take you anywhere. More
7905 seriously, calls to ifuncs must go through a plt call
7906 stub, and for pic the plt call stubs uses r30 to
7907 access the PLT. The problem is that a call that is
7908 local won't have the +32k reloc addend trick marking
7909 -fPIC code, so the linker won't know whether r30 is
7910 _GLOBAL_OFFSET_TABLE_ or pointing into a .got2 section. */
7911 /* xgettext:c-format */
7915 }
7926 /* Relocations that may need to be propagated if this is a shared
7927 object. */
7935 {
7936 /* Make this relocation against an undefined weak symbol
7937 resolve to zero. This is really just a tweak, since
7938 code using weak externs ought to check that they are
7939 defined before using them. */
7946 }
7949 /* The TPREL16 relocs shouldn't really be used in shared
7950 libs or with non-local symbols as that will result in
7951 DT_TEXTREL being set, but support them anyway. */
7979 /* fall through */
7997 /* If these relocations are not to a named symbol, they can be
7998 handled right here, no need to bother the dynamic linker. */
8002 /* fall through */
8010 /* fall through */
8012 dodyn:
8024 {
8030 #ifdef DEBUG
8035 #endif
8037 /* When generating a shared object, these relocations
8038 are copied into the output file to be resolved at run
8039 time. */
8042 input_section,
8050 /* Optimize unaligned reloc use. */
8061 {
8067 }
8068 else
8069 {
8073 {
8075 {
8076 /* If we get here when building a static
8077 executable, then the libc startup function
8078 responsible for applying indirect function
8079 relocations is going to complain about
8080 the reloc type.
8081 If we get here when building a dynamic
8082 executable, it will be because we have
8083 a text relocation. The dynamic loader
8084 will set the text segment writable and
8085 non-executable to apply text relocations.
8086 So we'll segfault when trying to run the
8087 indirection function to resolve the reloc. */
8089 /* xgettext:c-format */
8094 sym_name);
8096 }
8098 ;
8100 {
8103 }
8104 else
8105 {
8108 /* We are turning this relocation into one
8109 against a section symbol. It would be
8110 proper to subtract the symbol's value,
8111 osec->vma, from the emitted reloc addend,
8112 but ld.so expects buggy relocs.
8113 FIXME: Why not always use a zero index? */
8116 {
8119 }
8120 else
8121 {
8124 {
8127 }
8129 }
8131 /* ld.so doesn't expect buggy TLS relocs.
8132 Don't leave the symbol value in the
8133 addend for them. */
8136 }
8139 }
8142 else
8144 }
8148 {
8154 }
8165 /* This reloc will be computed at runtime. Clear the memory
8166 so that it contains a predictable value for prelink. */
8168 {
8172 }
8173 }
8179 {
8184 {
8188 }
8194 else
8198 }
8199 /* Fall through. */
8202 {
8209 {
8219 }
8220 else
8221 {
8224 }
8230 /* First insn is HA, second is LO. */
8243 {
8248 }
8250 /* Rewrite the reloc and convert one of the trailing nop
8251 relocs to describe this relocation. */
8253 /* The relocs are at the bottom 2 bytes */
8261 }
8264 /* Indirect .sdata relocation. */
8268 {
8271 }
8272 relocation
8278 /* Indirect .sdata2 relocation. */
8282 {
8285 }
8286 relocation
8292 /* Handle the TOC16 reloc. We want to use the offset within the .got
8293 section, not the actual VMA. This is appropriate when generating
8294 an embedded ELF object, for which the .got section acts like the
8295 AIX .toc section. */
8298 {
8301 }
8310 {
8317 {
8318 /* We didn't make a PLT entry for this symbol. This
8319 happens when statically linking PIC code, or when
8320 using -Bsymbolic. */
8321 }
8322 else
8323 {
8324 /* Relocation is to the entry for this symbol in the
8325 procedure linkage table. */
8331 else
8335 }
8336 }
8338 /* R_PPC_PLTREL24 is rather special. If non-zero, the
8339 addend specifies the GOT pointer offset within .got2.
8340 Don't apply it to the relocation field. */
8355 {
8360 }
8363 {
8369 {
8377 {
8380 else
8382 }
8387 {
8394 else
8397 }
8398 }
8399 }
8403 /* Relocate against _SDA_BASE_. */
8405 {
8412 {
8415 }
8421 {
8422 _bfd_error_handler
8423 /* xgettext:c-format */
8426 input_bfd,
8427 sym_name,
8429 name);
8430 }
8431 }
8434 /* Relocate against _SDA2_BASE_. */
8436 {
8443 {
8446 }
8452 {
8453 _bfd_error_handler
8454 /* xgettext:c-format */
8457 input_bfd,
8458 sym_name,
8460 name);
8461 }
8462 }
8507 /* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
8512 {
8519 {
8522 }
8527 {
8530 }
8533 {
8536 }
8539 {
8541 }
8542 else
8543 {
8544 _bfd_error_handler
8545 /* xgettext:c-format */
8548 input_bfd,
8549 sym_name,
8551 name);
8556 }
8559 {
8561 {
8564 }
8566 }
8571 /* The PowerPC Embedded Application Binary Interface
8572 version 1.0 insanely chose to specify R_PPC_EMB_SDA21
8573 operating on a 24-bit field at r_offset. GNU as and
8574 GNU ld have always assumed R_PPC_EMB_SDA21 operates on
8575 a 32-bit bit insn at r_offset. Cope with object file
8576 producers that possibly comply with the EABI in
8577 generating an odd r_offset for big-endian objects. */
8585 {
8589 /* Force e_li insn, keeping RT from original insn. */
8593 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
8594 /* Top 4 bits of value to 17..20. */
8596 /* Next 5 bits of the value to 11..15. */
8598 /* And the final 11 bits of the value to bits 21 to 31. */
8607 }
8608 /* Fill in register field. */
8611 }
8620 {
8621 bfd_vma value;
8626 {
8629 }
8638 else
8639 {
8640 _bfd_error_handler
8641 /* xgettext:c-format */
8644 input_bfd,
8645 sym_name,
8647 name);
8652 }
8655 {
8658 }
8664 split16a_type,
8669 split16d_type,
8672 {
8676 split16a_type,
8678 }
8680 {
8684 split16d_type,
8686 }
8688 {
8692 split16a_type,
8694 }
8696 {
8700 split16d_type,
8702 }
8703 }
8710 /* Relocate against the beginning of the section. */
8716 {
8719 }
8723 /* Negative relocations. */
8745 /* xgettext:c-format */
8752 }
8755 {
8761 {
8764 }
8769 {
8775 }
8777 }
8780 {
8786 {
8794 }
8806 {
8812 }
8819 }
8821 /* Do any further special processing. */
8823 {
8835 /* It's just possible that this symbol is a weak symbol
8836 that's not actually defined anywhere. In that case,
8837 'sec' would be NULL, and we should leave the symbol
8838 alone (it will be set to zero elsewhere in the link). */
8841 /* Fall through. */
8849 /* Add 0x10000 if sign bit in 0:15 is set.
8850 Bits 0:15 are not used. */
8873 {
8874 /* The 32-bit ABI lacks proper relocations to deal with
8875 certain 64-bit instructions. Prevent damage to bits
8876 that make up part of the insn opcode. */
8886 else
8892 {
8895 /* xgettext:c-format */
8901 }
8902 }
8904 }
8906 #ifdef DEBUG
8911 sym_name,
8912 r_symndx,
8915 #endif
8922 {
8924 /* xgettext:c-format */
8928 sym_name);
8930 }
8932 /* 16-bit fields in insns mostly have signed values, but a
8933 few insns have 16-bit unsigned values. Really, we should
8934 have different reloc types. */
8938 {
8942 {
8952 }
8954 {
8958 }
8959 }
8962 {
8963 /* Split field reloc isn't handled by _bfd_final_link_relocate. */
8966 else
8967 {
8980 }
8981 }
8982 else
8987 {
8989 {
8990 overflow:
8991 /* On code like "if (foo) foo();" don't report overflow
8992 on a branch to zero when foo is undefined. */
9001 }
9002 else
9003 {
9005 /* xgettext:c-format */
9010 }
9011 }
9012 copy_reloc:
9015 }
9018 {
9025 {
9026 /* It is too late to remove an empty reloc section. Leave
9027 one NONE reloc.
9028 ??? What is wrong with an empty section??? */
9031 wrel++;
9032 }
9037 }
9039 #ifdef DEBUG
9041 #endif
9047 {
9048 /* Branch around the trampolines. */
9051 }
9058 {
9063 {
9072 {
9075 }
9076 }
9078 /* The idea is: Replace the last instruction on a page with a
9079 branch to a patch area. Put the insn there followed by a
9080 branch back to the next page. Complicated a little by
9081 needing to handle moved conditional branches, and by not
9082 wanting to touch data-in-text. */
9091 {
9094 bfd_boolean is_data;
9098 /* Do we have a data reloc at this offset? If so, leave
9099 the word alone. */
9105 {
9111 else
9112 {
9114 {
9123 }
9125 }
9126 }
9130 /* Some instructions can be left alone too. Unconditional
9131 branches, except for bcctr with BO=0x14 (bctr, bctrl),
9132 avoid the icache failure.
9134 The problem occurs due to prefetch across a page boundary
9135 where stale instructions can be fetched from the next
9136 page, and the mechanism for flushing these bad
9137 instructions fails under certain circumstances. The
9138 unconditional branches:
9139 1) Branch: b, bl, ba, bla,
9140 2) Branch Conditional: bc, bca, bcl, bcla,
9141 3) Branch Conditional to Link Register: bclr, bclrl,
9142 where (2) and (3) have BO=0x14 making them unconditional,
9143 prevent the bad prefetch because the prefetch itself is
9144 affected by these instructions. This happens even if the
9145 instruction is not executed.
9147 A bctr example:
9148 .
9149 . lis 9,new_page@ha
9150 . addi 9,9,new_page@l
9151 . mtctr 9
9152 . bctr
9153 . nop
9154 . nop
9155 . new_page:
9156 .
9157 The bctr is not predicted taken due to ctr not being
9158 ready, so prefetch continues on past the bctr into the
9159 new page which might have stale instructions. If they
9160 fail to be flushed, then they will be executed after the
9161 bctr executes. Either of the following modifications
9162 prevent the bad prefetch from happening in the first
9163 place:
9164 .
9165 . lis 9,new_page@ha lis 9,new_page@ha
9166 . addi 9,9,new_page@l addi 9,9,new_page@l
9167 . mtctr 9 mtctr 9
9168 . bctr bctr
9169 . nop b somewhere_else
9170 . b somewhere_else nop
9171 . new_page: new_page:
9172 . */
9191 {
9194 /* If the insn we are patching had a reloc, adjust the
9195 reloc r_offset so that the reloc applies to the moved
9196 location. This matters for -r and --emit-relocs. */
9198 {
9201 /* Keep the relocs sorted by r_offset. */
9204 }
9207 /* Adjust REL16 addends too. */
9209 {
9218 }
9220 /* If we are building a PIE or shared library with
9221 non-PIC objects, perhaps we had a dynamic reloc too?
9222 If so, the dynamic reloc must move with the insn. */
9225 {
9227 bfd_vma soffset;
9234 {
9242 else
9243 {
9245 {
9249 }
9254 }
9255 }
9256 }
9257 }
9258 else
9263 {
9270 {
9278 else
9286 }
9288 {
9297 }
9298 else
9299 {
9301 {
9306 }
9319 }
9320 }
9321 else
9322 {
9329 }
9332 }
9333 }
9336 }
9337 \f
9338 /* Write out the PLT relocs and entries for H. */
9340 static bfd_boolean
9342 {
9346 bfd_boolean doneone;
9351 {
9353 {
9354 Elf_Internal_Rela rela;
9356 bfd_vma reloc_index;
9364 else
9365 {
9371 }
9373 /* This symbol has an entry in the procedure linkage table.
9374 Set it up. */
9378 {
9379 bfd_vma got_offset;
9382 /* The first three entries in .got.plt are reserved. */
9385 /* Use the right PLT. */
9389 /* Fill in the .plt on VxWorks. */
9391 {
9398 }
9399 else
9400 {
9409 }
9416 /* This instruction is an immediate load. The value loaded is
9417 the byte offset of the R_PPC_JMP_SLOT relocation from the
9418 start of the .rela.plt section. The value is stored in the
9419 low-order 16 bits of the load instruction. */
9420 /* NOTE: It appears that this is now an index rather than a
9421 prescaled offset. */
9425 /* This instruction is a PC-relative branch whose target is
9426 the start of the PLT section. The address of this branch
9427 instruction is 20 bytes beyond the start of this PLT entry.
9428 The address is encoded in bits 6-29, inclusive. The value
9429 stored is right-shifted by two bits, permitting a 26-bit
9430 offset. */
9440 /* Fill in the GOT entry corresponding to this PLT slot with
9441 the address immediately after the "bctr" instruction
9442 in this PLT entry. */
9449 {
9450 /* Fill in a couple of entries in .rela.plt.unloaded. */
9456 /* Provide the @ha relocation for the first instruction. */
9461 R_PPC_ADDR16_HA);
9466 /* Provide the @l relocation for the second instruction. */
9471 R_PPC_ADDR16_LO);
9476 /* Provide a relocation for the GOT entry corresponding to this
9477 PLT slot. Point it at the middle of the .plt entry. */
9482 R_PPC_ADDR32);
9485 }
9487 /* VxWorks uses non-standard semantics for R_PPC_JMP_SLOT.
9488 In particular, the offset for the relocation is not the
9489 address of the PLT entry for this function, as specified
9490 by the ABI. Instead, the offset is set to the address of
9491 the GOT slot for this function. See EABI 4.4.4.1. */
9496 }
9497 else
9498 {
9502 {
9504 {
9507 }
9508 else
9509 {
9512 }
9517 }
9520 {
9523 }
9524 else
9525 {
9533 {
9534 /* We don't need to fill in the .plt. The ppc dynamic
9535 linker will fill it in. */
9536 }
9537 else
9538 {
9544 }
9545 }
9546 }
9549 {
9550 /* Fill in the entry in the .rela.plt section. */
9553 {
9556 else
9561 }
9562 else
9563 {
9569 }
9571 }
9573 }
9578 {
9584 {
9587 else
9589 }
9595 /* We only need one non-PIC glink stub. */
9597 }
9598 else
9600 }
9602 }
9604 /* Finish up PLT handling. */
9606 bfd_boolean
9608 {
9618 {
9622 bfd_size_type locsymcount;
9640 {
9642 {
9647 bfd_vma val;
9648 Elf_Internal_Rela rela;
9653 {
9657 }
9664 {
9669 }
9670 else
9671 {
9674 {
9677 }
9678 else
9679 {
9683 }
9684 }
9696 }
9697 }
9701 {
9704 else
9706 }
9707 }
9709 }
9711 /* Finish up dynamic symbol handling. We set the contents of various
9712 dynamic sections here. */
9714 static bfd_boolean
9719 {
9723 #ifdef DEBUG
9726 #endif
9732 {
9734 {
9735 /* Mark the symbol as undefined, rather than as
9736 defined in the .plt section. Leave the value if
9737 there were any relocations where pointer equality
9738 matters (this is a clue for the dynamic linker, to
9739 make function pointer comparisons work between an
9740 application and shared library), otherwise set it
9741 to zero. */
9746 {
9747 /* This breaks function pointer comparisons, but
9748 that is better than breaking tests for a NULL
9749 function pointer. */
9751 }
9752 }
9753 else
9754 {
9755 /* Set the value of ifunc symbols in a non-pie
9756 executable to the glink entry. This is to avoid
9757 text relocations. We can't do this for ifunc in
9758 allocate_dynrelocs, as we do for normal dynamic
9759 function symbols with plt entries, because we need
9760 to keep the original value around for the ifunc
9761 relocation. */
9762 sym->st_shndx
9763 = (_bfd_elf_section_from_bfd_section
9768 }
9770 }
9773 {
9775 Elf_Internal_Rela rela;
9778 /* This symbols needs a copy reloc. Set it up. */
9780 #ifdef DEBUG
9782 #endif
9790 else
9799 }
9801 #ifdef DEBUG
9803 #endif
9806 }
9807 \f
9808 static enum elf_reloc_type_class
9812 {
9819 {
9828 }
9829 }
9830 \f
9831 /* Finish up the dynamic sections. */
9833 static bfd_boolean
9836 {
9839 bfd_vma got;
9843 #ifdef DEBUG
9845 #endif
9856 {
9864 {
9865 Elf_Internal_Dyn dyn;
9871 {
9875 else
9909 }
9912 }
9913 }
9917 {
9920 {
9925 {
9926 /* Add a blrl instruction at _GLOBAL_OFFSET_TABLE_-4
9927 so that a function can easily find the address of
9928 _GLOBAL_OFFSET_TABLE_. */
9932 }
9935 {
9940 }
9941 }
9942 else
9943 {
9944 /* xgettext:c-format */
9951 }
9954 }
9956 /* Fill in the first entry in the VxWorks procedure linkage table. */
9961 {
9963 /* Use the right PLT. */
9965 ? ppc_elf_vxworks_pic_plt0_entry
9969 {
9976 }
9977 else
9978 {
9981 }
9990 {
9991 Elf_Internal_Rela rela;
9996 /* Output the @ha relocation for the first instruction. */
10005 /* Output the @l relocation for the second instruction. */
10014 /* Fix up the remaining relocations. They may have the wrong
10015 symbol index for _G_O_T_ or _P_L_T_ depending on the order
10016 in which symbols were output. */
10018 {
10019 Elf_Internal_Rela rel;
10035 }
10036 }
10037 }
10042 {
10045 bfd_vma res0;
10047 /*
10048 * PIC glink code is the following:
10049 *
10050 * # ith PLT code stub.
10051 * addis 11,30,(plt+(i-1)*4-got)@ha
10052 * lwz 11,(plt+(i-1)*4-got)@l(11)
10053 * mtctr 11
10054 * bctr
10055 *
10056 * # A table of branches, one for each plt entry.
10057 * # The idea is that the plt call stub loads ctr and r11 with these
10058 * # addresses, so (r11 - res_0) gives the plt index * 4.
10059 * res_0: b PLTresolve
10060 * res_1: b PLTresolve
10061 * .
10062 * # Some number of entries towards the end can be nops
10063 * res_n_m3: nop
10064 * res_n_m2: nop
10065 * res_n_m1:
10066 *
10067 * PLTresolve:
10068 * addis 11,11,(1f-res_0)@ha
10069 * mflr 0
10070 * bcl 20,31,1f
10071 * 1: addi 11,11,(1b-res_0)@l
10072 * mflr 12
10073 * mtlr 0
10074 * sub 11,11,12 # r11 = index * 4
10075 * addis 12,12,(got+4-1b)@ha
10076 * lwz 0,(got+4-1b)@l(12) # got[1] address of dl_runtime_resolve
10077 * lwz 12,(got+8-1b)@l(12) # got[2] contains the map address
10078 * mtctr 0
10079 * add 0,11,11
10080 * add 11,0,11 # r11 = index * 12 = reloc offset.
10081 * bctr
10082 *
10083 * Non-PIC glink code is a little simpler.
10084 *
10085 * # ith PLT code stub.
10086 * lis 11,(plt+(i-1)*4)@ha
10087 * lwz 11,(plt+(i-1)*4)@l(11)
10088 * mtctr 11
10089 * bctr
10090 *
10091 * The branch table is the same, then comes
10092 *
10093 * PLTresolve:
10094 * lis 12,(got+4)@ha
10095 * addis 11,11,(-res_0)@ha
10096 * lwz 0,(got+4)@l(12) # got[1] address of dl_runtime_resolve
10097 * addi 11,11,(-res_0)@l # r11 = index * 4
10098 * mtctr 0
10099 * add 0,11,11
10100 * lwz 12,(got+8)@l(12) # got[2] contains the map address
10101 * add 11,0,11 # r11 = index * 12 = reloc offset.
10102 * bctr
10103 */
10105 /* Build the branch table, one for each plt entry (less one),
10106 and perhaps some padding. */
10112 {
10115 }
10117 {
10120 }
10127 {
10128 /* Ensure that a call stub at the end of a page doesn't
10129 result in prefetch over the end of the page into the
10130 glink branch table. */
10132 bfd_vma page_addr;
10139 {
10140 /* We have a plt call stub that may need fixing. */
10147 {
10148 /* By alignment, we know that there must be at least
10149 one other call stub before this one. */
10153 else
10155 }
10156 }
10157 }
10159 /* Last comes the PLTresolve stub. */
10162 {
10163 bfd_vma bcl;
10186 {
10191 }
10192 else
10193 {
10198 }
10202 }
10203 else
10204 {
10211 else
10222 else
10224 }
10231 {
10235 }
10237 }
10241 {
10243 bfd_vma val;
10246 /* FDE length. */
10248 /* CIE pointer. */
10250 /* Offset to .glink. */
10263 }
10266 }
10267 \f
10268 #define TARGET_LITTLE_SYM powerpc_elf32_le_vec
10270 #define TARGET_BIG_SYM powerpc_elf32_vec
10272 #define ELF_ARCH bfd_arch_powerpc
10273 #define ELF_TARGET_ID PPC32_ELF_DATA
10274 #define ELF_MACHINE_CODE EM_PPC
10275 #define ELF_MAXPAGESIZE 0x10000
10276 #define ELF_COMMONPAGESIZE 0x1000
10277 #define ELF_RELROPAGESIZE ELF_MAXPAGESIZE
10278 #define elf_info_to_howto ppc_elf_info_to_howto
10280 #ifdef EM_CYGNUS_POWERPC
10281 #define ELF_MACHINE_ALT1 EM_CYGNUS_POWERPC
10282 #endif
10284 #ifdef EM_PPC_OLD
10285 #define ELF_MACHINE_ALT2 EM_PPC_OLD
10286 #endif
10288 #define elf_backend_plt_not_loaded 1
10289 #define elf_backend_want_dynrelro 1
10290 #define elf_backend_can_gc_sections 1
10291 #define elf_backend_can_refcount 1
10292 #define elf_backend_rela_normal 1
10293 #define elf_backend_caches_rawsize 1
10295 #define bfd_elf32_mkobject ppc_elf_mkobject
10296 #define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
10297 #define bfd_elf32_bfd_relax_section ppc_elf_relax_section
10298 #define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
10299 #define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
10300 #define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
10301 #define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
10302 #define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
10304 #define elf_backend_object_p ppc_elf_object_p
10305 #define elf_backend_gc_mark_hook ppc_elf_gc_mark_hook
10306 #define elf_backend_section_from_shdr ppc_elf_section_from_shdr
10307 #define elf_backend_relocate_section ppc_elf_relocate_section
10308 #define elf_backend_create_dynamic_sections ppc_elf_create_dynamic_sections
10309 #define elf_backend_check_relocs ppc_elf_check_relocs
10310 #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible
10311 #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol
10312 #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol
10313 #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook
10314 #define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections
10315 #define elf_backend_hash_symbol ppc_elf_hash_symbol
10316 #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol
10317 #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
10318 #define elf_backend_fake_sections ppc_elf_fake_sections
10319 #define elf_backend_additional_program_headers ppc_elf_additional_program_headers
10320 #define elf_backend_modify_segment_map ppc_elf_modify_segment_map
10321 #define elf_backend_grok_prstatus ppc_elf_grok_prstatus
10322 #define elf_backend_grok_psinfo ppc_elf_grok_psinfo
10323 #define elf_backend_write_core_note ppc_elf_write_core_note
10324 #define elf_backend_reloc_type_class ppc_elf_reloc_type_class
10325 #define elf_backend_begin_write_processing ppc_elf_begin_write_processing
10326 #define elf_backend_final_write_processing ppc_elf_final_write_processing
10327 #define elf_backend_write_section ppc_elf_write_section
10328 #define elf_backend_get_sec_type_attr ppc_elf_get_sec_type_attr
10329 #define elf_backend_plt_sym_val ppc_elf_plt_sym_val
10330 #define elf_backend_action_discarded ppc_elf_action_discarded
10331 #define elf_backend_init_index_section _bfd_elf_init_1_index_section
10332 #define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
10336 /* FreeBSD Target */
10338 #undef TARGET_LITTLE_SYM
10339 #undef TARGET_LITTLE_NAME
10341 #undef TARGET_BIG_SYM
10342 #define TARGET_BIG_SYM powerpc_elf32_fbsd_vec
10343 #undef TARGET_BIG_NAME
10346 #undef ELF_OSABI
10347 #define ELF_OSABI ELFOSABI_FREEBSD
10349 #undef elf32_bed
10350 #define elf32_bed elf32_powerpc_fbsd_bed
10354 /* VxWorks Target */
10356 #undef TARGET_LITTLE_SYM
10357 #undef TARGET_LITTLE_NAME
10359 #undef TARGET_BIG_SYM
10360 #define TARGET_BIG_SYM powerpc_elf32_vxworks_vec
10361 #undef TARGET_BIG_NAME
10364 #undef ELF_OSABI
10366 #undef ELF_TARGET_OS
10367 #define ELF_TARGET_OS is_vxworks
10369 /* VxWorks uses the elf default section flags for .plt. */
10372 {
10380 }
10382 /* Like ppc_elf_link_hash_table_create, but overrides
10383 appropriately for VxWorks. */
10386 {
10391 {
10398 }
10400 }
10402 /* Tweak magic VxWorks symbols as they are loaded. */
10403 static bfd_boolean
10411 {
10413 valp))
10417 }
10419 static bfd_boolean
10421 {
10424 }
10426 /* On VxWorks, we emit relocations against _PROCEDURE_LINKAGE_TABLE_, so
10427 define it. */
10428 #undef elf_backend_want_plt_sym
10429 #define elf_backend_want_plt_sym 1
10430 #undef elf_backend_want_got_plt
10431 #define elf_backend_want_got_plt 1
10432 #undef elf_backend_got_symbol_offset
10433 #define elf_backend_got_symbol_offset 0
10434 #undef elf_backend_plt_not_loaded
10435 #define elf_backend_plt_not_loaded 0
10436 #undef elf_backend_plt_readonly
10437 #define elf_backend_plt_readonly 1
10438 #undef elf_backend_got_header_size
10439 #define elf_backend_got_header_size 12
10440 #undef elf_backend_dtrel_excludes_plt
10441 #define elf_backend_dtrel_excludes_plt 1
10443 #undef bfd_elf32_get_synthetic_symtab
10445 #undef bfd_elf32_bfd_link_hash_table_create
10446 #define bfd_elf32_bfd_link_hash_table_create \
10447 ppc_elf_vxworks_link_hash_table_create
10448 #undef elf_backend_add_symbol_hook
10449 #define elf_backend_add_symbol_hook \
10450 ppc_elf_vxworks_add_symbol_hook
10451 #undef elf_backend_link_output_symbol_hook
10452 #define elf_backend_link_output_symbol_hook \
10453 elf_vxworks_link_output_symbol_hook
10454 #undef elf_backend_final_write_processing
10455 #define elf_backend_final_write_processing \
10456 ppc_elf_vxworks_final_write_processing
10457 #undef elf_backend_get_sec_type_attr
10458 #define elf_backend_get_sec_type_attr \
10459 ppc_elf_vxworks_get_sec_type_attr
10460 #undef elf_backend_emit_relocs
10461 #define elf_backend_emit_relocs \
10462 elf_vxworks_emit_relocs
10464 #undef elf32_bed
10465 #define elf32_bed ppc_elf_vxworks_bed