1 /* Print Motorola 68k instructions.
2 Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 1997
3 Free Software Foundation, Inc.
5 This file is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20 #include "floatformat.h"
21 #include <libiberty.h>
23 #include "opcode/m68k.h"
25 /* Local function prototypes */
28 fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
31 dummy_print_address
PARAMS ((bfd_vma
, struct disassemble_info
*));
34 fetch_arg
PARAMS ((unsigned char *, int, int, disassemble_info
*));
37 print_base
PARAMS ((int, bfd_vma
, disassemble_info
*));
39 static unsigned char *
40 print_indexed
PARAMS ((int, unsigned char *, bfd_vma
, disassemble_info
*));
43 print_insn_arg
PARAMS ((const char *, unsigned char *, unsigned char *,
44 bfd_vma
, disassemble_info
*));
46 CONST
char * CONST fpcr_names
[] = {
47 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
48 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"};
50 static char *const reg_names
[] = {
51 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
52 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
55 /* Sign-extend an (unsigned char). */
57 #define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
59 #define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
65 /* Get a 2 byte signed integer. */
66 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
68 (p += 2, FETCH_DATA (info, p), \
69 COERCE16 ((p[-2] << 8) + p[-1]))
71 /* Get a 4 byte signed integer. */
72 #define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
74 (p += 4, FETCH_DATA (info, p), \
75 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
77 /* Get a single precision float. */
78 #define NEXTSINGLE(val, p) \
79 (p += 4, FETCH_DATA (info, p), \
80 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
82 /* Get a double precision float. */
83 #define NEXTDOUBLE(val, p) \
84 (p += 8, FETCH_DATA (info, p), \
85 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
87 /* Get an extended precision float. */
88 #define NEXTEXTEND(val, p) \
89 (p += 12, FETCH_DATA (info, p), \
90 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
92 /* Need a function to convert from packed to double
93 precision. Actually, it's easier to print a
94 packed number than a double anyway, so maybe
95 there should be a special case to handle this... */
96 #define NEXTPACKED(p) \
97 (p += 12, FETCH_DATA (info, p), 0.0)
100 /* Maximum length of an instruction. */
107 /* Points to first byte not fetched. */
108 bfd_byte
*max_fetched
;
109 bfd_byte the_buffer
[MAXLEN
];
114 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
115 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
117 #define FETCH_DATA(info, addr) \
118 ((addr) <= ((struct private *)(info->private_data))->max_fetched \
119 ? 1 : fetch_data ((info), (addr)))
122 fetch_data (info
, addr
)
123 struct disassemble_info
*info
;
127 struct private *priv
= (struct private *)info
->private_data
;
128 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
130 status
= (*info
->read_memory_func
) (start
,
132 addr
- priv
->max_fetched
,
136 (*info
->memory_error_func
) (status
, start
, info
);
137 longjmp (priv
->bailout
, 1);
140 priv
->max_fetched
= addr
;
144 /* This function is used to print to the bit-bucket. */
147 dummy_printer (FILE * file
, const char * format
, ...)
149 dummy_printer (file
) FILE *file
;
154 dummy_print_address (vma
, info
)
156 struct disassemble_info
*info
;
160 /* Print the m68k instruction at address MEMADDR in debugged memory,
161 on INFO->STREAM. Returns length of the instruction, in bytes. */
164 print_insn_m68k (memaddr
, info
)
166 disassemble_info
*info
;
169 register unsigned char *p
;
170 unsigned char *save_p
;
171 register const char *d
;
172 register unsigned long bestmask
;
173 const struct m68k_opcode
*best
= 0;
175 bfd_byte
*buffer
= priv
.the_buffer
;
176 fprintf_ftype save_printer
= info
->fprintf_func
;
177 void (*save_print_address
) PARAMS((bfd_vma
, struct disassemble_info
*))
178 = info
->print_address_func
;
180 static int numopcodes
[16];
181 static const struct m68k_opcode
**opcodes
[16];
185 /* Speed up the matching by sorting the opcode table on the upper
186 four bits of the opcode. */
187 const struct m68k_opcode
**opc_pointer
[16];
189 /* First count how many opcodes are in each of the sixteen buckets. */
190 for (i
= 0; i
< m68k_numopcodes
; i
++)
191 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
193 /* Then create a sorted table of pointers that point into the
195 opc_pointer
[0] = ((const struct m68k_opcode
**)
196 xmalloc (sizeof (struct m68k_opcode
*)
198 opcodes
[0] = opc_pointer
[0];
199 for (i
= 1; i
< 16; i
++)
201 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
202 opcodes
[i
] = opc_pointer
[i
];
205 for (i
= 0; i
< m68k_numopcodes
; i
++)
206 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
210 info
->private_data
= (PTR
) &priv
;
211 /* Tell objdump to use two bytes per chunk and six bytes per line for
212 displaying raw data. */
213 info
->bytes_per_chunk
= 2;
214 info
->bytes_per_line
= 6;
215 info
->display_endian
= BFD_ENDIAN_BIG
;
216 priv
.max_fetched
= priv
.the_buffer
;
217 priv
.insn_start
= memaddr
;
218 if (setjmp (priv
.bailout
) != 0)
223 FETCH_DATA (info
, buffer
+ 2);
224 major_opcode
= (buffer
[0] >> 4) & 15;
225 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
227 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
228 unsigned long opcode
= opc
->opcode
;
229 unsigned long match
= opc
->match
;
231 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
232 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
233 /* Only fetch the next two bytes if we need to. */
234 && (((0xffff & match
) == 0)
236 (FETCH_DATA (info
, buffer
+ 4)
237 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
238 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
241 /* Don't use for printout the variants of divul and divsl
242 that have the same register number in two places.
243 The more general variants will match instead. */
244 for (d
= opc
->args
; *d
; d
+= 2)
248 /* Don't use for printout the variants of most floating
249 point coprocessor instructions which use the same
250 register number in two places, as above. */
252 for (d
= opc
->args
; *d
; d
+= 2)
256 /* Don't match fmovel with more than one register; wait for
260 for (d
= opc
->args
; *d
; d
+= 2)
262 if (d
[0] == 's' && d
[1] == '8')
266 val
= fetch_arg (buffer
, d
[1], 3, info
);
267 if ((val
& (val
- 1)) != 0)
273 if (*d
== '\0' && match
> bestmask
)
284 /* Point at first word of argument data,
285 and at descriptor for first argument. */
288 /* Figure out how long the fixed-size portion of the instruction is.
289 The only place this is stored in the opcode table is
290 in the arguments--look for arguments which specify fields in the 2nd
291 or 3rd words of the instruction. */
292 for (d
= best
->args
; *d
; d
+= 2)
294 /* I don't think it is necessary to be checking d[0] here; I suspect
295 all this could be moved to the case statement below. */
298 if (d
[1] == 'l' && p
- buffer
< 6)
300 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8' )
303 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
328 /* pflusha is an exceptions. It takes no arguments but is two words
329 long. Recognize it by looking at the lower 16 bits of the mask. */
330 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
333 /* lpstop is another exception. It takes a one word argument but is
336 && (best
->match
& 0xffff) == 0xffff
337 && best
->args
[0] == '#'
338 && best
->args
[1] == 'w')
340 /* Copy the one word argument into the usual location for a one
341 word argument, to simplify printing it. We can get away with
342 this because we know exactly what the second word is, and we
343 aren't going to print anything based on it. */
345 FETCH_DATA (info
, p
);
346 buffer
[2] = buffer
[4];
347 buffer
[3] = buffer
[5];
350 FETCH_DATA (info
, p
);
354 /* We can the operands twice. The first time we don't print anything,
355 but look for errors. */
358 info
->print_address_func
= dummy_print_address
;
359 info
->fprintf_func
= (fprintf_ftype
)dummy_printer
;
362 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ p
- buffer
, info
);
365 else if (eaten
== -1)
369 (*info
->fprintf_func
)(info
->stream
,
370 "<internal error in opcode table: %s %s>\n",
378 info
->fprintf_func
= save_printer
;
379 info
->print_address_func
= save_print_address
;
383 (*info
->fprintf_func
) (info
->stream
, "%s", best
->name
);
386 (*info
->fprintf_func
) (info
->stream
, " ");
390 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ p
- buffer
, info
);
392 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
393 (*info
->fprintf_func
) (info
->stream
, ",");
398 /* Handle undefined instructions. */
399 info
->fprintf_func
= save_printer
;
400 info
->print_address_func
= save_print_address
;
401 (*info
->fprintf_func
) (info
->stream
, "0%o",
402 (buffer
[0] << 8) + buffer
[1]);
406 /* Returns number of bytes "eaten" by the operand, or
407 return -1 if an invalid operand was found, or -2 if
408 an opcode tabe error was found. */
411 print_insn_arg (d
, buffer
, p0
, addr
, info
)
413 unsigned char *buffer
;
415 bfd_vma addr
; /* PC for this arg to be relative to */
416 disassemble_info
*info
;
418 register int val
= 0;
419 register int place
= d
[1];
420 register unsigned char *p
= p0
;
422 register CONST
char *regname
;
423 register unsigned char *p1
;
429 case 'c': /* cache identifier */
431 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
432 val
= fetch_arg (buffer
, place
, 2, info
);
433 (*info
->fprintf_func
) (info
->stream
, cacheFieldName
[val
]);
437 case 'a': /* address register indirect only. Cf. case '+'. */
439 (*info
->fprintf_func
)
442 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
446 case '_': /* 32-bit absolute address for move16. */
449 (*info
->print_address_func
) (val
, info
);
454 (*info
->fprintf_func
) (info
->stream
, "%%ccr");
458 (*info
->fprintf_func
) (info
->stream
, "%%sr");
462 (*info
->fprintf_func
) (info
->stream
, "%%usp");
467 static const struct { char *name
; int value
; } names
[]
468 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
469 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
470 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
471 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
472 {"%msp", 0x803}, {"%isp", 0x804},
474 /* Should we be calling this psr like we do in case 'Y'? */
477 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
479 val
= fetch_arg (buffer
, place
, 12, info
);
480 for (regno
= sizeof names
/ sizeof names
[0] - 1; regno
>= 0; regno
--)
481 if (names
[regno
].value
== val
)
483 (*info
->fprintf_func
) (info
->stream
, "%s", names
[regno
].name
);
487 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
492 val
= fetch_arg (buffer
, place
, 3, info
);
493 /* 0 means 8, except for the bkpt instruction... */
494 if (val
== 0 && d
[1] != 's')
496 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
500 val
= fetch_arg (buffer
, place
, 8, info
);
503 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
507 val
= fetch_arg (buffer
, place
, 4, info
);
508 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
512 (*info
->fprintf_func
) (info
->stream
, "%s",
513 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
517 (*info
->fprintf_func
)
519 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 010]);
523 (*info
->fprintf_func
)
525 reg_names
[fetch_arg (buffer
, place
, 4, info
)]);
529 regno
= fetch_arg (buffer
, place
, 4, info
);
531 (*info
->fprintf_func
) (info
->stream
, "%s@", reg_names
[regno
]);
533 (*info
->fprintf_func
) (info
->stream
, "@(%s)", reg_names
[regno
]);
537 (*info
->fprintf_func
)
538 (info
->stream
, "%%fp%d",
539 fetch_arg (buffer
, place
, 3, info
));
543 val
= fetch_arg (buffer
, place
, 6, info
);
545 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
& 7]);
547 (*info
->fprintf_func
) (info
->stream
, "%d", val
);
551 (*info
->fprintf_func
)
552 (info
->stream
, "%s@+",
553 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
557 (*info
->fprintf_func
)
558 (info
->stream
, "%s@-",
559 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8]);
564 (*info
->fprintf_func
)
565 (info
->stream
, "{%s}",
566 reg_names
[fetch_arg (buffer
, place
, 3, info
)]);
567 else if (place
== 'C')
569 val
= fetch_arg (buffer
, place
, 7, info
);
570 if ( val
> 63 ) /* This is a signed constant. */
572 (*info
->fprintf_func
) (info
->stream
, "{#%d}", val
);
580 p1
= buffer
+ (*d
== '#' ? 2 : 4);
582 val
= fetch_arg (buffer
, place
, 4, info
);
583 else if (place
== 'C')
584 val
= fetch_arg (buffer
, place
, 7, info
);
585 else if (place
== '8')
586 val
= fetch_arg (buffer
, place
, 3, info
);
587 else if (place
== '3')
588 val
= fetch_arg (buffer
, place
, 8, info
);
589 else if (place
== 'b')
591 else if (place
== 'w' || place
== 'W')
593 else if (place
== 'l')
597 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
603 else if (place
== 'B')
604 val
= COERCE_SIGNED_CHAR(buffer
[1]);
605 else if (place
== 'w' || place
== 'W')
607 else if (place
== 'l' || place
== 'L' || place
== 'C')
609 else if (place
== 'g')
611 val
= NEXTBYTE (buffer
);
617 else if (place
== 'c')
619 if (buffer
[1] & 0x40) /* If bit six is one, long offset */
627 (*info
->print_address_func
) (addr
+ val
, info
);
632 (*info
->fprintf_func
)
633 (info
->stream
, "%s@(%d)",
634 reg_names
[fetch_arg (buffer
, place
, 3, info
) + 8], val
);
638 (*info
->fprintf_func
) (info
->stream
, "%s",
639 fpcr_names
[fetch_arg (buffer
, place
, 3, info
)]);
643 /* Get coprocessor ID... */
644 val
= fetch_arg (buffer
, 'd', 3, info
);
646 if (val
!= 1) /* Unusual coprocessor ID? */
647 (*info
->fprintf_func
) (info
->stream
, "(cpid=%d) ", val
);
666 val
= fetch_arg (buffer
, 'x', 6, info
);
667 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
670 val
= fetch_arg (buffer
, 's', 6, info
);
672 /* Get register number assuming address register. */
673 regno
= (val
& 7) + 8;
674 regname
= reg_names
[regno
];
678 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[val
]);
682 (*info
->fprintf_func
) (info
->stream
, "%s", regname
);
686 (*info
->fprintf_func
) (info
->stream
, "%s@", regname
);
690 (*info
->fprintf_func
) (info
->stream
, "%s@+", regname
);
694 (*info
->fprintf_func
) (info
->stream
, "%s@-", regname
);
699 (*info
->fprintf_func
) (info
->stream
, "%s@(%d)", regname
, val
);
703 p
= print_indexed (regno
, p
, addr
, info
);
711 (*info
->print_address_func
) (val
, info
);
716 (*info
->print_address_func
) (val
, info
);
721 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
722 (*info
->print_address_func
) (addr
+ val
, info
);
723 (*info
->fprintf_func
) (info
->stream
, ")");
727 p
= print_indexed (-1, p
, addr
, info
);
731 flt_p
= 1; /* Assume it's a float... */
750 NEXTSINGLE(flval
, p
);
754 NEXTDOUBLE(flval
, p
);
758 NEXTEXTEND(flval
, p
);
762 flval
= NEXTPACKED(p
);
768 if ( flt_p
) /* Print a float? */
769 (*info
->fprintf_func
) (info
->stream
, "#%g", flval
);
771 (*info
->fprintf_func
) (info
->stream
, "#%d", val
);
787 /* Move the pointer ahead if this point is farther ahead
792 (*info
->fprintf_func
) (info
->stream
, "#0");
797 register int newval
= 0;
798 for (regno
= 0; regno
< 16; ++regno
)
799 if (val
& (0x8000 >> regno
))
800 newval
|= 1 << regno
;
805 for (regno
= 0; regno
< 16; ++regno
)
806 if (val
& (1 << regno
))
810 (*info
->fprintf_func
) (info
->stream
, "/");
812 (*info
->fprintf_func
) (info
->stream
, "%s", reg_names
[regno
]);
814 while (val
& (1 << (regno
+ 1)))
816 if (regno
> first_regno
)
817 (*info
->fprintf_func
) (info
->stream
, "-%s",
821 else if (place
== '3')
825 val
= fetch_arg (buffer
, place
, 8, info
);
828 (*info
->fprintf_func
) (info
->stream
, "#0");
833 register int newval
= 0;
834 for (regno
= 0; regno
< 8; ++regno
)
835 if (val
& (0x80 >> regno
))
836 newval
|= 1 << regno
;
841 for (regno
= 0; regno
< 8; ++regno
)
842 if (val
& (1 << regno
))
846 (*info
->fprintf_func
) (info
->stream
, "/");
848 (*info
->fprintf_func
) (info
->stream
, "%%fp%d", regno
);
850 while (val
& (1 << (regno
+ 1)))
852 if (regno
> first_regno
)
853 (*info
->fprintf_func
) (info
->stream
, "-%%fp%d", regno
);
856 else if (place
== '8')
858 /* fmoveml for FP status registers */
859 (*info
->fprintf_func
) (info
->stream
, "%s",
860 fpcr_names
[fetch_arg (buffer
, place
, 3,
877 int val
= fetch_arg (buffer
, place
, 5, info
);
881 case 2: name
= "%tt0"; break;
882 case 3: name
= "%tt1"; break;
883 case 0x10: name
= "%tc"; break;
884 case 0x11: name
= "%drp"; break;
885 case 0x12: name
= "%srp"; break;
886 case 0x13: name
= "%crp"; break;
887 case 0x14: name
= "%cal"; break;
888 case 0x15: name
= "%val"; break;
889 case 0x16: name
= "%scc"; break;
890 case 0x17: name
= "%ac"; break;
891 case 0x18: name
= "%psr"; break;
892 case 0x19: name
= "%pcsr"; break;
896 int break_reg
= ((buffer
[3] >> 2) & 7);
897 (*info
->fprintf_func
)
898 (info
->stream
, val
== 0x1c ? "%%bad%d" : "%%bac%d",
903 (*info
->fprintf_func
) (info
->stream
, "<mmu register %d>", val
);
906 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
912 int fc
= fetch_arg (buffer
, place
, 5, info
);
914 (*info
->fprintf_func
) (info
->stream
, "%%dfc");
916 (*info
->fprintf_func
) (info
->stream
, "%%sfc");
918 (*info
->fprintf_func
) (info
->stream
, "<function code %d>", fc
);
923 (*info
->fprintf_func
) (info
->stream
, "%%val");
928 int level
= fetch_arg (buffer
, place
, 3, info
);
929 (*info
->fprintf_func
) (info
->stream
, "%d", level
);
940 /* Fetch BITS bits from a position in the instruction specified by CODE.
941 CODE is a "place to put an argument", or 'x' for a destination
942 that is a general address (mode and register).
943 BUFFER contains the instruction. */
946 fetch_arg (buffer
, code
, bits
, info
)
947 unsigned char *buffer
;
950 disassemble_info
*info
;
952 register int val
= 0;
959 case 'd': /* Destination, for register or quick. */
960 val
= (buffer
[0] << 8) + buffer
[1];
964 case 'x': /* Destination, for general arg */
965 val
= (buffer
[0] << 8) + buffer
[1];
970 FETCH_DATA (info
, buffer
+ 3);
971 val
= (buffer
[3] >> 4);
975 FETCH_DATA (info
, buffer
+ 3);
980 FETCH_DATA (info
, buffer
+ 3);
981 val
= (buffer
[2] << 8) + buffer
[3];
986 FETCH_DATA (info
, buffer
+ 3);
987 val
= (buffer
[2] << 8) + buffer
[3];
993 FETCH_DATA (info
, buffer
+ 3);
994 val
= (buffer
[2] << 8) + buffer
[3];
998 FETCH_DATA (info
, buffer
+ 5);
999 val
= (buffer
[4] << 8) + buffer
[5];
1004 FETCH_DATA (info
, buffer
+ 5);
1005 val
= (buffer
[4] << 8) + buffer
[5];
1010 FETCH_DATA (info
, buffer
+ 5);
1011 val
= (buffer
[4] << 8) + buffer
[5];
1015 FETCH_DATA (info
, buffer
+ 3);
1016 val
= (buffer
[2] << 8) + buffer
[3];
1021 FETCH_DATA (info
, buffer
+ 3);
1022 val
= (buffer
[2] << 8) + buffer
[3];
1027 FETCH_DATA (info
, buffer
+ 3);
1028 val
= (buffer
[2] << 8) + buffer
[3];
1033 val
= (buffer
[1] >> 6);
1063 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
1064 P points to extension word, in buffer.
1065 ADDR is the nominal core address of that extension word. */
1067 static unsigned char *
1068 print_indexed (basereg
, p
, addr
, info
)
1072 disassemble_info
*info
;
1075 static char *const scales
[] = {"", ":2", ":4", ":8"};
1081 word
= NEXTWORD (p
);
1083 /* Generate the text for the index register.
1084 Where this will be output is not yet determined. */
1085 sprintf (buf
, "%s:%c%s",
1086 reg_names
[(word
>> 12) & 0xf],
1087 (word
& 0x800) ? 'l' : 'w',
1088 scales
[(word
>> 9) & 3]);
1090 /* Handle the 68000 style of indexing. */
1092 if ((word
& 0x100) == 0)
1095 if ((word
& 0x80) != 0)
1099 print_base (basereg
, word
, info
);
1100 (*info
->fprintf_func
) (info
->stream
, ",%s)", buf
);
1104 /* Handle the generalized kind. */
1105 /* First, compute the displacement to add to the base register. */
1117 switch ((word
>> 4) & 3)
1120 base_disp
= NEXTWORD (p
);
1123 base_disp
= NEXTLONG (p
);
1128 /* Handle single-level case (not indirect) */
1130 if ((word
& 7) == 0)
1132 print_base (basereg
, base_disp
, info
);
1134 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1135 (*info
->fprintf_func
) (info
->stream
, ")");
1139 /* Two level. Compute displacement to add after indirection. */
1145 outer_disp
= NEXTWORD (p
);
1148 outer_disp
= NEXTLONG (p
);
1151 print_base (basereg
, base_disp
, info
);
1152 if ((word
& 4) == 0 && buf
[0] != '\0')
1154 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1157 sprintf_vma (vmabuf
, outer_disp
);
1158 (*info
->fprintf_func
) (info
->stream
, ")@(%s", vmabuf
);
1160 (*info
->fprintf_func
) (info
->stream
, ",%s", buf
);
1161 (*info
->fprintf_func
) (info
->stream
, ")");
1166 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
1167 REGNO = -1 for pc, -2 for none (suppressed). */
1170 print_base (regno
, disp
, info
)
1173 disassemble_info
*info
;
1177 (*info
->fprintf_func
) (info
->stream
, "%%pc@(");
1178 (*info
->print_address_func
) (disp
, info
);
1185 (*info
->fprintf_func
) (info
->stream
, "@(");
1186 else if (regno
== -3)
1187 (*info
->fprintf_func
) (info
->stream
, "%%zpc@(");
1189 (*info
->fprintf_func
) (info
->stream
, "%s@(", reg_names
[regno
]);
1191 sprintf_vma (buf
, disp
);
1192 (*info
->fprintf_func
) (info
->stream
, "%s", buf
);