1 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
3 * arm-dis.c (coprocessor_opcodes): Document new %C format control code.
4 Add new entries for VSCCLRM instruction.
5 (print_insn_coprocessor): Handle new %C format control code.
7 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
9 * arm-dis.c (enum isa): New enum.
10 (struct sopcode32): New structure.
11 (coprocessor_opcodes): change type of entries to struct sopcode32 and
12 set isa field of all current entries to ANY.
13 (print_insn_coprocessor): Change type of insn to struct sopcode32.
14 Only match an entry if its isa field allows the current mode.
16 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
18 * arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
20 (print_insn_thumb32): Add logic to print %n CLRM register list.
22 2019-04-15 Sudakshina Das <sudi.das@arm.com>
24 * arm-dis.c (print_insn_thumb32): Updated to accept new %P
27 2019-04-15 Sudakshina Das <sudi.das@arm.com>
29 * arm-dis.c (thumb32_opcodes): New instruction bfcsel.
30 (print_insn_thumb32): Edit the switch case for %Z.
32 2019-04-15 Sudakshina Das <sudi.das@arm.com>
34 * arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
36 2019-04-15 Sudakshina Das <sudi.das@arm.com>
38 * arm-dis.c (thumb32_opcodes): New instruction bfl.
40 2019-04-15 Sudakshina Das <sudi.das@arm.com>
42 * arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
44 2019-04-15 Sudakshina Das <sudi.das@arm.com>
46 * arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
47 Arm register with r13 and r15 unpredictable.
48 (thumb32_opcodes): New instructions for bfx and bflx.
50 2019-04-15 Sudakshina Das <sudi.das@arm.com>
52 * arm-dis.c (thumb32_opcodes): New instructions for bf.
54 2019-04-15 Sudakshina Das <sudi.das@arm.com>
56 * arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
58 2019-04-15 Sudakshina Das <sudi.das@arm.com>
60 * arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
62 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
64 * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
66 2019-04-12 John Darrington <john@darrington.wattle.id.au>
68 s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
69 "optr". ("operator" is a reserved word in c++).
71 2019-04-11 Sudakshina Das <sudi.das@arm.com>
73 * aarch64-opc.c (aarch64_print_operand): Add case for
75 (verify_constraints): Likewise.
76 * aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
77 (struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
78 to accept Rt|SP as first operand.
79 (AARCH64_OPERANDS): Add new Rt_SP.
80 * aarch64-asm-2.c: Regenerated.
81 * aarch64-dis-2.c: Regenerated.
82 * aarch64-opc-2.c: Regenerated.
84 2019-04-11 Sudakshina Das <sudi.das@arm.com>
86 * aarch64-asm-2.c: Regenerated.
87 * aarch64-dis-2.c: Likewise.
88 * aarch64-opc-2.c: Likewise.
89 * aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
91 2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
93 * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
95 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
97 * i386-opc.tbl: Consolidate AVX512 BF16 entries.
98 * i386-init.h: Regenerated.
100 2019-04-07 Alan Modra <amodra@gmail.com>
102 * ppc-dis.c (print_insn_powerpc): Use a tiny state machine
103 op_separator to control printing of spaces, comma and parens
104 rather than need_comma, need_paren and spaces vars.
106 2019-04-07 Alan Modra <amodra@gmail.com>
109 * arm-dis.c (print_insn_coprocessor): Correct bracket placement.
110 (print_insn_neon, print_insn_arm): Likewise.
112 2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
114 * i386-dis-evex.h (evex_table): Updated to support BF16
116 * i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
117 and EVEX_W_0F3872_P_3.
118 * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
119 (cpu_flags): Add bitfield for CpuAVX512_BF16.
120 * i386-opc.h (enum): Add CpuAVX512_BF16.
121 (i386_cpu_flags): Add bitfield for cpuavx512_bf16.
122 * i386-opc.tbl: Add AVX512 BF16 instructions.
123 * i386-init.h: Regenerated.
124 * i386-tbl.h: Likewise.
126 2019-04-05 Alan Modra <amodra@gmail.com>
128 * ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
129 (powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
130 to favour printing of "-" branch hint when using the "y" bit.
131 Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
133 2019-04-05 Alan Modra <amodra@gmail.com>
135 * ppc-dis.c (print_insn_powerpc): Delay printing spaces after
136 opcode until first operand is output.
138 2019-04-04 Peter Bergner <bergner@linux.ibm.com>
141 * ppc-opc.c (valid_bo_pre_v2): Add comments.
142 (valid_bo_post_v2): Add support for 'at' branch hints.
143 (insert_bo): Only error on branch on ctr.
144 (get_bo_hint_mask): New function.
145 (insert_boe): Add new 'branch_taken' formal argument. Add support
146 for inserting 'at' branch hints.
147 (extract_boe): Add new 'branch_taken' formal argument. Add support
148 for extracting 'at' branch hints.
149 (insert_bom, extract_bom, insert_bop, extract_bop): New functions.
150 (BOE): Delete operand.
151 (BOM, BOP): New operands.
153 (XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
154 (powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
155 bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
156 (powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
157 bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
158 <bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
159 bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
160 bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
161 bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
162 bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
163 bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
164 bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
165 bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
166 beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
167 bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
168 buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
169 bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
170 bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
171 bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
172 bttarl+>: New extended mnemonics.
174 2019-03-28 Alan Modra <amodra@gmail.com>
177 * ppc-opc.c (BTF): Define.
178 (powerpc_opcodes): Use for mtfsb*.
179 * ppc-dis.c (print_insn_powerpc): Print fields with both
180 PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
182 2019-03-25 Tamar Christina <tamar.christina@arm.com>
184 * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
185 (mapping_symbol_for_insn): Implement new algorithm.
186 (print_insn): Remove duplicate code.
188 2019-03-25 Tamar Christina <tamar.christina@arm.com>
190 * aarch64-dis.c (print_insn_aarch64):
193 2019-03-25 Tamar Christina <tamar.christina@arm.com>
195 * aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
198 2019-03-25 Tamar Christina <tamar.christina@arm.com>
200 * aarch64-dis.c (last_stop_offset): New.
201 (print_insn_aarch64): Use stop_offset.
203 2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
206 * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
208 * i386-init.h: Regenerated.
210 2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
213 * i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
214 vmovdqu16, vmovdqu32 and vmovdqu64.
215 * i386-tbl.h: Regenerated.
217 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
219 * s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
220 from vstrszb, vstrszh, and vstrszf.
222 2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
224 * s390-opc.txt: Add instruction descriptions.
226 2019-02-08 Jim Wilson <jimw@sifive.com>
228 * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
231 2019-02-07 Tamar Christina <tamar.christina@arm.com>
233 * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
235 2019-02-07 Tamar Christina <tamar.christina@arm.com>
238 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
239 * aarch64-opc.c (verify_elem_sd): New.
240 (fields): Add FLD_sz entr.
241 * aarch64-tbl.h (_SIMD_INSN): New.
242 (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
243 fmulx scalar and vector by element isns.
245 2019-02-07 Nick Clifton <nickc@redhat.com>
247 * po/sv.po: Updated Swedish translation.
249 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
251 * s390-mkopc.c (main): Accept arch13 as cpu string.
252 * s390-opc.c: Add new instruction formats and instruction opcode
254 * s390-opc.txt: Add new arch13 instructions.
256 2019-01-25 Sudakshina Das <sudi.das@arm.com>
258 * aarch64-tbl.h (QL_LDST_AT): Update macro.
259 (aarch64_opcode): Change encoding for stg, stzg
261 * aarch64-asm-2.c: Regenerated.
262 * aarch64-dis-2.c: Regenerated.
263 * aarch64-opc-2.c: Regenerated.
265 2019-01-25 Sudakshina Das <sudi.das@arm.com>
267 * aarch64-asm-2.c: Regenerated.
268 * aarch64-dis-2.c: Likewise.
269 * aarch64-opc-2.c: Likewise.
270 * aarch64-tbl.h (aarch64_opcode): Add new stzgm.
272 2019-01-25 Sudakshina Das <sudi.das@arm.com>
273 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
275 * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
276 * aarch64-asm.h (ins_addr_simple_2): Likeiwse.
277 * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
278 * aarch64-dis.h (ext_addr_simple_2): Likewise.
279 * aarch64-opc.c (operand_general_constraint_met_p): Remove
280 case for ldstgv_indexed.
281 (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
282 * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
283 (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
284 * aarch64-asm-2.c: Regenerated.
285 * aarch64-dis-2.c: Regenerated.
286 * aarch64-opc-2.c: Regenerated.
288 2019-01-23 Nick Clifton <nickc@redhat.com>
290 * po/pt_BR.po: Updated Brazilian Portuguese translation.
292 2019-01-21 Nick Clifton <nickc@redhat.com>
294 * po/de.po: Updated German translation.
295 * po/uk.po: Updated Ukranian translation.
297 2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
298 * mips-dis.c (mips_arch_choices): Fix typo in
299 gs464, gs464e and gs264e descriptors.
301 2019-01-19 Nick Clifton <nickc@redhat.com>
303 * configure: Regenerate.
304 * po/opcodes.pot: Regenerate.
306 2018-06-24 Nick Clifton <nickc@redhat.com>
310 2019-01-09 John Darrington <john@darrington.wattle.id.au>
312 * s12z-dis.c (print_insn_s12z): Do not dereference an operand
314 -dis.c (opr_emit_disassembly): Do not omit an index if it is
317 2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
319 * configure: Regenerate.
321 2019-01-07 Alan Modra <amodra@gmail.com>
323 * configure: Regenerate.
324 * po/POTFILES.in: Regenerate.
326 2019-01-03 John Darrington <john@darrington.wattle.id.au>
328 * s12z-opc.c: New file.
329 * s12z-opc.h: New file.
330 * s12z-dis.c: Removed all code not directly related to display
331 of instructions. Used the interface provided by the new files
333 * Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
334 * Makefile.in: Regenerate.
335 * configure.ac (bfd_s12z_arch): Correct the dependencies.
336 * configure: Regenerate.
338 2019-01-01 Alan Modra <amodra@gmail.com>
340 Update year range in copyright notice of all files.
342 For older changes see ChangeLog-2018
344 Copyright (C) 2019 Free Software Foundation, Inc.
346 Copying and distribution of this file, with or without modification,
347 are permitted in any medium without royalty provided the copyright
348 notice and this notice are preserved.
354 version-control: never