file as.info-5 was initially added on branch binutils-2_10-branch.
[binutils.git] / include / opcode / mn10300.h
blob12f03670f6d3894f9abd7450dbd12c7e4fbf1378
1 /* mn10300.h -- Header file for Matsushita 10300 opcode table
2 Copyright 1996, 1997 Free Software Foundation, Inc.
3 Written by Jeff Law, Cygnus Support
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 1, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 #ifndef MN10300_H
22 #define MN10300_H
24 /* The opcode table is an array of struct mn10300_opcode. */
26 #define MN10300_MAX_OPERANDS 8
27 struct mn10300_opcode
29 /* The opcode name. */
30 const char *name;
32 /* The opcode itself. Those bits which will be filled in with
33 operands are zeroes. */
34 unsigned long opcode;
36 /* The opcode mask. This is used by the disassembler. This is a
37 mask containing ones indicating those bits which must match the
38 opcode field, and zeroes indicating those bits which need not
39 match (and are presumably filled in by operands). */
40 unsigned long mask;
42 /* A bitmask. For each operand, nonzero if it must not have the same
43 register specification as all other operands with a nonzero bit in
44 this flag. ie 0x81 would indicate that operands 7 and 0 must not
45 match. Note that we count operands from left to right as they appear
46 in the operands specification below. */
47 unsigned int no_match_operands;
49 /* The format of this opcode. */
50 unsigned char format;
52 /* Bitmask indicating what cpu variants this opcode is available on.
53 We assume mn10300 base opcodes are available everywhere, so we only
54 have to note opcodes which are available on other variants. */
55 unsigned int machine;
57 /* An array of operand codes. Each code is an index into the
58 operand table. They appear in the order which the operands must
59 appear in assembly code, and are terminated by a zero. */
60 unsigned char operands[MN10300_MAX_OPERANDS];
63 /* The table itself is sorted by major opcode number, and is otherwise
64 in the order in which the disassembler should consider
65 instructions. */
66 extern const struct mn10300_opcode mn10300_opcodes[];
67 extern const int mn10300_num_opcodes;
70 /* The operands table is an array of struct mn10300_operand. */
72 struct mn10300_operand
74 /* The number of bits in the operand. */
75 int bits;
77 /* How far the operand is left shifted in the instruction. */
78 int shift;
80 /* One bit syntax flags. */
81 int flags;
84 /* Elements in the table are retrieved by indexing with values from
85 the operands field of the mn10300_opcodes table. */
87 extern const struct mn10300_operand mn10300_operands[];
89 /* Values defined for the flags field of a struct mn10300_operand. */
90 #define MN10300_OPERAND_DREG 0x1
92 #define MN10300_OPERAND_AREG 0x2
94 #define MN10300_OPERAND_SP 0x4
96 #define MN10300_OPERAND_PSW 0x8
98 #define MN10300_OPERAND_MDR 0x10
100 #define MN10300_OPERAND_SIGNED 0x20
102 #define MN10300_OPERAND_PROMOTE 0x40
104 #define MN10300_OPERAND_PAREN 0x80
106 #define MN10300_OPERAND_REPEATED 0x100
108 #define MN10300_OPERAND_EXTENDED 0x200
110 #define MN10300_OPERAND_SPLIT 0x400
112 #define MN10300_OPERAND_REG_LIST 0x800
114 #define MN10300_OPERAND_PCREL 0x1000
116 #define MN10300_OPERAND_MEMADDR 0x2000
118 #define MN10300_OPERAND_RELAX 0x4000
120 #define MN10300_OPERAND_USP 0x8000
122 #define MN10300_OPERAND_SSP 0x10000
124 #define MN10300_OPERAND_MSP 0x20000
126 #define MN10300_OPERAND_PC 0x40000
128 #define MN10300_OPERAND_EPSW 0x80000
130 #define MN10300_OPERAND_RREG 0x100000
132 #define MN10300_OPERAND_XRREG 0x200000
134 #define MN10300_OPERAND_PLUS 0x400000
136 #define MN10300_OPERAND_24BIT 0x800000
138 /* Opcode Formats. */
139 #define FMT_S0 1
140 #define FMT_S1 2
141 #define FMT_S2 3
142 #define FMT_S4 4
143 #define FMT_S6 5
144 #define FMT_D0 6
145 #define FMT_D1 7
146 #define FMT_D2 8
147 #define FMT_D4 9
148 #define FMT_D5 10
149 #define FMT_D6 11
150 #define FMT_D7 12
151 #define FMT_D8 13
152 #define FMT_D9 14
153 #define FMT_D10 15
155 /* Variants of the mn10300 which have additional opcodes. */
156 #define MN103 300
157 #define AM30 300
159 #define AM33 330
161 #endif /* MN10300_H */