cpu/logical32.cc

   1 /////////////////////////////////////////////////////////////////////////
   2 // $Id: logical32.cc,v 1.27 2007/04/17 21:38:51 sshwarts Exp $
   3 /////////////////////////////////////////////////////////////////////////
   4 //
   5 //  Copyright (C) 2001  MandrakeSoft S.A.
   6 //
   7 //    MandrakeSoft S.A.
   8 //    43, rue d'Aboukir
   9 //    75002 Paris - France
  10 //    http://www.linux-mandrake.com/
  11 //    http://www.mandrakesoft.com/
  12 //
  13 //  This library is free software; you can redistribute it and/or
  14 //  modify it under the terms of the GNU Lesser General Public
  15 //  License as published by the Free Software Foundation; either
  16 //  version 2 of the License, or (at your option) any later version.
  17 //
  18 //  This library is distributed in the hope that it will be useful,
  19 //  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 //  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21 //  Lesser General Public License for more details.
  22 //
  23 //  You should have received a copy of the GNU Lesser General Public
  24 //  License along with this library; if not, write to the Free Software
  25 //  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26
  27
  28 #define NEED_CPU_REG_SHORTCUTS 1
  29 #include "bochs.h"
  30 #include "cpu.h"
  31 #define LOG_THIS BX_CPU_THIS_PTR
  32
  33 #if BX_SUPPORT_X86_64==0
  34 // Make life easier for merging cpu64 and cpu32 code.
  35 #define RAX EAX
  36 #endif
  37
  38 void BX_CPU_C::XOR_EdGd(bxInstruction_c *i)
  39 {
  40   Bit32u op2_32, op1_32, result_32;
  41
  42   op2_32 = BX_READ_32BIT_REG(i->nnn());
  43
  44   if (i->modC0()) {
  45     op1_32 = BX_READ_32BIT_REG(i->rm());
  46     result_32 = op1_32 ^ op2_32;
  47     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
  48   }
  49   else {
  50     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
  51     result_32 = op1_32 ^ op2_32;
  52     write_RMW_virtual_dword(result_32);
  53   }
  54
  55   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
  56 }
  57
  58 void BX_CPU_C::XOR_GdEd(bxInstruction_c *i)
  59 {
  60   Bit32u op1_32, op2_32, result_32;
  61   unsigned nnn = i->nnn();
  62
  63   op1_32 = BX_READ_32BIT_REG(nnn);
  64
  65   if (i->modC0()) {
  66     op2_32 = BX_READ_32BIT_REG(i->rm());
  67   }
  68   else {
  69     read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
  70   }
  71
  72   result_32 = op1_32 ^ op2_32;
  73
  74   BX_WRITE_32BIT_REGZ(nnn, result_32);
  75
  76   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
  77 }
  78
  79 void BX_CPU_C::XOR_EAXId(bxInstruction_c *i)
  80 {
  81   Bit32u op1_32, op2_32, result_32;
  82
  83   op1_32 = EAX;
  84   op2_32 = i->Id();
  85
  86   result_32 = op1_32 ^ op2_32;
  87   RAX = result_32;
  88
  89   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
  90 }
  91
  92 void BX_CPU_C::XOR_EdId(bxInstruction_c *i)
  93 {
  94   Bit32u op2_32, op1_32, result_32;
  95
  96   op2_32 = i->Id();
  97
  98   if (i->modC0()) {
  99     op1_32 = BX_READ_32BIT_REG(i->rm());
 100     result_32 = op1_32 ^ op2_32;
 101     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 102   }
 103   else {
 104     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 105     result_32 = op1_32 ^ op2_32;
 106     write_RMW_virtual_dword(result_32);
 107   }
 108
 109   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 110 }
 111
 112 void BX_CPU_C::OR_EdId(bxInstruction_c *i)
 113 {
 114   Bit32u op2_32, op1_32, result_32;
 115
 116   op2_32 = i->Id();
 117
 118   if (i->modC0()) {
 119     op1_32 = BX_READ_32BIT_REG(i->rm());
 120     result_32 = op1_32 | op2_32;
 121     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 122   }
 123   else {
 124     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 125     result_32 = op1_32 | op2_32;
 126     write_RMW_virtual_dword(result_32);
 127   }
 128
 129   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 130 }
 131
 132 void BX_CPU_C::NOT_Ed(bxInstruction_c *i)
 133 {
 134   Bit32u op1_32, result_32;
 135
 136   if (i->modC0()) {
 137     op1_32 = BX_READ_32BIT_REG(i->rm());
 138     result_32 = ~op1_32;
 139     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 140   }
 141   else {
 142     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 143     result_32 = ~op1_32;
 144     write_RMW_virtual_dword(result_32);
 145   }
 146 }
 147
 148 void BX_CPU_C::OR_EdGd(bxInstruction_c *i)
 149 {
 150   Bit32u op2_32, op1_32, result_32;
 151
 152   op2_32 = BX_READ_32BIT_REG(i->nnn());
 153
 154   if (i->modC0()) {
 155     op1_32 = BX_READ_32BIT_REG(i->rm());
 156     result_32 = op1_32 | op2_32;
 157     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 158   }
 159   else {
 160     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 161     result_32 = op1_32 | op2_32;
 162     write_RMW_virtual_dword(result_32);
 163   }
 164
 165   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 166 }
 167
 168 void BX_CPU_C::OR_GdEd(bxInstruction_c *i)
 169 {
 170   Bit32u op1_32, op2_32, result_32;
 171
 172   op1_32 = BX_READ_32BIT_REG(i->nnn());
 173
 174   if (i->modC0()) {
 175     op2_32 = BX_READ_32BIT_REG(i->rm());
 176   }
 177   else {
 178     read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
 179   }
 180
 181 #if defined(BX_HostAsm_Or32)
 182   Bit32u flags32;
 183   asmOr32(result_32, op1_32, op2_32, flags32);
 184   setEFlagsOSZAPC(flags32);
 185 #else
 186   result_32 = op1_32 | op2_32;
 187   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 188 #endif
 189
 190   BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
 191 }
 192
 193 void BX_CPU_C::OR_EAXId(bxInstruction_c *i)
 194 {
 195   Bit32u op1_32, op2_32, result_32;
 196
 197   op1_32 = EAX;
 198   op2_32 = i->Id();
 199   result_32 = op1_32 | op2_32;
 200
 201   RAX = result_32;
 202
 203   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 204 }
 205
 206 void BX_CPU_C::AND_EdGd(bxInstruction_c *i)
 207 {
 208   Bit32u op2_32, op1_32, result_32;
 209
 210   op2_32 = BX_READ_32BIT_REG(i->nnn());
 211
 212   if (i->modC0()) {
 213     op1_32 = BX_READ_32BIT_REG(i->rm());
 214
 215 #if defined(BX_HostAsm_And32)
 216     Bit32u flags32;
 217     asmAnd32(result_32, op1_32, op2_32, flags32);
 218     setEFlagsOSZAPC(flags32);
 219 #else
 220     result_32 = op1_32 & op2_32;
 221 #endif
 222
 223     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 224   }
 225   else {
 226     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 227
 228 #if defined(BX_HostAsm_And32)
 229     Bit32u flags32;
 230     asmAnd32(result_32, op1_32, op2_32, flags32);
 231     setEFlagsOSZAPC(flags32);
 232 #else
 233     result_32 = op1_32 & op2_32;
 234 #endif
 235
 236     write_RMW_virtual_dword(result_32);
 237   }
 238
 239 #if !defined(BX_HostAsm_And32)
 240   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 241 #endif
 242 }
 243
 244 void BX_CPU_C::AND_GdEd(bxInstruction_c *i)
 245 {
 246   Bit32u op1_32, op2_32, result_32;
 247
 248   op1_32 = BX_READ_32BIT_REG(i->nnn());
 249
 250   if (i->modC0()) {
 251     op2_32 = BX_READ_32BIT_REG(i->rm());
 252   }
 253   else {
 254     read_virtual_dword(i->seg(), RMAddr(i), &op2_32);
 255   }
 256
 257 #if defined(BX_HostAsm_And32)
 258   Bit32u flags32;
 259   asmAnd32(result_32, op1_32, op2_32, flags32);
 260   setEFlagsOSZAPC(flags32);
 261 #else
 262   result_32 = op1_32 & op2_32;
 263   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 264 #endif
 265
 266   BX_WRITE_32BIT_REGZ(i->nnn(), result_32);
 267 }
 268
 269 void BX_CPU_C::AND_EAXId(bxInstruction_c *i)
 270 {
 271   Bit32u op1_32, op2_32, result_32;
 272
 273   op1_32 = EAX;
 274   op2_32 = i->Id();
 275
 276 #if defined(BX_HostAsm_And32)
 277   Bit32u flags32;
 278   asmAnd32(result_32, op1_32, op2_32, flags32);
 279   setEFlagsOSZAPC(flags32);
 280 #else
 281   result_32 = op1_32 & op2_32;
 282   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 283 #endif
 284
 285   RAX = result_32;
 286 }
 287
 288 void BX_CPU_C::AND_EdId(bxInstruction_c *i)
 289 {
 290   Bit32u op2_32, op1_32, result_32;
 291
 292   op2_32 = i->Id();
 293
 294   if (i->modC0()) {
 295     op1_32 = BX_READ_32BIT_REG(i->rm());
 296
 297 #if defined(BX_HostAsm_And32)
 298     Bit32u flags32;
 299     asmAnd32(result_32, op1_32, op2_32, flags32);
 300     setEFlagsOSZAPC(flags32);
 301 #else
 302     result_32 = op1_32 & op2_32;
 303 #endif
 304
 305     BX_WRITE_32BIT_REGZ(i->rm(), result_32);
 306   }
 307   else {
 308     read_RMW_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 309
 310 #if defined(BX_HostAsm_And32)
 311     Bit32u flags32;
 312     asmAnd32(result_32, op1_32, op2_32, flags32);
 313     setEFlagsOSZAPC(flags32);
 314 #else
 315     result_32 = op1_32 & op2_32;
 316 #endif
 317
 318     write_RMW_virtual_dword(result_32);
 319   }
 320
 321 #if !defined(BX_HostAsm_And32)
 322   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 323 #endif
 324 }
 325
 326 void BX_CPU_C::TEST_EdGd(bxInstruction_c *i)
 327 {
 328   Bit32u op2_32, op1_32;
 329
 330   op2_32 = BX_READ_32BIT_REG(i->nnn());
 331
 332   if (i->modC0()) {
 333     op1_32 = BX_READ_32BIT_REG(i->rm());
 334   }
 335   else {
 336     read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 337   }
 338
 339 #if defined(BX_HostAsm_Test32)
 340   Bit32u flags32;
 341   asmTest32(op1_32, op2_32, flags32);
 342   setEFlagsOSZAPC(flags32);
 343 #else
 344   Bit32u result_32 = op1_32 & op2_32;
 345   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 346 #endif
 347 }
 348
 349 void BX_CPU_C::TEST_EAXId(bxInstruction_c *i)
 350 {
 351   Bit32u op2_32, op1_32;
 352
 353   op1_32 = EAX;
 354   op2_32 = i->Id();
 355
 356 #if defined(BX_HostAsm_Test32)
 357   Bit32u flags32;
 358   asmTest32(op1_32, op2_32, flags32);
 359   setEFlagsOSZAPC(flags32);
 360 #else
 361   Bit32u result_32 = op1_32 & op2_32;
 362   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 363 #endif
 364 }
 365
 366 void BX_CPU_C::TEST_EdId(bxInstruction_c *i)
 367 {
 368   Bit32u op2_32, op1_32;
 369
 370   op2_32 = i->Id();
 371
 372   if (i->modC0()) {
 373     op1_32 = BX_READ_32BIT_REG(i->rm());
 374   }
 375   else {
 376     read_virtual_dword(i->seg(), RMAddr(i), &op1_32);
 377   }
 378
 379 #if defined(BX_HostAsm_Test32)
 380   Bit32u flags32;
 381   asmTest32(op1_32, op2_32, flags32);
 382   setEFlagsOSZAPC(flags32);
 383 #else
 384   Bit32u result_32 = op1_32 & op2_32;
 385   SET_FLAGS_OSZAPC_RESULT_32(result_32, BX_INSTR_LOGIC32);
 386 #endif
 387 }