soc/intel/ptl: Update ME specification version to 21

[coreboot.git] / src / mainboard / google / fatcat / variants / felino / overridetree.cb

chip soc/intel/pantherlake

        register "pmc_gpe0_dw0" = "GPP_A"
        register "pmc_gpe0_dw1" = "GPP_D"
        register "pmc_gpe0_dw2" = "GPP_F"

end