src/mainboard/google/fatcat/variants/francka/fw_config.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <baseboard/variants.h>
   4 #include <bootstate.h>
   5 #include <console/console.h>
   6 #include <fw_config.h>
   7 #include <gpio.h>
   8 #include <inttypes.h>
   9
  10 /* t: base table; o: override table */
  11 #define GPIO_PADBASED_OVERRIDE(t, o) gpio_padbased_override(t, o, ARRAY_SIZE(o))
  12 /* t: table */
  13 #define GPIO_CONFIGURE_PADS(t) gpio_configure_pads(t, ARRAY_SIZE(t))
  14
  15 static const struct pad_config hda_enable_pads[] = {
  16         /* HDA_BIT_CLK */
  17         PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1),
  18         /* HDA_SYNC */
  19         PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
  20         /* HDA_SDOUT */
  21         PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
  22         /* HDA_SDIN0 */
  23         PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
  24         /* SOC_DMIC_CLK1 */
  25         PAD_CFG_NF(GPP_S06, NONE, DEEP, NF5),
  26         /* SOC_DMIC_DATA1 */
  27         PAD_CFG_NF(GPP_S07, NONE, DEEP, NF5),
  28
  29         /* GPP_D09:     PCH_DGPU_HOLD_RST#_R */
  30         PAD_NC(GPP_D09, NONE),
  31         /* GPP_D16:     HDA_RST# */
  32         PAD_NC(GPP_D16, NONE),
  33         /* GPP_S00:     SNDW_3_SCL */
  34         PAD_NC(GPP_S00, NONE),
  35         /* GPP_S01:     SNDW_3_SDA */
  36         PAD_NC(GPP_S01, NONE),
  37         /* GPP_S02:     SOC_DMIC_CLK0 */
  38         PAD_NC(GPP_S02, NONE),
  39         /* GPP_S03:     SOC_DMIC_DATA0 */
  40         PAD_NC(GPP_S03, NONE),
  41         /* GPP_S04:     SNDW2_CLK */
  42         PAD_NC(GPP_S04, NONE),
  43         /* GPP_S05:     SNDW2_DATA0 */
  44         PAD_NC(GPP_S05, NONE),
  45 };
  46
  47 /*
  48  * WWAN: power sequence requires three stages:
  49  * step 1: 3.3V power, FCP# (Full Card Power), RST#, and PERST# off
  50  * step 2: deassert FCP#
  51  * step 3: deassert RST# first, and then PERST#.
  52  * NOTE: Since PERST# is gated by platform reset, PERST# deassertion will happen
  53  * at much later time and time between RST# and PERSET# is guaranteed.
  54  */
  55 static const struct pad_config pre_mem_wwan_pwr_seq1_pads[] = {
  56         /* GPP_A09:     SOC_WWAN_OFF#_SW */
  57         PAD_CFG_GPO(GPP_A09, 0, PLTRST),
  58         /* GPP_B20:     SOC_WWAN_RST# */
  59         PAD_CFG_GPO(GPP_B20, 0, PLTRST),
  60         /* GPP_D03:     SOC_WWAN_PCIE_RST# */
  61         PAD_CFG_GPO(GPP_D03, 0, PLTRST),
  62 };
  63
  64 static const struct pad_config pre_mem_wwan_pwr_seq2_pads[] = {
  65         /* GPP_A09:     SOC_WWAN_OFF#_SW */
  66         PAD_CFG_GPO(GPP_A09, 1, PLTRST),
  67 };
  68
  69 static const struct pad_config wwan_pwr_seq3_pads[] = {
  70         /* GPP_D03:     SOC_WWAN_PCIE_RST# */
  71         PAD_CFG_GPO(GPP_D03, 1, PLTRST),
  72         /* GPP_B20:     SOC_WWAN_RST# */
  73         PAD_CFG_GPO(GPP_B20, 1, PLTRST),
  74         /* GPP_E02:     SOC_WWAN_WAKE2#_R */
  75         PAD_CFG_GPI_SCI_LOW(GPP_E02, NONE, DEEP, LEVEL),
  76 };
  77
  78 static const struct pad_config wwan_disable_pads[] = {
  79         /* GPP_A09:     SOC_WWAN_OFF#_SW */
  80         PAD_NC(GPP_A09, NONE),
  81         /* GPP_D03:     SOC_WWAN_PCIE_RST#  */
  82         PAD_NC(GPP_D03, NONE),
  83         /* GPP_B20:     SOC_WWAN_RST# */
  84         PAD_NC(GPP_B20, NONE),
  85         /* GPP_A10:     SOC_WWAN_RA_DIS#_SW  */
  86         PAD_NC(GPP_A10, NONE),
  87         /* GPP_E02:     SOC_WWAN_WAKE2#_R */
  88         PAD_NC(GPP_E02, NONE),
  89 };
  90
  91 static const struct pad_config bridge_disable_pads[] = {
  92         /* GPP_D18:     CLKREQ_PCIE#6 */
  93         PAD_NC(GPP_D18, NONE),
  94 };
  95
  96 void fw_config_configure_pre_mem_gpio(void)
  97 {
  98         if (!fw_config_is_provisioned()) {
  99                 printk(BIOS_WARNING, "FW_CONFIG is not provisioned, Exiting\n");
 100                 return;
 101         }
 102
 103         if (!fw_config_probe(FW_CONFIG(WWAN, WWAN_ABSENT)))
 104                 GPIO_CONFIGURE_PADS(pre_mem_wwan_pwr_seq1_pads);
 105
 106         /*
 107          * NOTE: We place WWAN sequence 2 here. According to the WWAN FIBOCOM
 108          * FM350-GL datasheet, the minimum time requirement (Tpr: time between 3.3V
 109          * and FCP#) is '0'. Therefore, it will be fine even though there is no
 110          * GPIO configured for other PADs via fw_config to have the time delay
 111          * introduced in between sequence 1 and 2. Also, FCP# was not the last PAD
 112          * configured in sequence 1. Although the Tpr is '0' in the datasheet, three
 113          * stages are preserved at this time to guarantee the sequence shown in the
 114          * datasheet timing diagram.
 115          */
 116         if (!fw_config_probe(FW_CONFIG(WWAN, WWAN_ABSENT)))
 117                 GPIO_CONFIGURE_PADS(pre_mem_wwan_pwr_seq2_pads);
 118 }
 119
 120 void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
 121 {
 122         if (!fw_config_is_provisioned()) {
 123                 printk(BIOS_WARNING, "FW_CONFIG is not provisioned, Exiting\n");
 124                 return;
 125         }
 126
 127         if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC256M_CG_HDA)))
 128                 GPIO_PADBASED_OVERRIDE(padbased_table, hda_enable_pads);
 129
 130         if (fw_config_probe(FW_CONFIG(WWAN, WWAN_PRESENT))) {
 131                 GPIO_PADBASED_OVERRIDE(padbased_table, wwan_pwr_seq3_pads);
 132         } else {
 133                 GPIO_PADBASED_OVERRIDE(padbased_table, wwan_disable_pads);
 134         }
 135
 136         if (fw_config_probe(FW_CONFIG(BRIDGE, BRIDGE_HAYDEN))) {
 137                 GPIO_PADBASED_OVERRIDE(padbased_table, bridge_disable_pads);
 138         }
 139
 140 }