src/southbridge/intel/i82801ix/azalia.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <device/device.h>
   5 #include <device/pci.h>
   6 #include <device/pci_ids.h>
   7 #include <device/pci_ops.h>
   8 #include <device/mmio.h>
   9 #include <device/azalia_device.h>
  10 #include "chip.h"
  11 #include "i82801ix.h"
  12
  13 static int codec_detect(u8 *base)
  14 {
  15         u32 reg32;
  16
  17         if (azalia_enter_reset(base) < 0)
  18                 goto no_codec;
  19
  20         if (azalia_exit_reset(base) < 0)
  21                 goto no_codec;
  22
  23         /* Read in Codec location (BAR + 0xe)[2..0] */
  24         reg32 = read32(base + HDA_STATESTS_REG);
  25         reg32 &= 0x0f;
  26         if (!reg32)
  27                 goto no_codec;
  28
  29         return reg32;
  30
  31 no_codec:
  32         /* Codec not found, put HDA back in reset */
  33         azalia_enter_reset(base);
  34         printk(BIOS_DEBUG, "Azalia: No codec!\n");
  35         return 0;
  36 }
  37
  38 static void azalia_init(struct device *dev)
  39 {
  40         u8 *base;
  41         struct resource *res;
  42         u32 codec_mask;
  43
  44         // ESD
  45         pci_update_config32(dev, 0x134, ~0x00ff0000, 2 << 16);
  46
  47         // Link1 description
  48         pci_update_config32(dev, 0x140, ~0x00ff0000, 2 << 16);
  49
  50         // Port VC0 Resource Control Register
  51         pci_update_config32(dev, 0x114, ~0x000000ff, 1);
  52
  53         // VCi traffic class
  54         pci_or_config8(dev, 0x44, 7 << 0); // TC7
  55
  56         // VCi Resource Control
  57         pci_or_config32(dev, 0x120, (1 << 31) | (1 << 24) | (0x80 << 0)); /* VCi ID and map */
  58
  59         /* Set Bus Master */
  60         pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
  61
  62         // Docking not supported
  63         pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
  64
  65         /* Lock some R/WO bits by writing their current value. */
  66         pci_update_config32(dev, 0x74, ~0, 0);
  67
  68         res = probe_resource(dev, PCI_BASE_ADDRESS_0);
  69         if (!res)
  70                 return;
  71
  72         // NOTE this will break as soon as the Azalia gets a bar above 4G.
  73         // Is there anything we can do about it?
  74         base = res2mmio(res, 0, 0);
  75         printk(BIOS_DEBUG, "Azalia: base = %p\n", base);
  76         codec_mask = codec_detect(base);
  77
  78         if (codec_mask) {
  79                 printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask);
  80                 azalia_codecs_init(base, codec_mask);
  81         }
  82 }
  83
  84 static struct device_operations azalia_ops = {
  85         .read_resources         = pci_dev_read_resources,
  86         .set_resources          = pci_dev_set_resources,
  87         .enable_resources       = pci_dev_enable_resources,
  88         .init                   = azalia_init,
  89         .ops_pci                = &pci_dev_ops_pci,
  90 };
  91
  92 /* ICH9DH/ICH9DO/ICH9R/ICH9/ICH9M-E/ICH9M */
  93 static const struct pci_driver i82801ix_azalia __pci_driver = {
  94         .ops    = &azalia_ops,
  95         .vendor = PCI_VID_INTEL,
  96         .device = PCI_DID_INTEL_82801IB_HD_AUDIO,
  97 };