src/drivers/uart/oxpcie_early.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <stdint.h>
   4 #include <stddef.h>
   5 #include <device/pci_ops.h>
   6 #include <console/uart.h>
   7 #include <device/pci.h>
   8
   9 static unsigned int oxpcie_present;
  10 static DEVTREE_CONST u32 uart0_base = CONFIG_EARLY_PCI_MMIO_BASE + 0x1000;
  11
  12 int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
  13 {
  14         pci_devfn_t device = PCI_DEV(bus, dev, 0);
  15
  16         u32 id = pci_s_read_config32(device, PCI_VENDOR_ID);
  17         switch (id) {
  18         case 0xc1181415: /* e.g. Startech PEX1S1PMINI function 0 */
  19                 /* On this device function 0 is the parallel port, and
  20                  * function 3 is the serial port. So let's go look for
  21                  * the UART.
  22                  */
  23                 device = PCI_DEV(bus, dev, 3);
  24                 id = pci_s_read_config32(device, PCI_VENDOR_ID);
  25                 if (id != 0xc11b1415)
  26                         return -1;
  27                 break;
  28         case 0xc11b1415: /* e.g. Startech PEX1S1PMINI function 3 */
  29         case 0xc1581415: /* e.g. Startech MPEX2S952 */
  30                 break;
  31         default:
  32                 /* No UART here. */
  33                 return -1;
  34         }
  35
  36         /* Sanity-check, we assume fixed location. */
  37         if (mmio_base != CONFIG_EARLY_PCI_MMIO_BASE)
  38                 return -1;
  39
  40         /* Setup base address on device */
  41         pci_s_write_config32(device, PCI_BASE_ADDRESS_0, mmio_base);
  42
  43         /* Enable memory on device */
  44         u16 reg16 = pci_s_read_config16(device, PCI_COMMAND);
  45         reg16 |= PCI_COMMAND_MEMORY;
  46         pci_s_write_config16(device, PCI_COMMAND, reg16);
  47
  48         oxpcie_present = 1;
  49         return 0;
  50 }
  51
  52 static int oxpcie_uart_active(void)
  53 {
  54         return oxpcie_present;
  55 }
  56
  57 uintptr_t uart_platform_base(unsigned int idx)
  58 {
  59         if ((idx < 8) && oxpcie_uart_active())
  60                 return uart0_base + idx * 0x200;
  61         return 0;
  62 }
  63
  64 void oxford_remap(u32 new_base)
  65 {
  66 #if ENV_RAMSTAGE
  67         uart0_base = new_base + 0x1000;
  68 #endif
  69 }
  70
  71 unsigned int uart_platform_refclk(void)
  72 {
  73         return 62500000;
  74 }