soc/amd/mendocino: Mark PCIe GPP bridges as hidden instead of off
[coreboot.git] / spd / 
tree4a5d5ba1236d17d6322df50b63167ff76e696a61
drwxr-xr-x   ..
drwxr-xr-x - ddr4
drwxr-xr-x - lp4x
drwxr-xr-x - lp5