mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / asrock / h81m-hds / cmos.layout
blobc9ba76c78fe82eefda06efee9fe9214b80f5bc6e
1 ## SPDX-License-Identifier: GPL-2.0-only
3 # -----------------------------------------------------------------
4 entries
6 # -----------------------------------------------------------------
7 0       120     r       0       reserved_memory
9 # -----------------------------------------------------------------
10 # RTC_BOOT_BYTE (coreboot hardcoded)
11 384     1       e       3       boot_option
12 388     4       h       0       reboot_counter
14 # -----------------------------------------------------------------
15 # coreboot config options: console
16 395     4       e       4       debug_level
18 #400    8       r       0       reserved for century byte
20 # coreboot config options: southbridge
21 408     1       e       1       nmi
22 409     2       e       5       power_on_after_fail
24 # coreboot config options: check sums
25 984     16      h       0       check_sum
27 # -----------------------------------------------------------------
29 enumerations
31 #ID     value   text
32 1       0       Disable
33 1       1       Enable
35 2       0       Enable
36 2       1       Disable
38 3       0       Fallback
39 3       1       Normal
41 4       0       Emergency
42 4       1       Alert
43 4       2       Critical
44 4       3       Error
45 4       4       Warning
46 4       5       Notice
47 4       6       Info
48 4       7       Debug
49 4       8       Spew
51 5       0       Disable
52 5       1       Enable
53 5       2       Keep
55 # -----------------------------------------------------------------
56 checksums
58 checksum 392 415 984