mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / facebook / monolith / cmos.layout
blob705eaba627dd68336686ee44ec94a9af63c406e8
1 ## SPDX-License-Identifier: GPL-2.0-only
3 # -----------------------------------------------------------------
4 entries
6 #start-bit length  config config-ID     name
8 # -----------------------------------------------------------------
9 0       120     r       0       reserved_memory
11 # -----------------------------------------------------------------
12 # RTC_BOOT_BYTE (coreboot hardcoded)
13 384     1       e       4       boot_option
14 # reboot_counter reserved for core, not used by platform.
15 388     4       h       0       reboot_counter
17 # -----------------------------------------------------------------
18 # coreboot config options: console
19 395     4       e       6       debug_level
21 # coreboot config options: cpu
23 # coreboot config options: southbridge
24 408     1       e       1       nmi
25 409     2       e       7       power_on_after_fail
27 # coreboot config options: bootloader
29 # coreboot config options: check sums
30 984     16      h       0       check_sum
32 # -----------------------------------------------------------------
34 enumerations
36 #ID     value   text
37 1       0       Disable
38 1       1       Enable
39 2       0       Enable
40 2       1       Disable
41 4       0       Fallback
42 4       1       Normal
43 6       0       Emergency
44 6       1       Alert
45 6       2       Critical
46 6       3       Error
47 6       4       Warning
48 6       5       Notice
49 6       6       Info
50 6       7       Debug
51 6       8       Spew
52 7       0       Disable
53 7       1       Enable
54 7       2       Keep
55 # -----------------------------------------------------------------
56 checksums
58 checksum 392 415 984