mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / lenovo / x1_carbon_gen1 / devicetree.cb
blob4abc9c0cd16f5b69e7b3c92083351133fe29a1af
1 chip northbridge/intel/sandybridge
2 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
3 register "gpu_cpu_backlight" = "0x00001155"
4 register "gpu_dp_b_hotplug" = "4"
5 register "gpu_dp_c_hotplug" = "4"
6 register "gpu_dp_d_hotplug" = "4"
7 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
8 register "gpu_panel_power_backlight_off_delay" = "2000"
9 register "gpu_panel_power_backlight_on_delay" = "3000"
10 register "gpu_panel_power_cycle_delay" = "6"
11 register "gpu_panel_power_down_delay" = "300"
12 register "gpu_panel_power_up_delay" = "300"
13 register "gpu_pch_backlight" = "0x11551155"
15 device domain 0 on
16 subsystemid 0x17aa 0x21f9 inherit
18 device ref host_bridge on end # host bridge
19 device ref peg10 off end # PCIe Bridge for discrete graphics
20 device ref igd on end # vga controller
22 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
23 # GPI routing
24 # 0 No effect (default)
25 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
26 # 2 SCI (if corresponding GPIO_EN bit is also set)
27 register "alt_gp_smi_en" = "0x0000"
28 register "gpi1_routing" = "2"
29 register "gpi13_routing" = "2"
31 # Enable SATA ports 0 (HDD bay) 2 (msata)
32 register "sata_port_map" = "0x5"
33 # Set max SATA speed to 6.0 Gb/s
34 register "sata_interface_speed_support" = "0x3"
36 register "gen1_dec" = "0x7c1601"
37 register "gen2_dec" = "0x0c15e1"
38 register "gen3_dec" = "0x000000"
39 register "gen4_dec" = "0x0c06a1"
41 register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
43 register "xhci_switchable_ports" = "0xf"
44 register "superspeed_capable_ports" = "0xf"
45 register "xhci_overcurrent_mapping" = "0x4000201"
46 register "usb_port_config" = "{
47 {0, 3, 0 }, /* P00 disconnected */
48 {1, 1, 1 }, /* P01 left or right */
49 {0, 1, 3 }, /* P02 disconnected */
50 {1, 3, -1}, /* P03 WWAN */
51 {0, 1, 2 }, /* P04 disconnected */
52 {0, 1, -1}, /* P05 disconnected */
53 {0, 1, -1}, /* P06 disconnected */
54 {0, 2, -1}, /* P07 disconnected */
55 {0, 1, -1}, /* P08 disconnected */
56 {1, 2, 5 }, /* P09 left or right */
57 {1, 3, -1}, /* P10 FPR */
58 {1, 3, -1}, /* P11 Bluetooth */
59 {1, 1, -1}, /* P12 WLAN */
60 {1, 1, -1} /* P13 Camera */
63 # Enable zero-based linear PCIe root port functions
64 register "pcie_port_coalesce" = "true"
66 register "spi_uvscc" = "0x2005"
67 register "spi_lvscc" = "0x2005"
69 device ref xhci on end # USB 3.0 Controller
70 device ref mei1 on end # Management Engine Interface 1
71 device ref mei2 off end # Management Engine Interface 2
72 device ref me_ide_r off end # Management Engine IDE-R
73 device ref me_kt off end # Management Engine KT
74 device ref gbe off end # Intel Gigabit Ethernet
75 device ref ehci2 on end # USB2 EHCI #2
76 device ref hda on end # High Definition Audio
77 device ref pcie_rp1 on
78 chip drivers/ricoh/rce822
79 register "sdwppol" = "0"
80 register "disable_mask" = "0x87"
81 device pci 00.0 on end
82 end
83 end # PCIe Port #1
84 device ref pcie_rp2 on end # PCIe Port #2
85 device ref pcie_rp3 off end # PCIe Port #3
86 device ref pcie_rp4 off end # PCIe Port #4
87 device ref pcie_rp5 off end # PCIe Port #5
88 device ref pcie_rp6 off end # PCIe Port #6
89 device ref pcie_rp7 off end # PCIe Port #7
90 device ref pcie_rp8 off end # PCIe Port #8
91 device ref ehci1 on end # USB2 EHCI #1
92 device ref pci_bridge off end # PCI bridge
93 device ref lpc on #LPC bridge
94 chip ec/lenovo/pmh7
95 device pnp ff.1 on end # dummy
96 register "backlight_enable" = "true"
97 register "dock_event_enable" = "true"
98 end
100 chip drivers/pc80/tpm
101 device pnp 0c31.0 on end
104 chip ec/lenovo/h8
105 device pnp ff.2 on # dummy
106 io 0x60 = 0x62
107 io 0x62 = 0x66
108 io 0x64 = 0x1600
109 io 0x66 = 0x1604
112 register "has_keyboard_backlight" = "1"
114 register "beepmask0" = "0x00"
115 register "beepmask1" = "0x86"
116 register "config0" = "0xa6"
117 register "config1" = "0x05"
118 register "config2" = "0xa0"
119 register "config3" = "0xc0"
120 register "event2_enable" = "0xff"
121 register "event3_enable" = "0xff"
122 register "event4_enable" = "0xc0"
123 register "event5_enable" = "0x3c"
124 register "event7_enable" = "0x01"
125 register "event8_enable" = "0x7b"
126 register "event9_enable" = "0xff"
127 register "eventc_enable" = "0xff"
128 register "eventd_enable" = "0xff"
129 register "evente_enable" = "0x0d"
131 register "has_bdc_detection" = "1"
132 register "bdc_gpio_num" = "54"
133 register "bdc_gpio_lvl" = "0"
135 register "has_wwan_detection" = "1"
136 register "wwan_gpio_num" = "70"
137 register "wwan_gpio_lvl" = "0"
139 end # LPC bridge
140 device ref sata1 on end # SATA Controller 1
141 device ref smbus on
142 # eeprom, 8 virtual devices, same chip
143 chip drivers/i2c/at24rf08c
144 device i2c 54 on end
145 device i2c 55 on end
146 device i2c 56 on end
147 device i2c 57 on end
148 device i2c 5c on end
149 device i2c 5d on end
150 device i2c 5e on end
151 device i2c 5f on end
153 end # SMBus
154 device ref sata2 off end # SATA Controller 2
155 device ref thermal on end # Thermal