1 chip northbridge
/intel
/sandybridge
3 register
"gfx" = "GMA_STATIC_DISPLAYS(1)"
5 # Enable DisplayPort Hotplug with
6ms pulse
6 register
"gpu_dp_d_hotplug" = "0x06"
8 # Enable Panel
as LVDS
and configure power delays
9 register
"gpu_panel_port_select" = "PANEL_PORT_LVDS"
10 register
"gpu_panel_power_cycle_delay" = "6" # T7
: 500ms
11 register
"gpu_panel_power_up_delay" = "100" # T1
+T2
: 10ms
12 register
"gpu_panel_power_down_delay" = "100" # T5
+T6
: 10ms
13 register
"gpu_panel_power_backlight_on_delay" = "2100" # T3
: 210ms
14 register
"gpu_panel_power_backlight_off_delay" = "2100" # T4
: 210ms
15 register
"gpu_cpu_backlight" = "0x1155"
16 register
"gpu_pch_backlight" = "0x11551155"
18 register
"spd_addresses" = "{0x50, 0, 0x51, 0}"
20 subsystemid
0x17aa 0x21fa inherit
22 device ref host_bridge on
end
23 device ref peg10 off
end
26 chip southbridge
/intel
/bd82x6x # Intel Series
6 Cougar Point PCH
28 #
0 No effect
(default
)
29 #
1 SMI#
(if corresponding ALT_GPI_SMI_EN bit is also
set)
30 #
2 SCI
(if corresponding GPIO_EN bit is also
set)
31 register
"alt_gp_smi_en" = "0x0000"
32 register
"gpi1_routing" = "2"
33 register
"gpi13_routing" = "2"
35 # Enable SATA ports
0 (HDD bay
) & 1 (dock
) & 2 (msata
)
36 register
"sata_port_map" = "0x7"
37 #
Set max SATA speed
to 6.0 Gb
/s
38 register
"sata_interface_speed_support" = "0x3"
40 register
"gen1_dec" = "0x7c1601"
41 register
"gen2_dec" = "0x0c15e1"
42 register
"gen4_dec" = "0x0c06a1"
44 # Do
not enable xHCI Port
4 since WWAN USB is EHCI
-only
45 register
"xhci_switchable_ports" = "0x7"
46 register
"superspeed_capable_ports" = "0x7"
47 register
"xhci_overcurrent_mapping" = "0x4000201"
49 # Enable zero
-based linear PCIe root port functions
50 register
"pcie_port_coalesce" = "true"
52 register
"spi_uvscc" = "0x2005"
53 register
"spi_lvscc" = "0x2005"
55 device ref xhci on
end
56 device ref mei1 on
end
57 device ref mei2 off
end
58 device ref me_ide_r off
end
59 device ref me_kt off
end
61 subsystemid
0x17aa 0x21f3
63 device ref ehci2 on
end
65 device ref pcie_rp1 on
66 chip drivers
/ricoh
/rce822
67 register
"sdwppol" = "1"
68 register
"disable_mask" = "0x87"
69 device pci
00.0 on
end
72 device ref pcie_rp2 on
end
73 device ref pcie_rp3 off
end
74 device ref pcie_rp4 off
end
75 device ref pcie_rp5 off
end
76 device ref pcie_rp6 off
end
77 device ref pcie_rp7 off
end
78 device ref pcie_rp8 off
end
79 device ref ehci1 on
end
80 device ref pci_bridge off
end
83 device pnp ff
.1 on
end # dummy
84 register
"backlight_enable" = "true"
85 register
"dock_event_enable" = "true"
89 device pnp
0c31.0 on
end
93 device pnp ff
.2 on # dummy
100 register
"config0" = "0xa6"
101 register
"config1" = "0x09"
102 register
"config2" = "0xa0"
103 register
"config3" = "0xe0"
105 register
"has_keyboard_backlight" = "1"
107 register
"beepmask0" = "0x00"
108 register
"beepmask1" = "0x86"
109 register
"has_power_management_beeps" = "0"
110 register
"event2_enable" = "0xff"
111 register
"event3_enable" = "0xff"
112 register
"event4_enable" = "0xd0"
113 register
"event5_enable" = "0xfc"
114 register
"event6_enable" = "0x00"
115 register
"event7_enable" = "0x01"
116 register
"event8_enable" = "0x7b"
117 register
"event9_enable" = "0xff"
118 register
"eventb_enable" = "0x00"
119 register
"eventc_enable" = "0xff"
120 register
"eventd_enable" = "0xff"
121 register
"evente_enable" = "0x0d"
123 # BDC detection is broken on this board
:
124 # BDC shorts pin14
and pin1
125 # BDC
's connector pin14 is left floating
126 # BDC
's connector pin1 is routed to SB GPIO 54
127 register
"has_bdc_detection" = "0"
129 register
"has_wwan_detection" = "1"
130 register
"wwan_gpio_num" = "70"
131 register
"wwan_gpio_lvl" = "0"
134 device ref sata1 on
end
136 # eeprom
, 8 virtual devices
, same chip
137 chip drivers
/i2c
/at24rf08c
148 device ref sata2 off
end
149 device ref thermal on
end