src/mainboard/protectli/vault_adl_p/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <bootblock_common.h>
   4 #include <device/pnp_ops.h>
   5 #include <superio/ite/common/ite.h>
   6 #include <superio/ite/common/ite_gpio.h>
   7 #include <superio/ite/it8659e/it8659e.h>
   8
   9 #if CONFIG_UART_FOR_CONSOLE == 0
  10 #define UART_DEV PNP_DEV(0x2e, IT8659E_SP1)
  11 #elif CONFIG_UART_FOR_CONSOLE == 1
  12 #define UART_DEV PNP_DEV(0x2e, IT8659E_SP2)
  13 #else
  14 #error "Wrong UART_FOR_CONSOLE setting"
  15 #endif
  16
  17 #define GPIO_DEV PNP_DEV(0x2e, IT8659E_GPIO)
  18
  19 static void ite_set_gpio_iobase(u16 iobase)
  20 {
  21         pnp_enter_conf_state(GPIO_DEV);
  22         pnp_set_logical_device(GPIO_DEV);
  23         pnp_set_iobase(GPIO_DEV, PNP_IDX_IO1, iobase);
  24         pnp_exit_conf_state(GPIO_DEV);
  25 }
  26
  27 void bootblock_mainboard_early_init(void)
  28 {
  29         /* Internal VCC_OK */
  30         ite_reg_write(GPIO_DEV, 0x23, 0x40);
  31         /* Set pin native functions */
  32         ite_reg_write(GPIO_DEV, 0x26, 0xc0);
  33         /* Pin28 as GP41 - PC speaker */
  34         ite_reg_write(GPIO_DEV, 0x28, 0x02);
  35         /* Set GPIOs exposed on pin header as GPIO functions */
  36         ite_reg_write(GPIO_DEV, 0x29, 0xc0);
  37         /* Sets a reserved bit6 to reflect original FW configuration */
  38         ite_reg_write(GPIO_DEV, 0x2c, 0xc9);
  39         ite_kill_watchdog(GPIO_DEV);
  40         /* GP41 - PC Speaker configuration */
  41         ite_gpio_setup(GPIO_DEV, 41, ITE_GPIO_OUTPUT, ITE_GPIO_SIMPLE_IO_MODE,
  42                        ITE_GPIO_CONTROL_DEFAULT);
  43         ite_set_gpio_iobase(0xa00);
  44         ite_enable_serial(UART_DEV, CONFIG_TTYS0_BASE);
  45 }