src/mainboard/protectli/vault_cml/devicetree.cb

   1 chip soc/intel/cannonlake
   2         # Enable Enhanced Intel SpeedStep
   3         register "eist_enable" = "true"
   4
   5         register "cpu_pl2_4_cfg" = "baseline"
   6
   7         register "gen1_dec" = "0x00fc0201"
   8         register "gen2_dec" = "0x007c0a01"
   9         register "gen3_dec" = "0x000c03e1"
  10         register "gen4_dec" = "0x001c02e1"
  11
  12         # GPIO
  13         register "PchUnlockGpioPads" = "1"
  14         register "gpe0_dw0" = "0x2"
  15         register "gpe0_dw1" = "0x3"
  16         register "gpe0_dw2" = "0xd"
  17
  18         # FSP configuration
  19         register "SaGv" = "SaGv_Enabled"
  20         register "ScsEmmcHs400Enabled" = "1"
  21
  22         # Enable eDP device
  23         register "DdiPortEdp" = "1" # Display Port
  24
  25         # Enable HPD for DDI ports B/C
  26         register "DdiPortBHpd" = "1" # HDMI
  27         register "DdiPortCHpd" = "1" # USB Type-C
  28
  29         # Enable DDC for DDI port B
  30         register "DdiPortBDdc" = "1" # HDMI
  31
  32         register "PchHdaAudioLinkHda" = "1"
  33
  34         # Misc
  35         register "AcousticNoiseMitigation" = "1"
  36
  37         # Power
  38         register "PchPmSlpS3MinAssert"  = "3"   # 50ms
  39         register "PchPmSlpS4MinAssert"  = "1"   # 1s
  40         register "PchPmSlpSusMinAssert" = "2"   # 500ms
  41         register "PchPmSlpAMinAssert"   = "4"   # 2s
  42
  43         register "tcc_offset" = "20" # TCC of 80C
  44
  45         # Enable SERIRQ continuous
  46         register "serirq_mode" = "SERIRQ_CONTINUOUS"
  47
  48         register "SkipExtGfxScan" = "1"
  49
  50         register "enable_c6dram" = "1"
  51
  52         register "SataPortsEnable[0]" = "1"
  53         register "SataPortsEnable[2]" = "1"
  54
  55         register "PcieRpEnable[4]" = "1" # LAN1
  56         register "PcieRpEnable[5]" = "1" # LAN2
  57         register "PcieRpEnable[6]" = "1" # LAN3
  58         register "PcieRpEnable[7]" = "1" # LAN4
  59         register "PcieRpEnable[8]" = "1" # LAN5
  60         register "PcieRpEnable[9]" = "1" # LAN6
  61         register "PcieRpEnable[11]" = "1" # M.2 WiFi
  62         register "PcieRpEnable[12]" = "1" # M.2 NVMe x4
  63
  64         # Enable Advanced Error Reporting for RP 5-10, 12, 13
  65         register "PcieRpAdvancedErrorReporting[4]" = "1"
  66         register "PcieRpAdvancedErrorReporting[5]" = "1"
  67         register "PcieRpAdvancedErrorReporting[6]" = "1"
  68         register "PcieRpAdvancedErrorReporting[7]" = "1"
  69         register "PcieRpAdvancedErrorReporting[8]" = "1"
  70         register "PcieRpAdvancedErrorReporting[9]" = "1"
  71         register "PcieRpAdvancedErrorReporting[11]" = "1"
  72         register "PcieRpAdvancedErrorReporting[12]" = "1"
  73
  74         # Enable Latency Tolerance Reporting Mechanism RP 5-10, 12, 13
  75         register "PcieRpLtrEnable[4]" = "1"
  76         register "PcieRpLtrEnable[5]" = "1"
  77         register "PcieRpLtrEnable[6]" = "1"
  78         register "PcieRpLtrEnable[7]" = "1"
  79         register "PcieRpLtrEnable[8]" = "1"
  80         register "PcieRpLtrEnable[9]" = "1"
  81         register "PcieRpLtrEnable[11]" = "1"
  82         register "PcieRpLtrEnable[12]" = "1"
  83
  84         register "PcieClkSrcUsage[0]" = "PCIE_CLK_FREE"
  85         register "PcieClkSrcUsage[1]" = "PCIE_CLK_FREE"
  86         register "PcieClkSrcUsage[2]" = "PCIE_CLK_FREE"
  87         register "PcieClkSrcUsage[3]" = "PCIE_CLK_FREE"
  88         register "PcieClkSrcUsage[4]" = "PCIE_CLK_FREE"
  89         register "PcieClkSrcUsage[5]" = "PCIE_CLK_FREE"
  90
  91         # USB related
  92         register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) |
  93                                               USB_PORT_WAKE_ENABLE(2) |
  94                                               USB_PORT_WAKE_ENABLE(3) |
  95                                               USB_PORT_WAKE_ENABLE(4) |
  96                                               USB_PORT_WAKE_ENABLE(5) |
  97                                               USB_PORT_WAKE_ENABLE(6) |
  98                                               USB_PORT_WAKE_ENABLE(7) |
  99                                               USB_PORT_WAKE_ENABLE(8) |
 100                                               USB_PORT_WAKE_ENABLE(9)"
 101
 102         register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) |
 103                                               USB_PORT_WAKE_ENABLE(2) |
 104                                               USB_PORT_WAKE_ENABLE(3) |
 105                                               USB_PORT_WAKE_ENABLE(4)"
 106
 107         register "PchUsb2PhySusPgDisable" = "1"
 108
 109         register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"
 110         register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
 111         register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)"
 112         register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
 113         register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)"
 114         register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"             # M2 WiFi
 115         register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
 116         register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)"
 117         register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)"             # 4G/LTE
 118         register "usb2_ports[9]" = "USB2_PORT_EMPTY"
 119
 120         register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
 121         register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
 122         register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
 123         register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)"
 124         register "usb3_ports[4]" = "USB3_PORT_EMPTY"
 125         register "usb3_ports[5]" = "USB3_PORT_EMPTY"
 126
 127         register "SerialIoDevMode" = "{
 128                 [PchSerialIoIndexI2C0] = PchSerialIoDisabled,
 129                 [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
 130                 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
 131                 [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
 132                 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
 133                 [PchSerialIoIndexI2C5] = PchSerialIoDisabled,
 134                 [PchSerialIoIndexSPI0] = PchSerialIoDisabled,
 135                 [PchSerialIoIndexSPI1] = PchSerialIoDisabled,
 136                 [PchSerialIoIndexSPI2] = PchSerialIoDisabled,
 137                 [PchSerialIoIndexUART0] = PchSerialIoDisabled,
 138                 [PchSerialIoIndexUART1] = PchSerialIoDisabled,
 139                 [PchSerialIoIndexUART2] = PchSerialIoDisabled,
 140         }"
 141
 142         device domain 0 on
 143                 device ref igpu on  end
 144                 device ref dptf on  end
 145                 device ref thermal on  end
 146                 device ref xhci on  end
 147                 device ref sata on  end
 148                 device ref emmc on  end
 149                 device ref pcie_rp5 on  end # LAN1
 150                 device ref pcie_rp6 on  end # LAN2
 151                 device ref pcie_rp7 on  end # LAN3
 152                 device ref pcie_rp8 on  end # LAN4
 153                 device ref pcie_rp9 on  end # LAN5
 154                 device ref pcie_rp10 on  end # LAN6
 155                 device ref pcie_rp12 on  end
 156                         smbios_slot_desc        "SlotTypeM2Socket1_SD" "SlotLengthOther"
 157                                                 "M.2/E 2230 (M2_WIFI2)" "SlotDataBusWidth1X"
 158                 device ref pcie_rp13 on      # NVMe
 159                         smbios_slot_desc        "SlotTypeM2Socket3" "SlotLengthOther"
 160                                                 "M.2/M 2280 (J1)" "SlotDataBusWidth4X"
 161                 end
 162                 device ref lpc_espi on
 163                         chip superio/ite/it8784e
 164                                 register "TMPIN1.mode"    = "THERMAL_RESISTOR"
 165                                 register "TMPIN2.mode"    = "THERMAL_MODE_DISABLED"
 166                                 register "TMPIN3.mode"    = "THERMAL_PECI"
 167                                 register "TMPIN3.offset"  = "0x63"
 168                                 register "ec.vin_mask"    = "VIN_ALL"
 169                                 register "ec.smbus_24mhz" = "1"
 170                                 register "ec.smbus_en"    = "1"
 171                                 # FAN1 is CPU fan (connector on board)
 172                                 register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
 173                                 register "FAN1.smart.tmpin"     = " 3"
 174                                 register "FAN1.smart.tmp_off"   = "40"
 175                                 register "FAN1.smart.tmp_start" = "60"
 176                                 register "FAN1.smart.tmp_full"  = "85"
 177                                 register "FAN1.smart.tmp_delta" = " 2"
 178                                 register "FAN1.smart.pwm_start" = "20"
 179                                 register "FAN1.smart.slope"     = "24"
 180                                 register "FAN2.mode"      = "FAN_MODE_OFF"
 181                                 register "FAN3.mode"      = "FAN_MODE_OFF"
 182                                 device pnp 2e.1 on      # COM 1
 183                                         io 0x60 = 0x3f8
 184                                         irq 0x70 = 4
 185                                 end
 186                                 device pnp 2e.2 on end # COM 2
 187                                 device pnp 2e.3 off end # Printer Port
 188                                 device pnp 2e.4 on      # Environment Controller
 189                                         io 0x60 = 0xa40
 190                                         io 0x62 = 0xa30
 191                                         irq 0x70 = 9
 192                                         irq 0xf0 = 0x80 # clear 3VSB status
 193                                 end
 194                                 device pnp 2e.5 off end # Keyboard
 195                                 device pnp 2e.6 off end # Mouse
 196                                 device pnp 2e.7 off end # GPIO
 197                                 device pnp 2e.a off end # CIR
 198                         end
 199                         chip drivers/pc80/tpm
 200                                 device pnp 0c31.0 on end
 201                         end
 202                 end
 203                 device ref hda on  end
 204                 device ref smbus on  end
 205         end
 206 end