mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / supermicro / x11-lga1151-series / cmos.layout
blob07f8233d3382710d6c9d241fd0b4d834f1bb3b0f
1 ## SPDX-License-Identifier: GPL-2.0-only
3 # -----------------------------------------------------------------
4 entries
6 #start-bit length  config config-ID    name
7 0       120     r       0       reserved_memory
9 # -----------------------------------------------------------------
10 # RTC_BOOT_BYTE (coreboot hardcoded)
11 384     1       e       4       boot_option
12 388     4       h       0       reboot_counter
14 # -----------------------------------------------------------------
15 # coreboot config options: console
16 395     4       e       6       debug_level
18 # -----------------------------------------------------------------
19 # coreboot config options: cpu
20 400     1       e       1       hyper_threading
22 # -----------------------------------------------------------------
23 # coreboot config options: southbridge
24 409     2       e       7       power_on_after_fail
26 # -----------------------------------------------------------------
27 # coreboot config options: bootloader
28 448     128     r       0       vbnv
30 # -----------------------------------------------------------------
31 # coreboot config options: check sums
32 984     16      h       0       check_sum
34 # -----------------------------------------------------------------
36 enumerations
38 #ID     value   text
39 1       0       Disable
40 1       1       Enable
41 4       0       Fallback
42 4       1       Normal
43 6       0       Emergency
44 6       1       Alert
45 6       2       Critical
46 6       3       Error
47 6       4       Warning
48 6       5       Notice
49 6       6       Info
50 6       7       Debug
51 6       8       Spew
52 7       0       Disable
53 7       1       Enable
54 7       2       Keep
55 # -----------------------------------------------------------------
56 checksums
58 checksum 392 415 984