mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / system76 / rpl / variants / addw4 / overridetree.cb
blobc29aea9ecb78fe3664979516f8aa8a75cef15cd7
1 # SPDX-License-Identifier: GPL-2.0-only
3 chip soc/intel/alderlake
4 # Support 5600 MT/s memory
5 register "max_dram_speed_mts" = "5600"
7 device domain 0 on
8 subsystemid 0x1558 0x0353 inherit
10 device ref xhci on
11 register "usb2_ports" = "{
12 /* Port reset messaging cannot be used,
13 * so do not use USB2_PORT_TYPE_C for these */
14 [0] = USB2_PORT_MID(OC_SKIP), /* J_TYPEC1 */
15 [1] = USB2_PORT_MID(OC_SKIP), /* J_TYPEC2 */
16 [2] = USB2_PORT_MID(OC_SKIP), /* J_USB2 */
17 [3] = USB2_PORT_MID(OC_SKIP), /* J_USB1 (Audio board) */
18 [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
19 [7] = USB2_PORT_MID(OC_SKIP), /* Camera */
20 [13] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
23 register "usb3_ports" = "{
24 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C */
25 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C */
26 [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB2 */
27 [3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB1 (Audio board) */
29 end
31 device ref i2c0 on
32 # Touchpad I2C bus
33 register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
34 chip drivers/i2c/hid
35 register "generic.hid" = ""ELAN0412""
36 register "generic.desc" = ""ELAN Touchpad""
37 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
38 register "generic.detect" = "1"
39 register "hid_desc_reg_offset" = "0x01"
40 device i2c 15 on end
41 end
42 chip drivers/i2c/hid
43 register "generic.hid" = ""FTCS1000""
44 register "generic.desc" = ""FocalTech Touchpad""
45 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
46 register "generic.detect" = "1"
47 register "hid_desc_reg_offset" = "0x01"
48 device i2c 38 on end
49 end
50 end
52 device ref pcie5_0 on
53 # DGPU
54 register "cpu_pcie_rp[CPU_RP(2)]" = "{
55 .clk_src = 14,
56 .clk_req = 14,
57 .flags = PCIE_RP_LTR | PCIE_RP_AER,
59 end
61 device ref pcie_rp3 on
62 # GLAN
63 register "pch_pcie_rp[PCH_RP(3)]" = "{
64 .clk_src = 13,
65 .clk_req = 13,
66 .flags = PCIE_RP_LTR | PCIE_RP_AER,
68 device pci 00.0 on end # Realtek RTL8111H
69 end
70 device ref pcie_rp8 on
71 # WLAN
72 register "pch_pcie_rp[PCH_RP(8)]" = "{
73 .clk_src = 11,
74 .clk_req = 11,
75 .flags = PCIE_RP_LTR | PCIE_RP_AER,
77 end
78 device ref pcie_rp13 on
79 # J_SSD1
80 register "pch_pcie_rp[PCH_RP(13)]" = "{
81 .clk_src = 10,
82 .clk_req = 10,
83 .flags = PCIE_RP_LTR | PCIE_RP_AER,
85 end
86 device ref pcie_rp21 on
87 # J_SSD2
88 register "pch_pcie_rp[PCH_RP(21)]" = "{
89 .clk_src = 5,
90 .clk_req = 5,
91 .flags = PCIE_RP_LTR | PCIE_RP_AER,
93 end
94 device ref pcie_rp25 on
95 # J_SSD3
96 register "pch_pcie_rp[PCH_RP(25)]" = "{
97 .clk_src = 15,
98 .clk_req = 15,
99 .flags = PCIE_RP_LTR | PCIE_RP_AER,