src/mainboard/system76/rpl/variants/bonw15/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <mainboard/gpio.h>
   4 #include <soc/gpio.h>
   5
   6 static const struct pad_config gpio_table[] = {
   7         /* ------- GPIO Group GPD ------- */
   8         PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // PM_BATLOW#
   9         PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
  10         _PAD_CFG_STRUCT(GPD2, 0x42880100, 0x0000), // PCH_LAN_WAKE#
  11         PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), // PWR_BTN#
  12         PAD_CFG_NF(GPD4, NONE, PWROK, NF1), // SUSB#_PCH
  13         PAD_CFG_NF(GPD5, NONE, PWROK, NF1), // SUSC#_PCH
  14         PAD_CFG_NF(GPD6, NONE, PWROK, NF1), // SLP_A#_N
  15         PAD_CFG_GPI(GPD7, NONE, PWROK), // GPD_7
  16         PAD_CFG_NF(GPD8, NONE, PWROK, NF1), // CNVI_SUSCLK
  17         PAD_CFG_GPO(GPD9, 0, PWROK), // SLP_WLAN_N
  18         PAD_CFG_NF(GPD10, NONE, PWROK, NF1), // SLP_S5#
  19         PAD_CFG_GPO(GPD11, 0, DEEP), // LANPHYPC
  20         PAD_CFG_GPO(GPD12, 0, DEEP), // TP_GPD_12
  21
  22         /* ------- GPIO Group GPP_A ------- */
  23         PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1), // ESPI_IO0_EC
  24         PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1), // ESPI_IO1_EC
  25         PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1), // ESPI_IO2_EC
  26         PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1), // ESPI_IO3_EC
  27         PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1), // ESPI_CS_EC#
  28         PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1), // ESPI_CLK_EC
  29         PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), // ESPI_RESET_N
  30         PAD_CFG_GPO(GPP_A7, 0, DEEP),
  31         PAD_CFG_GPO(GPP_A8, 0, DEEP),
  32         PAD_CFG_GPO(GPP_A9, 0, DEEP),
  33         PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), // ESPI_ALERT0#
  34         PAD_CFG_GPI(GPP_A11, UP_20K, DEEP), // GPIO4_GC6_NVDD_EN_R
  35         PAD_CFG_GPO(GPP_A12, 0, DEEP),
  36         PAD_CFG_GPO(GPP_A13, 0, DEEP),
  37         PAD_CFG_GPO(GPP_A14, 0, DEEP),
  38
  39         /* ------- GPIO Group GPP_B ------- */
  40         _PAD_CFG_STRUCT(GPP_B0, 0x82900100, 0x0000), // TPM_PIRQ#
  41         PAD_CFG_GPO(GPP_B1, 0, DEEP),
  42         PAD_CFG_GPI(GPP_B2, NONE, DEEP), // CNVI_WAKE#
  43         PAD_CFG_GPO(GPP_B3, 1, DEEP), // PCH_BT_EN
  44         PAD_CFG_GPO(GPP_B4, 0, DEEP),
  45         PAD_CFG_GPO(GPP_B5, 0, DEEP),
  46         PAD_CFG_GPO(GPP_B6, 0, DEEP),
  47         PAD_CFG_GPO(GPP_B7, 0, DEEP),
  48         PAD_CFG_GPO(GPP_B8, 0, DEEP),
  49         PAD_CFG_GPO(GPP_B9, 0, DEEP),
  50         PAD_CFG_GPO(GPP_B10, 0, DEEP),
  51         PAD_CFG_GPO(GPP_B11, 0, DEEP),
  52         PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), // SLP_S0#
  53         PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
  54         PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), // HDA_SPKR
  55         PAD_CFG_GPO(GPP_B15, 0, DEEP), // PS8461_SW
  56         PAD_CFG_GPO(GPP_B16, 0, DEEP),
  57         PAD_CFG_GPO(GPP_B17, 1, RSMRST), // 2.5G_LAN_EN
  58         PAD_CFG_NF(GPP_B18, NONE, RSMRST, NF1), // PMCALERT#
  59         PAD_CFG_GPO(GPP_B19, 1, DEEP), // PCH_WLAN_EN
  60         PAD_CFG_GPO(GPP_B20, 0, DEEP),
  61         PAD_CFG_GPO(GPP_B21, 0, DEEP), // GPP_B21
  62         PAD_CFG_GPO(GPP_B22, 1, DEEP), // LAN_RST#
  63         PAD_CFG_GPI(GPP_B23, NONE, DEEP), // GPP_B23
  64
  65         /* ------- GPIO Group GPP_C ------- */
  66         PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), // SMB_CLK
  67         PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), // SMB_DATA
  68         PAD_CFG_GPI(GPP_C2, NONE, PLTRST), // PCH_PORT80_LED
  69         PAD_CFG_GPO(GPP_C3, 0, DEEP), // GPPC_I2C2_SDA
  70         PAD_CFG_GPO(GPP_C4, 0, DEEP), // GPPC_I2C2_SCL
  71         PAD_CFG_NF(GPP_C5, NONE, DEEP, NF1), // GPP_C_5_SML0ALERT_N
  72         PAD_CFG_GPO(GPP_C6, 0, DEEP),
  73         PAD_CFG_GPO(GPP_C7, 0, DEEP),
  74         PAD_CFG_GPI(GPP_C8, NONE, DEEP), // TPM_DET
  75         PAD_CFG_GPO(GPP_C9, 0, DEEP),
  76         PAD_CFG_GPO(GPP_C10, 0, DEEP),
  77         PAD_CFG_GPO(GPP_C11, 0, DEEP),
  78         PAD_CFG_GPO(GPP_C12, 0, DEEP),
  79         PAD_CFG_GPO(GPP_C13, 0, DEEP),
  80         PAD_CFG_GPO(GPP_C14, 0, DEEP),
  81         PAD_CFG_GPO(GPP_C15, 0, DEEP),
  82         PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), // I2C_SDA_TP
  83         PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), // I2C_SCL_TP
  84         PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), // PCH_I2C_SDA
  85         PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), // PCH_I2C_SCL
  86         // GPP_C20 (UART2_RXD) configured in bootblock
  87         // GPP_C21 (UART2_TXD) configured in bootblock
  88         PAD_CFG_GPO(GPP_C22, 0, DEEP), // ROM_I2C_EN
  89         PAD_CFG_GPO(GPP_C23, 0, DEEP),
  90
  91         /* ------- GPIO Group GPP_D ------- */
  92         PAD_CFG_GPO(GPP_D0, 0, DEEP),
  93         PAD_CFG_GPO(GPP_D1, 0, DEEP),
  94         PAD_CFG_GPO(GPP_D2, 0, DEEP),
  95         PAD_CFG_GPO(GPP_D3, 0, DEEP), // GFX_DETECT_STRAP
  96         PAD_CFG_GPO(GPP_D4, 0, DEEP), // GPP_D4_SML1CLK
  97         PAD_CFG_GPO(GPP_D5, 1, DEEP), // M.2_BT_PCMFRM_CRF_RST_N
  98         // GPP_D6 (M.2_BT_PCMOUT_CLKREQ0) configured by FSP
  99         PAD_CFG_GPO(GPP_D7, 0, DEEP), // GPP_D7
 100         PAD_NC(GPP_D8, NONE), // GPP_D8
 101         PAD_CFG_NF(GPP_D9, NATIVE, DEEP, NF1), // GPP_D9_SML0CLK
 102         PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF1), // GPP_D10_SML0DATA
 103         PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
 104         PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
 105         PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
 106         PAD_CFG_NF(GPP_D14, NATIVE, DEEP, NF1),
 107         PAD_CFG_NF(GPP_D15, NATIVE, DEEP, NF1), // GPP_D15_SML1DATA
 108         PAD_CFG_NF(GPP_D16, NATIVE, DEEP, NF1),
 109         PAD_CFG_NF(GPP_D17, NATIVE, DEEP, NF1),
 110         PAD_CFG_NF(GPP_D18, NATIVE, DEEP, NF1),
 111         PAD_CFG_NF(GPP_D19, NATIVE, DEEP, NF1),
 112         PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
 113         PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1),
 114         PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
 115         PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
 116
 117         /* ------- GPIO Group GPP_E ------- */
 118         PAD_CFG_GPO(GPP_E0, 0, DEEP),
 119         PAD_CFG_GPO(GPP_E1, 0, DEEP),
 120         PAD_CFG_GPO(GPP_E2, 0, DEEP),
 121         PAD_CFG_GPO(GPP_E3, 0, DEEP),
 122         PAD_CFG_GPO(GPP_E4, 0, DEEP),
 123         PAD_CFG_GPO(GPP_E5, 0, DEEP),
 124         PAD_CFG_GPO(GPP_E6, 0, DEEP),
 125         PAD_CFG_GPI_INT(GPP_E7, NONE, PLTRST, LEVEL), // TP_ATTN#
 126         PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), // SATA_LED#
 127         PAD_NC(GPP_E9, NONE), // GPP_E_9_USB_OC0_N
 128         PAD_NC(GPP_E10, NONE), // GPP_E_10_USB_OC1_N
 129         PAD_NC(GPP_E11, NONE), // GPP_E_11_USB_OC2_N
 130         PAD_NC(GPP_E12, NONE), // GPP_E_12_USB_OC3_N
 131         PAD_CFG_GPO(GPP_E13, 0, DEEP),
 132         PAD_CFG_GPO(GPP_E14, 0, DEEP),
 133         PAD_CFG_GPO(GPP_E15, 0, DEEP),
 134         PAD_CFG_GPO(GPP_E16, 0, DEEP),
 135         PAD_CFG_GPO(GPP_E17, 0, DEEP),
 136         PAD_CFG_GPO(GPP_E18, 1, DEEP), // SB_BLON
 137         PAD_CFG_GPO(GPP_E19, 0, DEEP),
 138         PAD_CFG_GPO(GPP_E20, 0, DEEP),
 139         PAD_CFG_GPO(GPP_E21, 0, DEEP),
 140
 141         /* ------- GPIO Group GPP_F ------- */
 142         PAD_CFG_GPO(GPP_F0, 0, DEEP),
 143         PAD_CFG_GPO(GPP_F1, 0, DEEP),
 144         PAD_CFG_GPO(GPP_F2, 0, DEEP),
 145         PAD_CFG_GPO(GPP_F3, 0, DEEP),
 146         PAD_CFG_GPO(GPP_F4, 0, DEEP),
 147         PAD_CFG_GPO(GPP_F5, 1, PLTRST), // GPP_F5_TBT_RTD3
 148         PAD_CFG_GPO(GPP_F6, 0, DEEP),
 149         PAD_CFG_GPO(GPP_F7, 0, DEEP),
 150         PAD_CFG_GPI(GPP_F8, NONE, DEEP), // GC6_FB_EN_PCH
 151         _PAD_CFG_STRUCT(GPP_F9, 0x42880100, 0x0000), // GPP_F9_TBT_WAKE#
 152         PAD_CFG_GPO(GPP_F10, 0, DEEP),
 153         PAD_CFG_GPO(GPP_F11, 0, DEEP),
 154         PAD_CFG_GPO(GPP_F12, 0, DEEP),
 155         PAD_CFG_GPO(GPP_F13, 0, DEEP),
 156         PAD_CFG_GPO(GPP_F14, 0, DEEP), // PS_ON#
 157         PAD_CFG_GPI(GPP_F15, NONE, DEEP), // H_SKTOCC_N
 158         PAD_CFG_GPO(GPP_F16, 1, DEEP), // GPP_F16_TBT_RST#
 159         PAD_CFG_GPO(GPP_F17, 0, DEEP),
 160         PAD_CFG_GPO(GPP_F18, 0, DEEP), // CCD_FW_WP#
 161         PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), // NB_ENAVDD
 162         PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), // BLON
 163         PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), // EDP_BRIGHTNESS
 164         // GPP_F22 (DGPU_PWR_EN) configured in bootblock
 165         PAD_CFG_GPO(GPP_F23, 0, DEEP),
 166
 167         /* ------- GPIO Group GPP_G ------- */
 168         PAD_CFG_GPO(GPP_G0, 0, RSMRST), // TBT_USB_FORCE_PWR
 169         PAD_CFG_GPI(GPP_G1, NONE, DEEP), // GPP_G1
 170         PAD_CFG_GPI(GPP_G2, DN_20K, DEEP), // DNX_FORCE_RELOAD
 171         PAD_CFG_GPI(GPP_G3, NONE, DEEP), // GPP_G3
 172         PAD_CFG_GPI(GPP_G4, NONE, DEEP), // GPP_G4
 173         PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), // SLP_DRAM_N
 174         PAD_CFG_GPI(GPP_G6, NONE, DEEP), // GPP_G6
 175         _PAD_CFG_STRUCT(GPP_G7, 0x42800100, 0x0000), // TBCIO_PLUG_EVENT#
 176
 177         /* ------- GPIO Group GPP_H ------- */
 178         PAD_CFG_GPI(GPP_H0, NONE, DEEP), // VAL_SV_ADVANCE_STRAP
 179         PAD_CFG_GPO(GPP_H1, 0, DEEP),
 180         PAD_CFG_GPI(GPP_H2, NONE, DEEP), // WLAN_WAKE_N
 181         // GPP_H3 (WLAN_CLKREQ9#) configured by FSP
 182         // GPP_H4 (SSD1_CLKREQ10#) configured by FSP
 183         // GPP_H5 (SSD2_CLKREQ11#) configured by FSP
 184         // GPP_H6 (SSD3_CLKREQ12#) configured by FSP
 185         // GPP_H7 (GLAN_CLKREQ13#) configured by FSP
 186         // GPP_H8 (GPU_PCIE_CLKREQ14#) configured by FSP
 187         // GPP_H9 (TBT_CLKREQ15#) configured by FSP
 188         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1), // GPP_H10_SML2CLK
 189         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1), // GPP_H11_SML2DATA
 190         PAD_CFG_GPI(GPP_H12, NONE, DEEP), // GPP_H12
 191         PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1), // GPP_H13_SML3CLK
 192         PAD_CFG_NF(GPP_H14, NONE, DEEP, NF1), // GPP_H14_SML3DATA
 193         PAD_CFG_GPI(GPP_H15, NONE, DEEP), // GPP_H_15_SML3ALERT_N
 194         PAD_CFG_GPI(GPP_H16, NONE, DEEP),
 195         PAD_CFG_GPO(GPP_H17, 1, DEEP), // M.2_PLT_RST_CNTRL3#
 196         PAD_CFG_GPI(GPP_H18, NONE, DEEP), // GPP_H18
 197         PAD_CFG_GPO(GPP_H19, 0, DEEP),
 198         PAD_CFG_GPO(GPP_H20, 0, DEEP),
 199         PAD_CFG_GPO(GPP_H21, 1, DEEP), // TBT_MRESET_PCH
 200         PAD_CFG_GPO(GPP_H22, 0, DEEP),
 201         PAD_CFG_GPI(GPP_H23, NONE, DEEP), // TIME_SYNC0
 202
 203         /* ------- GPIO Group GPP_I ------- */
 204         PAD_CFG_GPO(GPP_I0, 0, DEEP),
 205         _PAD_CFG_STRUCT(GPP_I1, 0x86880100, 0x0000), // G_DP_DHPD_E
 206         _PAD_CFG_STRUCT(GPP_I2, 0x86880100, 0x0000), // DP_D_HPD
 207         _PAD_CFG_STRUCT(GPP_I3, 0x86880100, 0x0000), // HDMI_HPD
 208         _PAD_CFG_STRUCT(GPP_I4, 0x86880100, 0x0000), // DP_A_HPD
 209         PAD_CFG_GPO(GPP_I5, 0, DEEP),
 210         PAD_CFG_GPO(GPP_I6, 0, DEEP),
 211         PAD_CFG_GPO(GPP_I7, 0, DEEP),
 212         PAD_CFG_GPO(GPP_I8, 0, DEEP),
 213         PAD_CFG_GPO(GPP_I9, 0, DEEP),
 214         PAD_CFG_GPO(GPP_I10, 0, DEEP),
 215         PAD_NC(GPP_I11, NONE), // GPP_I_11_USB_OC4_N
 216         PAD_NC(GPP_I12, NONE), // GPP_I_12_USB_OC5_N
 217         PAD_NC(GPP_I13, NONE), // GPP_I_13_USB_OC6_N
 218         PAD_NC(GPP_I14, NONE), // GPP_I_14_USB_OC7_N
 219         PAD_CFG_GPO(GPP_I15, 0, DEEP),
 220         PAD_CFG_GPO(GPP_I16, 0, DEEP),
 221         PAD_CFG_GPO(GPP_I17, 0, DEEP),
 222         PAD_CFG_GPI(GPP_I18, NONE, DEEP), // GPP_I18
 223         PAD_CFG_GPO(GPP_I19, 0, DEEP),
 224         PAD_CFG_GPO(GPP_I20, 0, DEEP),
 225         PAD_CFG_GPO(GPP_I21, 0, DEEP),
 226         PAD_CFG_GPI(GPP_I22, NONE, DEEP), // GPP_I22
 227
 228         /* ------- GPIO Group GPP_J ------- */
 229         PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1), // CNVI_GNSS_PA_BLANKING
 230         PAD_CFG_NF(GPP_J1, NONE, DEEP, NF1), // CPU_C10_GATE#
 231         PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1), // CNVI_BRI_DT_R
 232         PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
 233         PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1), // CNVI_RGI_DT_R
 234         PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
 235         PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1), // CNVI_MFUART2_RXD
 236         PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1), // CNVI_MFUART2_TXD
 237         PAD_CFG_GPI(GPP_J8, NONE, DEEP), // VAL_TEST_SETUP_MENU
 238         PAD_CFG_GPO(GPP_J9, 0, DEEP),
 239         PAD_CFG_GPO(GPP_J10, 0, DEEP),
 240         PAD_CFG_GPO(GPP_J11, 0, DEEP),
 241
 242         /* ------- GPIO Group GPP_K ------- */
 243         PAD_CFG_GPO(GPP_K0, 0, DEEP),
 244         PAD_CFG_GPO(GPP_K1, 0, DEEP),
 245         PAD_CFG_GPO(GPP_K2, 0, DEEP),
 246         PAD_CFG_GPO(GPP_K3, 0, DEEP),
 247         PAD_CFG_GPO(GPP_K4, 0, DEEP),
 248         PAD_CFG_GPO(GPP_K5, 0, DEEP),
 249         PAD_CFG_NF(GPP_K6, NONE, DEEP, NF2),
 250         PAD_CFG_NF(GPP_K7, NONE, DEEP, NF2),
 251         PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1), // GPP_K_8_CORE_VID_0
 252         PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1), // GPP_K_9_CORE_VID_1
 253         PAD_CFG_NF(GPP_K10, NONE, DEEP, NF2),
 254         PAD_CFG_GPO(GPP_K11, 0, DEEP),
 255
 256         /* ------- GPIO Group GPP_R ------- */
 257         PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), // HDA_BITCLK
 258         PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), // HDA_SYNC
 259         PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), // HDA_SDOUT
 260         PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), // HDA_SDIN0
 261         PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), // HDA_RST#
 262         PAD_CFG_GPO(GPP_R5, 0, DEEP),
 263         PAD_CFG_GPO(GPP_R6, 0, DEEP),
 264         PAD_CFG_GPO(GPP_R7, 0, DEEP),
 265         PAD_CFG_GPI(GPP_R8, NONE, DEEP), // DGPU_PWRGD
 266         PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1), // EDP_HPD
 267         PAD_CFG_GPO(GPP_R10, 0, DEEP),
 268         PAD_CFG_GPO(GPP_R11, 0, DEEP),
 269         PAD_CFG_GPO(GPP_R12, 0, DEEP),
 270         PAD_CFG_GPO(GPP_R13, 0, DEEP),
 271         PAD_CFG_GPO(GPP_R14, 0, DEEP),
 272         PAD_CFG_GPO(GPP_R15, 0, DEEP),
 273         // GPP_R16 (DGPU_RST#_PCH) configured in bootblock
 274         PAD_CFG_GPO(GPP_R17, 0, DEEP),
 275         PAD_CFG_GPO(GPP_R18, 0, DEEP),
 276         PAD_CFG_GPO(GPP_R19, 0, DEEP),
 277         PAD_CFG_GPO(GPP_R20, 0, DEEP),
 278         PAD_CFG_GPO(GPP_R21, 0, DEEP),
 279
 280         /* ------- GPIO Group GPP_S ------- */
 281         PAD_CFG_GPO(GPP_S0, 0, DEEP),
 282         PAD_CFG_GPO(GPP_S1, 0, DEEP),
 283         PAD_CFG_GPO(GPP_S2, 0, DEEP),
 284         PAD_CFG_GPO(GPP_S3, 0, DEEP),
 285         PAD_CFG_GPO(GPP_S4, 0, DEEP), // GPPS_DMIC_CLK
 286         PAD_CFG_GPO(GPP_S5, 0, DEEP), // GPPS_DMIC_DATA
 287         PAD_CFG_GPO(GPP_S6, 0, DEEP),
 288         PAD_CFG_GPO(GPP_S7, 0, DEEP),
 289 };
 290
 291 void mainboard_configure_gpios(void)
 292 {
 293         gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 294 }