src/mainboard/system76/rpl/variants/bonw15/overridetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/alderlake
   4         # Support 5600 MT/s memory
   5         register "max_dram_speed_mts" = "5600"
   6
   7         device domain 0 on
   8                 subsystemid 0x1558 0x3702 inherit
   9
  10                 device ref xhci on
  11                         register "usb2_ports" = "{
  12                                 [0] = USB2_PORT_MID(OC_SKIP),           /* Type-A 3.2 Gen 2 (Left, Front) */
  13                                 [1] = USB2_PORT_MID(OC_SKIP),           /* Type-A 3.2 Gen 2 (Left, Rear) */
  14                                 [5] = USB2_PORT_MID(OC_SKIP),           /* Camera */
  15                                 [6] = USB2_PORT_MID(OC_SKIP),           /* Per-key RGB */
  16                                 /* Port reset messaging cannot be used,
  17                                  * so do not use USB2_PORT_TYPE_C for these */
  18                                 [8] = USB2_PORT_MID(OC_SKIP),           /* Type-C Thunderbolt (Right, Front) */
  19                                 [9] = USB2_PORT_MID(OC_SKIP),           /* Type-C Thunderbolt with PD (Right, Rear) */
  20                                 [13] = USB2_PORT_MID(OC_SKIP),          /* Bluetooth */
  21                         }"
  22                         register "usb3_ports" = "{
  23                                 [0] = USB3_PORT_DEFAULT(OC_SKIP),       /* Type-A 3.2 Gen 2 (Left, Front) */
  24                                 [2] = USB3_PORT_DEFAULT(OC_SKIP),       /* Type-A 3.2 Gen 2 (Left, Rear) */
  25                         }"
  26                 end
  27
  28                 device ref i2c0 on
  29                         # Touchpad I2C bus
  30                         register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
  31                         chip drivers/i2c/hid
  32                                 register "generic.hid" = ""ELAN0412""
  33                                 register "generic.desc" = ""ELAN Touchpad""
  34                                 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
  35                                 register "generic.detect" = "1"
  36                                 register "hid_desc_reg_offset" = "0x01"
  37                                 device i2c 15 on end
  38                         end
  39                         chip drivers/i2c/hid
  40                                 register "generic.hid" = ""FTCS1000""
  41                                 register "generic.desc" = ""FocalTech Touchpad""
  42                                 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
  43                                 register "generic.detect" = "1"
  44                                 register "hid_desc_reg_offset" = "0x01"
  45                                 device i2c 38 on end
  46                         end
  47                 end
  48
  49                 device ref pcie5_0 on
  50                         # CPU PCIe RP#3 x4, CLKOUT 2, CLKREQ 11 (SSD2)
  51                         register "cpu_pcie_rp[CPU_RP(2)]" = "{
  52                                 .clk_src = 2,
  53                                 .clk_req = 11,
  54                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  55                         }"
  56                 end
  57
  58                 device ref pcie5_1 on
  59                         # CPU PCIe RP#2 x8, Clock 14 (DGPU)
  60                         register "cpu_pcie_rp[CPU_RP(3)]" = "{
  61                                 .clk_src = 14,
  62                                 .clk_req = 14,
  63                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  64                         }"
  65                 end
  66
  67                 device ref pcie4_0 on
  68                         # CPU PCIe RP#1 x4, Clock 12 (SSD3)
  69                         register "cpu_pcie_rp[CPU_RP(1)]" = "{
  70                                 .clk_src = 12,
  71                                 .clk_req = 12,
  72                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  73                         }"
  74                 end
  75
  76                 device ref pcie_rp7 on
  77                         # PCH RP#7 x1, Clock 13 (GLAN)
  78                         register "pch_pcie_rp[PCH_RP(7)]" = "{
  79                                 .clk_src = 13,
  80                                 .clk_req = 13,
  81                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  82                         }"
  83                         device pci 00.0 on end
  84                 end
  85
  86                 device ref pcie_rp8 on
  87                         # PCH RP#8 x1, Clock 9 (WLAN)
  88                         register "pch_pcie_rp[PCH_RP(8)]" = "{
  89                                 .clk_src = 9,
  90                                 .clk_req = 9,
  91                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  92                         }"
  93                 end
  94
  95                 device ref pcie_rp9 on
  96                         # PCH RP#9 x4, Clock 15 (TBT)
  97                         register "pch_pcie_rp[PCH_RP(9)]" = "{
  98                                 .clk_src = 15,
  99                                 .clk_req = 15,
 100                                 .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR,
 101                         }"
 102                 end
 103
 104                 device ref pcie_rp21 on
 105                         # PCH RP#21 x4, Clock 10 (SSD1)
 106                         register "pch_pcie_rp[PCH_RP(21)]" = "{
 107                                 .clk_src = 10,
 108                                 .clk_req = 10,
 109                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
 110                         }"
 111                 end
 112         end
 113 end