src/mainboard/system76/rpl/variants/galp7/overridetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/alderlake
   4         register "power_limits_config[RPL_P_682_642_482_45W_CORE]" = "{
   5                 .tdp_pl1_override = 45,
   6                 .tdp_pl2_override = 78,
   7         }"
   8
   9         device domain 0 on
  10                 subsystemid 0x1558 0x4041 inherit
  11
  12                 device ref pcie4_0 on
  13                         # PCIe PEG0 x4, Clock 0 (SSD1)
  14                         register "cpu_pcie_rp[CPU_RP(1)]" = "{
  15                                 .clk_src = 0,
  16                                 .clk_req = 0,
  17                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  18                         }"
  19                 end
  20                 device ref tbt_pcie_rp0 on end
  21                 device ref tcss_xhci on
  22                         register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
  23                 end
  24                 device ref tcss_dma0 on end
  25                 device ref xhci on
  26                         register "usb2_ports" = "{
  27                                 [0] = USB2_PORT_MID(OC_SKIP),           /* J_USB3_2 (USB 3.2 Gen1) */
  28                                 [1] = USB2_PORT_TYPE_C(OC_SKIP),        /* J_TYPEC1 (USB 3.2 Gen2) */
  29                                 [2] = USB2_PORT_MID(OC_SKIP),           /* J_USB3_1 (USB 3.2 Gen1) */
  30                                 [4] = USB2_PORT_MID(OC_SKIP),           /* Fingerprint */
  31                                 [5] = USB2_PORT_TYPE_C(OC_SKIP),        /* J_TYPEC2 (Thunerbolt) */
  32                                 [6] = USB2_PORT_MID(OC_SKIP),           /* Camera */
  33                                 [9] = USB2_PORT_MID(OC_SKIP),           /* Bluetooth */
  34                         }"
  35                         register "usb3_ports" = "{
  36                                 [0] = USB3_PORT_DEFAULT(OC_SKIP),       /* J_USB3_2 (USB 3.2 Gen1) */
  37                                 [2] = USB3_PORT_DEFAULT(OC_SKIP),       /* J_USB3_1 (USB 3.2 Gen1) */
  38                                 [3] = USB3_PORT_DEFAULT(OC_SKIP),       /* J_TYPEC1 (USB 3.2 Gen2) */
  39                         }"
  40                 end
  41                 device ref i2c0 on
  42                         # Touchpad I2C bus
  43                         register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
  44                         chip drivers/i2c/hid
  45                                 register "generic.hid" = ""ELAN0412""
  46                                 register "generic.desc" = ""ELAN Touchpad""
  47                                 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)"
  48                                 register "generic.detect" = "1"
  49                                 register "hid_desc_reg_offset" = "0x01"
  50                                 device i2c 15 on end
  51                         end
  52                         chip drivers/i2c/hid
  53                                 register "generic.hid" = ""FTCS1000""
  54                                 register "generic.desc" = ""FocalTech Touchpad""
  55                                 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)"
  56                                 register "generic.detect" = "1"
  57                                 register "hid_desc_reg_offset" = "0x01"
  58                                 device i2c 38 on end
  59                         end
  60                 end
  61                 device ref sata off end
  62                 device ref pcie_rp5 on
  63                         # PCIe RP#5 x1, Clock 2 (WLAN)
  64                         register "pch_pcie_rp[PCH_RP(5)]" = "{
  65                                 .clk_src = 2,
  66                                 .clk_req = 2,
  67                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  68                         }"
  69                 end
  70                 device ref pcie_rp9 on
  71                         # PCIe RP#9 x1, Clock 5 (CARD)
  72                         register "pch_pcie_rp[PCH_RP(9)]" = "{
  73                                 .clk_src = 5,
  74                                 .clk_req = 5,
  75                                 .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
  76                         }"
  77                 end
  78                 device ref pcie_rp10 on
  79                         # PCIe RP#10 x1, Clock 6 (GLAN)
  80                         register "pch_pcie_rp[PCH_RP(10)]" = "{
  81                                 .clk_src = 6,
  82                                 .clk_req = 6,
  83                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  84                         }"
  85                 end
  86         end
  87 end