soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git] / util / superiotool / infineon.c
blobdcd1a009a5ed1f7195b423d40db5734382927f7b
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include "superiotool.h"
5 #define DEVICE_ID_REG 0x20
6 #define DEVICE_REV_REG 0x21
8 static const struct superio_registers reg_table[] = {
9 {0x0b, "SLB9635TT12", {
10 {NOLDN, NULL,
11 {0x20,0x21,0x26,0x27,EOT},
12 {0x0b,0x00,NANA,NANA,EOT}},
13 {0, NULL,
14 {0x30,0x38,0x60,0x61,0x70,0x71,0xf1,0xf2,0xf3,0xf4,0xf5,EOT},
15 {0x00,0x00,NANA,NANA,0x00,0x02,0xd1,0x15,0x0b,0x00,NANA,EOT}},
16 {EOT}}},
17 {EOT}
20 /* same as some SMSC */
21 static void enter_conf_mode_infineon(uint16_t port)
23 OUTB(0x55, port);
26 static void exit_conf_mode_infineon(uint16_t port)
28 OUTB(0xaa, port);
31 void probe_idregs_infineon(uint16_t port)
33 uint8_t rev, devid;
35 probing_for("Infineon", "", port);
37 enter_conf_mode_infineon(port);
39 devid = regval(port, DEVICE_ID_REG);
40 rev = regval(port, DEVICE_REV_REG);
42 if (superio_unknown(reg_table, devid)) {
43 if (verbose)
44 printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", devid, rev);
45 exit_conf_mode_infineon(port);
46 return;
49 /* Attempt to prevent false matches on SMSC FDC37N972, see smsc.c */
50 if (((regval(port, 0x27)<<8)|regval(port, 0x26)) != port) {
51 if (verbose)
52 printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", devid, rev);
53 exit_conf_mode_infineon(port);
54 return;
57 printf("Found Infineon %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
58 get_superio_name(reg_table, devid), devid, rev, port);
59 chip_found = 1;
61 dump_superio("Infineon", reg_table, port, devid, LDN_SEL);
63 exit_conf_mode_infineon(port);
66 void print_infineon_chips(void)
68 print_vendor_chips("Infineon", reg_table);