soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git] / util / superiotool / serverengines.c
blobb59328fec7f66fc6562758a482728f102e4c8d84
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include "superiotool.h"
5 #define DEVICE_ID_BYTE1_REG 0x20
6 #define DEVICE_ID_BYTE2_REG 0x21
8 #define DEVICE_REV_REG 0x1f
10 static const struct superio_registers reg_table[] = {
12 * Note: These register defaults are based on educated guessing,
13 * take them with a grain of salt.
15 * TODO: Don't know the ID registers yet: 0x21 probably is not an ID
16 * register as it is being set in the BIOS. For now still use as there
17 * is no known alternative.
19 {0x02c0, "SE-SM 4210-P01", {
20 {NOLDN, NULL,
21 {0x1f,0x20,0x21,0x22,0x23,0x2c,0x2d,0x2e,EOT},
22 {NANA,0x02,0xc0,0x00,0x00,RSVD,RSVD,RSVD,EOT}},
23 {0x0, "UNKNOWN",
24 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
25 {NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
26 {0x1, "COM2",
27 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
28 {0x00,0x02,0xf8,0x03,0x00,0x00,0x0c,EOT}},
29 {0x2, "COM1",
30 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
31 {0x00,0x03,0xf8,0x04,0x00,0x00,0x0c,EOT}},
32 {0x3, "UNKNOWN",
33 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
34 {NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
35 {0x4, "UNKNOWN",
36 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
37 {NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
38 {0x5, "UNKNOWN",
39 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
40 {NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
41 {0x6, "UNKNOWN",
42 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
43 {NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
44 {0x7, "UNKNOWN",
45 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
46 {NANA,NANA,NANA,NANA,NANA,NANA,NANA,EOT}},
47 {EOT}}},
48 {EOT}
51 static void enter_conf_mode_serverengines(uint16_t port)
53 OUTB(0x5a, port);
56 static void exit_conf_mode_serverengines(uint16_t port)
58 OUTB(0xa5, port);
61 void probe_idregs_serverengines(uint16_t port)
63 uint16_t id;
64 uint8_t rev;
66 probing_for("Server Engines", "", port);
68 enter_conf_mode_serverengines(port);
70 id = regval(port, DEVICE_ID_BYTE1_REG) << 8;
71 id |= regval(port, DEVICE_ID_BYTE2_REG);
73 /* TODO: Not documented/available on ServerEngines. */
74 rev = regval(port, DEVICE_REV_REG);
76 if (superio_unknown(reg_table, id)) {
77 if (verbose)
78 printf(NOTFOUND "id=0x%04x, rev=0x%02x\n", id, rev);
79 exit_conf_mode_serverengines(port);
80 return;
83 printf("Found Server Engines %s (id=0x%04x, rev=0x%02x) at 0x%x\n",
84 get_superio_name(reg_table, id), id, rev, port);
85 chip_found = 1;
87 dump_superio("Server Engines", reg_table, port, id, LDN_SEL);
89 exit_conf_mode_serverengines(port);
92 void print_serverengines_chips(void)
94 print_vendor_chips("Server Engines", reg_table);