Documentation/mainboard/emulation/spike-riscv.md

   1 # Spike RISC-V emulator
   2
   3 [Spike], also known as riscv-isa-sim, is a commonly used [RISC-V] emulator.
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   5
   6 ## Installation
   7
   8 - Download `riscv-fesvr` and `riscv-isa-sim` from <https://github.com/riscv/>
   9 - Apply the two patches in <https://github.com/riscv/riscv-isa-sim/pull/53>,
  10   which are necessary in order to have a serial console
  11 - Compile `riscv-fesvr` and then `riscv-isa-sim`
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  13
  14 ## Building coreboot and running it in Spike
  15
  16 - Configure coreboot and run `make` as usual
  17 - Run `util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf` to
  18   convert coreboot to an ELF that Spike can load
  19 - Run `spike -m1024 build/coreboot.elf`
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  21
  22 [Spike]: https://github.com/riscv/riscv-isa-sim
  23 [RISC-V]: https://riscv.org/