soc/intel/xeon_sp/util: Enhance lock_pam0123
[coreboot2.git] / payloads / libpayload / drivers / i8042 / i8042.h
blob8c18670cb65ee48a03cd21bcef3d59663c4102ba
1 /*
3 * Copyright 2018 Google LLC
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
29 #ifndef __DRIVERS_I8042_I8042_H__
30 #define __DRIVERS_I8042_I8042_H__
32 /* Port 0x64 commands */
33 #define I8042_CMD_RD_CMD_BYTE 0x20
34 #define I8042_CMD_WR_CMD_BYTE 0x60
35 #define I8042_CMD_BYTE_XLATE (1 << 6)
36 #define I8042_CMD_DIS_AUX 0xa7
37 #define I8042_CMD_EN_AUX 0xa8
38 #define I8042_CMD_AUX_TEST 0xa9
39 #define I8042_CMD_SELF_TEST 0xaa
40 #define I8042_SELF_TEST_RSP 0x55
41 #define I8042_CMD_KB_TEST 0xab
42 #define I8042_CMD_DIAG_DUMP 0xac
43 #define I8042_CMD_DIS_KB 0xad
44 #define I8042_CMD_EN_KB 0xae
45 #define I8042_CMD_RD_INPUT_PORT 0xc0
46 #define I8042_CMD_RD_OUTPUT_PORT 0xd0
47 #define I8042_CMD_WR_OUTPUT_PORT 0xd1
48 #define I8042_CMD_RD_TEST_INPUTS 0xe0
50 /* Port 0x60 keyboard commands */
51 #define I8042_KBCMD_SET_MODE_IND 0xed
52 #define I8042_MODE_CAPS_LOCK_ON (1 << 2)
53 #define I8042_MODE_CAPS_LOCK_OFF (0 << 2)
54 #define I8042_MODE_NUM_LOCK_ON (1 << 1)
55 #define I8042_MODE_NUM_LOCK_OFF (0 << 1)
56 #define I8042_MODE_SCROLL_LOCK_ON (1 << 0)
57 #define I8042_MODE_SCROLL_LOCK_OFF (0 << 0)
58 #define I8042_KBCMD_ECHO 0xee
59 #define I8042_KBCMD_SET_SCANCODE 0xf0
60 #define I8042_KBCMD_SET_TYPEMATIC 0xf3
61 #define I8042_KBCMD_EN 0xf4
62 #define I8042_KBCMD_DEFAULT_DIS 0xf5
63 #define I8042_KBCMD_SET_DEFAULT 0xf6
64 #define I8042_KBCMD_RESEND 0xfe
65 #define I8042_KBCMD_RESET 0xff
67 #endif /* __DRIVERS_I8042_I8042_H__ */