soc/intel/xeon_sp/util: Enhance lock_pam0123
[coreboot2.git] / payloads / libpayload / drivers / pci_map_bus_ops.c
blob2b4f9d159a951b208724000d93745c06ffb26ab6
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <libpayload.h>
4 #include <pci.h>
6 u8 pci_read_config8(pcidev_t dev, u16 reg)
8 uintptr_t cfg_base = pci_map_bus(dev);
10 return read8((void *)(cfg_base | reg));
13 u16 pci_read_config16(pcidev_t dev, u16 reg)
15 uintptr_t cfg_base = pci_map_bus(dev);
17 return read16((void *)(cfg_base | (reg & ~1)));
20 u32 pci_read_config32(pcidev_t dev, u16 reg)
22 uintptr_t cfg_base = pci_map_bus(dev);
24 return read32((void *)(cfg_base | (reg & ~3)));
27 void pci_write_config8(pcidev_t dev, u16 reg, u8 val)
29 uintptr_t cfg_base = pci_map_bus(dev);
31 write8((void *)(cfg_base | reg), val);
34 void pci_write_config16(pcidev_t dev, u16 reg, u16 val)
36 uintptr_t cfg_base = pci_map_bus(dev);
38 write16((void *)(cfg_base | (reg & ~1)), val);
41 void pci_write_config32(pcidev_t dev, u16 reg, u32 val)
43 uintptr_t cfg_base = pci_map_bus(dev);
45 write32((void *)(cfg_base | (reg & ~3)), val);