soc/intel/xeon_sp/util: Enhance lock_pam0123
[coreboot2.git] / payloads / libpayload / include / x86 / arch / exception.h
blobd88029b39e8468895fe7e7d59e19123b870a52b2
1 /*
3 * Copyright 2013 Google Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
29 #ifndef _ARCH_EXCEPTION_H
30 #define _ARCH_EXCEPTION_H
32 #include <stdint.h>
34 void exception_init_asm(void);
35 void exception_dispatch(void);
36 void enable_interrupts(void);
37 void disable_interrupts(void);
38 /** Returns 1 if interrupts are enabled. */
39 int interrupts_enabled(void);
41 struct exception_state
43 /* Careful: x86/gdb.c currently relies on the size and order of regs. */
44 struct {
45 u32 eax;
46 u32 ecx;
47 u32 edx;
48 u32 ebx;
49 u32 esp;
50 u32 ebp;
51 u32 esi;
52 u32 edi;
53 u32 eip;
54 u32 eflags;
55 u32 cs;
56 u32 ss;
57 u32 ds;
58 u32 es;
59 u32 fs;
60 u32 gs;
61 } regs;
62 u32 error_code;
63 u32 vector;
64 } __packed;
65 extern struct exception_state *exception_state;
67 extern u32 exception_stack[];
68 extern u32 *exception_stack_end;
70 enum {
71 EXC_DE = 0, /* Divide by zero */
72 EXC_DB = 1, /* Debug */
73 EXC_NMI = 2, /* Non maskable interrupt */
74 EXC_BP = 3, /* Breakpoint */
75 EXC_OF = 4, /* Overflow */
76 EXC_BR = 5, /* Bound range */
77 EXC_UD = 6, /* Invalid opcode */
78 EXC_NM = 7, /* Device not available */
79 EXC_DF = 8, /* Double fault */
80 EXC_TS = 10, /* Invalid TSS */
81 EXC_NP = 11, /* Segment not present */
82 EXC_SS = 12, /* Stack */
83 EXC_GP = 13, /* General protection */
84 EXC_PF = 14, /* Page fault */
85 EXC_MF = 16, /* x87 floating point */
86 EXC_AC = 17, /* Alignment check */
87 EXC_MC = 18, /* Machine check */
88 EXC_XF = 19, /* SIMD floating point */
89 EXC_SX = 30, /* Security */
90 EXC_COUNT
93 #endif