soc/intel/xeon_sp/util: Enhance lock_pam0123
[coreboot2.git] / payloads / libpayload / include / x86 / arch / io.h
blobd15e15d5431875cdd493076c56166526bfe98ddf
1 /*
3 * Copyright (C) 2008 Advanced Micro Devices, Inc.
4 * Copyright (C) 2008 coresystems GmbH
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
30 #ifndef _ARCH_IO_H
31 #define _ARCH_IO_H
33 #include <inttypes.h>
36 * readb/w/l writeb/w/l are deprecated. use read8/16/32 and write8/16/32
37 * instead for future development.
39 * TODO: make the existing code use read8/16/32 and write8/16/32 then remove
40 * readb/w/l and writeb/w/l.
43 #define readb(_a) (*(volatile const unsigned char *) (_a))
44 #define readw(_a) (*(volatile const unsigned short *) (_a))
45 #define readl(_a) (*(volatile const unsigned int *) (_a))
47 #define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v))
48 #define writew(_v, _a) (*(volatile unsigned short *) (_a) = (_v))
49 #define writel(_v, _a) (*(volatile unsigned int *) (_a) = (_v))
51 static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr)
53 return *((volatile uint8_t *)(addr));
56 static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr)
58 return *((volatile uint16_t *)(addr));
61 static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr)
63 return *((volatile uint32_t *)(addr));
66 static inline __attribute__((always_inline)) uint64_t read64(const volatile void *addr)
68 return *((volatile uint64_t *)(addr));
71 static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value)
73 *((volatile uint8_t *)(addr)) = value;
76 static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value)
78 *((volatile uint16_t *)(addr)) = value;
81 static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value)
83 *((volatile uint32_t *)(addr)) = value;
86 static inline __attribute__((always_inline)) void write64(volatile void *addr, uint64_t value)
88 *((volatile uint64_t *)(addr)) = value;
91 static inline unsigned int inl(int port)
93 unsigned long val;
94 __asm__ __volatile__("inl %w1, %0" : "=a"(val) : "Nd"(port));
95 return val;
98 static inline unsigned short inw(int port)
100 unsigned short val;
101 __asm__ __volatile__("inw %w1, %w0" : "=a"(val) : "Nd"(port));
102 return val;
105 static inline unsigned char inb(int port)
107 unsigned char val;
108 __asm__ __volatile__("inb %w1, %b0" : "=a"(val) : "Nd"(port));
109 return val;
112 static inline void outl(unsigned int val, int port)
114 __asm__ __volatile__("outl %0, %w1" : : "a"(val), "Nd"(port));
117 static inline void outw(unsigned short val, int port)
119 __asm__ __volatile__("outw %w0, %w1" : : "a"(val), "Nd"(port));
122 static inline void outb(unsigned char val, int port)
124 __asm__ __volatile__("outb %b0, %w1" : : "a"(val), "Nd"(port));
127 static inline void outsl(int port, const void *addr, unsigned long count)
129 __asm__ __volatile__("rep; outsl" : "+S"(addr), "+c"(count) : "d"(port));
132 static inline void outsw(int port, const void *addr, unsigned long count)
134 __asm__ __volatile__("rep; outsw" : "+S"(addr), "+c"(count) : "d"(port));
137 static inline void outsb(int port, const void *addr, unsigned long count)
139 __asm__ __volatile__("rep; outsb" : "+S"(addr), "+c"(count) : "d"(port));
142 static inline void insl(int port, void *addr, unsigned long count)
144 __asm__ __volatile__("rep; insl" : "+D"(addr), "+c"(count) : "d"(port)
145 : "memory");
148 static inline void insw(int port, void *addr, unsigned long count)
150 __asm__ __volatile__("rep; insw" : "+D"(addr), "+c"(count) : "d"(port)
151 : "memory");
154 static inline void insb(int port, void *addr, unsigned long count)
156 __asm__ __volatile__("rep; insb" : "+D"(addr), "+c"(count) : "d"(port)
157 : "memory");
160 #endif