mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / Documentation / mainboard / asus / p8h61-m_pro.md
blob3f9bf366f819dbeeae651ea83e85ac02341395a7
1 # ASUS P8H61-M Pro
3 This page describes how to run coreboot on the [ASUS P8H61-M Pro].
5 ## Flashing coreboot
7 ```{eval-rst}
8 +---------------------+------------+
9 | Type                | Value      |
10 +=====================+============+
11 | Socketed flash      | yes        |
12 +---------------------+------------+
13 | Model               | W25Q32BV   |
14 +---------------------+------------+
15 | Size                | 4 MiB      |
16 +---------------------+------------+
17 | Package             | DIP-8      |
18 +---------------------+------------+
19 | Write protection    | no         |
20 +---------------------+------------+
21 | Dual BIOS feature   | no         |
22 +---------------------+------------+
23 | Internal flashing   | yes        |
24 +---------------------+------------+
25 ```
27 The flash IC is located right next to one of the SATA ports:
28 ![](p8h61-m_pro.jpg)
30 ### Internal programming
32 The main SPI flash can be accessed using [flashrom]. By default, only
33 the BIOS region of the flash is writable. If you wish to change any
34 other region (Management Engine or flash descriptor), then an external
35 programmer is required.
37 The following command may be used to flash coreboot:
39 ```
40 $ sudo flashrom --noverify-all --ifd -i bios -p internal -w coreboot.rom
41 ```
43 The use of `--noverify-all` is required since the Management Engine
44 region is not readable even by the host.
46 ## Known issues
48 - There is no automatic, OS-independent fan control. This is because
49   the Super I/O hardware monitor can only obtain valid CPU temperature
50   readings from the PECI agent, whose complete initialisation is not
51   publicly documented. The `coretemp` driver can still be used for
52   accurate CPU temperature readings.
54 - me_cleaner breaks LPC bus and attached components!
55 - PS/2 mouse doesn't work
57 ## Untested
59 - parallel port
60 - EHCI debug
61 - S/PDIF audio
63 ## Working
65 - PS/2 keyboard
66 - PCIe graphics
67 - USB
68 - Gigabit Ethernet
69 - Integrated graphics
70 - SATA
71 - Serial port
72 - hardware monitor (see [Known issues](#known-issues) for caveats)
73 - front panel audio
74 - Native raminit (2 x 2GB, DDR3-1333)
75 - Native graphics init (libgfxinit)
76 - Wake-on-LAN
77 - TPM on TPM-header
79 ## Technology
81 ```{eval-rst}
82 +------------------+--------------------------------------------------+
83 | Northbridge      | :doc:`../../northbridge/intel/sandybridge/index` |
84 +------------------+--------------------------------------------------+
85 | Southbridge      | bd82x6x                                          |
86 +------------------+--------------------------------------------------+
87 | CPU              | model_206ax                                      |
88 +------------------+--------------------------------------------------+
89 | Super I/O        | Nuvoton NCT6776                                  |
90 +------------------+--------------------------------------------------+
91 | EC               | None                                             |
92 +------------------+--------------------------------------------------+
93 | Coprocessor      | Intel Management Engine                          |
94 +------------------+--------------------------------------------------+
95 ```
97 ## Extra resources
99 - [Flash chip datasheet][W25Q32BV]
101 [ASUS P8H61-M Pro]: https://www.asus.com/Motherboards/P8H61M_Pro/
102 [W25Q32BV]: https://www.winbond.com/resource-files/w25q32bv_revi_100413_wo_automotive.pdf
103 [flashrom]: https://flashrom.org/Flashrom