mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3

[coreboot2.git] / Documentation / northbridge / intel / index.md

# Intel Northbridge-specific documentation

This section contains documentation about coreboot on specific Intel Northbridges.

## Platforms

```{toctree}
:maxdepth: 1

Haswell <haswell/index.md>
Sandy Bridge <sandybridge/index.md>
```