mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / console / Makefile.mk
blobe1046322872b04089a453c63933bb9df4a62ab4a
1 ## SPDX-License-Identifier: GPL-2.0-only
3 ramstage-y += vtxprintf.c printk.c vsprintf.c
4 ramstage-y += init.c console.c
5 ramstage-y += post.c
6 ramstage-y += die.c
7 ifeq ($(CONFIG_HWBASE_DEBUG_CB),y)
8 ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.ads
9 ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.adb
10 romstage-$(CONFIG_ROMSTAGE_LIBHWBASE) += hw-debug_sink.ads
11 romstage-$(CONFIG_ROMSTAGE_LIBHWBASE) += hw-debug_sink.adb
12 endif
14 smm-$(CONFIG_DEBUG_SMI) += init.c console.c vtxprintf.c printk.c
15 smm-y += die.c
16 smm-y += post.c
18 ifneq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
19 verstage-y += printk.c
20 verstage-y += console.c
21 endif
22 verstage-y += post.c
23 verstage-y += die.c
24 verstage-y += init.c
25 verstage-y += vtxprintf.c vsprintf.c
27 romstage-$(CONFIG_SEPARATE_ROMSTAGE) += vtxprintf.c printk.c vsprintf.c
28 romstage-$(CONFIG_SEPARATE_ROMSTAGE) += init.c console.c
29 romstage-y += post.c
30 romstage-y += die.c
32 postcar-y += vtxprintf.c vsprintf.c
33 postcar-$(CONFIG_POSTCAR_CONSOLE) += printk.c
34 postcar-$(CONFIG_POSTCAR_CONSOLE) += init.c console.c
35 postcar-y += post.c
36 postcar-y += die.c
38 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += printk.c
39 bootblock-y += vtxprintf.c vsprintf.c
40 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += init.c console.c
41 bootblock-y += post.c
42 bootblock-y += die.c
44 decompressor-y += die.c