mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / aoostar / wtr_r1 / gpio.h
blob067b9cebb321b8fe3a5300e289c58d3ee81d213c
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef CFG_GPIO_H
4 #define CFG_GPIO_H
6 #include <gpio.h>
8 #ifndef PAD_CFG_GPIO_BIDIRECT
9 #define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
10 _PAD_CFG_STRUCT(pad, \
11 PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
12 PAD_BUF(NO_DISABLE) | val, \
13 PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
14 #endif
16 /* Pad configuration was generated automatically using intelp2m utility */
17 static const struct pad_config gpio_table[] = {
19 /* ------- GPIO Community 0 ------- */
21 /* ------- GPIO Group GPP_B ------- */
22 PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), /* CORE_VID0 */
23 PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), /* CORE_VID1 */
24 PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* VRALERT# */
25 PAD_NC(GPP_B3, NONE),
26 PAD_NC(GPP_B4, NONE),
27 PAD_NC(GPP_B5, NONE),
28 PAD_NC(GPP_B6, NONE),
29 PAD_NC(GPP_B7, NONE),
30 PAD_NC(GPP_B8, NONE),
31 PAD_NC(GPP_B9, NONE),
32 PAD_NC(GPP_B10, NONE),
33 PAD_CFG_NF(GPP_B11, NONE, RSMRST, NF1), /* PMCALERT# */
34 PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* SLP_S0# */
35 PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* PLTRST# */
36 PAD_CFG_NF(GPP_B14, NONE, PLTRST, NF1), /* SPKR */
37 PAD_NC(GPP_B15, NONE),
38 PAD_NC(GPP_B16, NONE),
39 PAD_NC(GPP_B17, NONE),
40 PAD_CFG_GPO(GPP_B18, 0, DEEP),
41 PAD_NC(GPP_B19, NONE),
42 PAD_NC(GPP_B20, NONE),
43 PAD_NC(GPP_B21, NONE),
44 PAD_NC(GPP_B22, NONE),
45 PAD_CFG_GPO(GPP_B23, 0, DEEP),
46 PAD_CFG_NF(GPP_B24, NONE, DEEP, NF1), /* GSPI0_CLK_LOOPBK */
47 PAD_CFG_NF(GPP_B25, NONE, DEEP, NF1), /* GSPI1_CLK_LOOPBK */
49 /* ------- GPIO Group GPP_T ------- */
50 PAD_NC(GPP_T0, NONE),
51 PAD_NC(GPP_T1, NONE),
52 PAD_CFG_NF(GPP_T2, DN_20K, DEEP, NF2), /* FUSA_DIAGTEST_EN */
53 PAD_CFG_NF(GPP_T3, DN_20K, DEEP, NF2), /* FUSA_DIAGTEST_MODE */
54 PAD_NC(GPP_T4, NONE),
55 PAD_NC(GPP_T5, NONE),
56 PAD_NC(GPP_T6, NONE),
57 PAD_NC(GPP_T7, NONE),
58 PAD_NC(GPP_T8, NONE),
59 PAD_NC(GPP_T9, NONE),
60 PAD_NC(GPP_T10, NONE),
61 PAD_NC(GPP_T11, NONE),
62 PAD_NC(GPP_T12, NONE),
63 PAD_NC(GPP_T13, NONE),
64 PAD_NC(GPP_T14, NONE),
65 PAD_NC(GPP_T15, NONE),
67 /* ------- GPIO Group GPP_A ------- */
68 PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* ESPI_IO0 */
69 PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1), /* ESPI_IO1 */
70 PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1), /* ESPI_IO2 */
71 PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1), /* ESPI_IO3 */
72 PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1), /* ESPI_CS0# */
73 PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* ESPI_ALERT0# */
74 PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* ESPI_ALERT1# */
75 PAD_NC(GPP_A7, NONE),
76 PAD_NC(GPP_A8, NONE),
77 PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1), /* ESPI_CLK */
78 PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), /* ESPI_RESET# */
79 PAD_NC(GPP_A11, NONE),
80 PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1), /* SATAXPCIE1 */
81 PAD_CFG_GPO(GPP_A13, 1, PLTRST),
82 PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), /* USB_OC1# */
83 PAD_CFG_NF(GPP_A15, NONE, DEEP, NF1), /* USB_OC2# */
84 PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), /* USB_OC3# */
85 PAD_NC(GPP_A17, NONE),
86 PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* DDSP_HPDB */
87 PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* DDSP_HPD1 */
88 PAD_NC(GPP_A20, NONE),
89 PAD_CFG_GPO(GPP_A21, 1, PLTRST),
90 PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1), /* DDPC_CTRLDATA */
91 PAD_CFG_NF(GPP_A23, UP_20K, DEEP, NF1), /* ESPI_CS1# */
92 PAD_CFG_NF(GPP_ESPI_CLK_LOOPBK, NONE, DEEP, NF1), /* GPP_ESPI_CLK_LOOPBK */
94 /* ------- GPIO Community 1 ------- */
96 /* ------- GPIO Group GPP_S ------- */
97 PAD_NC(GPP_S0, NONE),
98 PAD_NC(GPP_S1, NONE),
99 PAD_NC(GPP_S2, NONE),
100 PAD_NC(GPP_S3, NONE),
101 PAD_NC(GPP_S4, NONE),
102 PAD_NC(GPP_S5, NONE),
103 PAD_NC(GPP_S6, NONE),
104 PAD_NC(GPP_S7, NONE),
106 /* ------- GPIO Group GPP_I ------- */
107 PAD_NC(GPP_I0, NONE),
108 PAD_NC(GPP_I1, NONE),
109 PAD_NC(GPP_I2, NONE),
110 PAD_NC(GPP_I3, NONE),
111 PAD_NC(GPP_I4, NONE),
112 PAD_NC(GPP_I5, NONE),
113 PAD_NC(GPP_I6, NONE),
114 PAD_NC(GPP_I7, NONE),
115 PAD_NC(GPP_I8, NONE),
116 PAD_NC(GPP_I9, NONE),
117 PAD_NC(GPP_I10, NONE),
118 PAD_NC(GPP_I11, NONE),
119 PAD_NC(GPP_I12, NONE),
120 PAD_NC(GPP_I13, NONE),
121 PAD_NC(GPP_I14, NONE),
122 PAD_NC(GPP_I15, NONE),
123 PAD_NC(GPP_I16, NONE),
124 PAD_NC(GPP_I17, NONE),
125 PAD_NC(GPP_I18, NONE),
126 PAD_NC(GPP_I19, NONE),
128 /* ------- GPIO Group GPP_H ------- */
129 PAD_CFG_GPO(GPP_H0, 0, DEEP),
130 PAD_CFG_GPO(GPP_H1, 0, DEEP),
131 PAD_CFG_GPO(GPP_H2, 0, DEEP),
132 PAD_CFG_GPO(GPP_H3, 1, PLTRST),
133 PAD_NC(GPP_H4, NONE),
134 PAD_NC(GPP_H5, NONE),
135 PAD_NC(GPP_H6, NONE),
136 PAD_NC(GPP_H7, NONE),
137 PAD_NC(GPP_H8, NONE),
138 PAD_NC(GPP_H9, NONE),
139 PAD_NC(GPP_H10, NONE),
140 PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1), /* n/a */
141 PAD_NC(GPP_H12, NONE),
142 PAD_NC(GPP_H13, NONE),
143 PAD_NC(GPP_H14, NONE),
144 PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* DDPB_CTRLCLK */
145 PAD_NC(GPP_H16, NONE),
146 PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* DDPB_CTRLDATA */
147 PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* PROC_C10_GATE# */
148 PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* SRCCLKREQ4# */
149 PAD_NC(GPP_H20, NONE),
150 PAD_NC(GPP_H21, NONE),
151 PAD_NC(GPP_H22, NONE),
152 PAD_NC(GPP_H23, NONE),
154 /* ------- GPIO Group GPP_D ------- */
155 PAD_NC(GPP_D0, NONE),
156 PAD_NC(GPP_D1, NONE),
157 PAD_NC(GPP_D2, NONE),
158 PAD_NC(GPP_D3, NONE),
159 PAD_NC(GPP_D4, NONE),
160 PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* SRCCLKREQ0# */
161 PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* SRCCLKREQ1# */
162 PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* SRCCLKREQ2# */
163 PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* SRCCLKREQ3# */
164 PAD_CFG_NF(GPP_D9, NATIVE, DEEP, NF5), /* BSSB_LS2_RX */
165 PAD_CFG_NF(GPP_D10, NATIVE, DEEP, NF5), /* BSSB_LS2_TX */
166 PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF5), /* BSSB_LS3_RX */
167 PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF5), /* BSSB_LS3_TX */
168 PAD_NC(GPP_D13, NONE),
169 PAD_CFG_GPO(GPP_D14, 1, PLTRST),
170 PAD_NC(GPP_D15, NONE),
171 PAD_NC(GPP_D16, NONE),
172 PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), /* UART1_RXD */
173 PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), /* UART1_TXD */
174 PAD_NC(GPP_D19, NONE),
175 PAD_CFG_NF(GPP_GSPI2_CLK_LOOPBK, NONE, DEEP, NF1), /* GPP_GSPI2_CLK_LOOPBK */
177 /* ------- GPIO Group vGPIO ------- */
178 PAD_CFG_GPO(GPP_VGPIO_0, 0, DEEP),
179 PAD_CFG_GPI_TRIG_OWN(GPP_VGPIO_4, NONE, DEEP, OFF, ACPI),
180 PAD_CFG_GPIO_BIDIRECT(GPP_VGPIO_5, 1, NONE, DEEP, LEVEL, ACPI),
181 PAD_CFG_NF(GPP_VGPIO_6, NONE, DEEP, NF1), /* GPP_VGPIO_6 */
182 PAD_CFG_NF(GPP_VGPIO_7, NONE, DEEP, NF1), /* GPP_VGPIO_7 */
183 PAD_CFG_NF(GPP_VGPIO_8, NONE, DEEP, NF1), /* GPP_VGPIO_8 */
184 PAD_CFG_NF(GPP_VGPIO_9, NONE, DEEP, NF1), /* GPP_VGPIO_9 */
185 PAD_CFG_NF(GPP_VGPIO_10, NONE, DEEP, NF1), /* GPP_VGPIO_10 */
186 PAD_CFG_NF(GPP_VGPIO_11, NONE, DEEP, NF1), /* GPP_VGPIO_11 */
187 PAD_CFG_NF(GPP_VGPIO_12, NONE, DEEP, NF1), /* GPP_VGPIO_12 */
188 PAD_CFG_NF(GPP_VGPIO_13, NONE, DEEP, NF1), /* GPP_VGPIO_13 */
189 PAD_CFG_NF(GPP_VGPIO_18, NONE, DEEP, NF1), /* GPP_VGPIO_18 */
190 PAD_CFG_NF(GPP_VGPIO_19, NONE, DEEP, NF1), /* GPP_VGPIO_19 */
191 PAD_CFG_NF(GPP_VGPIO_20, NONE, DEEP, NF1), /* GPP_VGPIO_20 */
192 PAD_CFG_NF(GPP_VGPIO_21, NONE, DEEP, NF1), /* GPP_VGPIO_21 */
193 PAD_CFG_NF(GPP_VGPIO_22, NONE, DEEP, NF1), /* GPP_VGPIO_22 */
194 PAD_CFG_NF(GPP_VGPIO_23, NONE, DEEP, NF1), /* GPP_VGPIO_23 */
195 PAD_CFG_NF(GPP_VGPIO_24, NONE, DEEP, NF1), /* GPP_VGPIO_24 */
196 PAD_CFG_NF(GPP_VGPIO_25, NONE, DEEP, NF1), /* GPP_VGPIO_25 */
197 PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF1), /* GPP_VGPIO_30 */
198 PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF1), /* GPP_VGPIO_31 */
199 PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF1), /* GPP_VGPIO_32 */
200 PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF1), /* GPP_VGPIO_33 */
201 PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* GPP_VGPIO_34 */
202 PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* GPP_VGPIO_35 */
203 PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* GPP_VGPIO_36 */
204 PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* GPP_VGPIO_37 */
206 /* ------- GPIO Community 2 ------- */
208 /* ------- GPIO Group GPP_GPD ------- */
209 PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* BATLOW# */
210 PAD_CFG_NF(GPD1, NONE, PWROK, NF1), /* ACPRESENT */
211 PAD_CFG_GPO(GPD2, 1, PLTRST),
212 PAD_CFG_NF(GPD3, NONE, PWROK, NF1), /* PWRBTN# */
213 PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* SLP_S3# */
214 PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* SLP_S4# */
215 PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* SLP_A# */
216 PAD_CFG_GPO(GPD7, 0, PWROK),
217 PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK */
218 PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* SLP_WLAN# */
219 PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* SLP_S5# */
220 PAD_CFG_GPO(GPD11, 0, PWROK),
221 PAD_CFG_NF(GPD_INPUT3VSEL, NONE, PWROK, NF1), /* GPD_INPUT3VSEL */
222 PAD_CFG_NF(GPD_SLP_LANB, NONE, PWROK, NF1), /* GPD_SLP_LANB */
223 PAD_CFG_NF(GPD_SLP_SUSB, NONE, PWROK, NF1), /* GPD_SLP_SUSB */
224 PAD_CFG_NF(GPD_WAKEB, NONE, PWROK, NF1), /* GPD_WAKEB */
225 PAD_CFG_NF(GPD_DRAM_RESETB, NONE, PWROK, NF1), /* GPD_DRAM_RESETB */
227 /* ------- GPIO Community 4 ------- */
229 /* ------- GPIO Group GPP_C ------- */
230 PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMBCLK */
231 PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMBDATA */
232 PAD_CFG_NF(GPP_C2, NONE, DEEP, NF1), /* SMBALERT# */
233 PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0CLK */
234 PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0DATA */
235 PAD_CFG_TERM_GPO(GPP_C5, 1, DN_20K, PLTRST),
236 PAD_CFG_NF(GPP_C6, NONE, RSMRST, NF1), /* SML1CLK */
237 PAD_CFG_NF(GPP_C7, NONE, RSMRST, NF1), /* SML1DATA */
238 PAD_NC(GPP_C8, NONE),
239 PAD_NC(GPP_C9, NONE),
240 PAD_NC(GPP_C10, NONE),
241 PAD_NC(GPP_C11, NONE),
242 PAD_NC(GPP_C12, NONE),
243 PAD_NC(GPP_C13, NONE),
244 PAD_NC(GPP_C14, NONE),
245 PAD_NC(GPP_C15, NONE),
246 PAD_NC(GPP_C16, NONE),
247 PAD_NC(GPP_C17, NONE),
248 PAD_NC(GPP_C18, NONE),
249 PAD_NC(GPP_C19, NONE),
250 PAD_NC(GPP_C20, NONE),
251 PAD_NC(GPP_C21, NONE),
252 PAD_NC(GPP_C22, NONE),
253 PAD_NC(GPP_C23, NONE),
255 /* ------- GPIO Group GPP_F ------- */
256 PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), /* CNV_BRI_DT */
257 PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1), /* CNV_BRI_RSP */
258 PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), /* CNV_RGI_DT */
259 PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1), /* CNV_RGI_RSP */
260 PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* CNV_RF_RESET# */
261 PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1), /* n/a */
262 PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), /* CNV_PA_BLANKING */
263 PAD_CFG_GPO(GPP_F7, 0, DEEP),
264 PAD_NC(GPP_F8, NONE),
265 PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1), /* BOOTMPC */
266 PAD_CFG_GPO(GPP_F10, 0, DEEP),
267 PAD_NC(GPP_F11, NONE),
268 PAD_NC(GPP_F12, NONE),
269 PAD_NC(GPP_F13, NONE),
270 PAD_NC(GPP_F14, NONE),
271 PAD_NC(GPP_F15, NONE),
272 PAD_NC(GPP_F16, NONE),
273 PAD_NC(GPP_F17, NONE),
274 PAD_NC(GPP_F18, NONE),
275 PAD_NC(GPP_F19, NONE),
276 PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), /* Reserved */
277 PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), /* Reserved */
278 PAD_NC(GPP_F22, NONE),
279 PAD_NC(GPP_F23, NONE),
280 PAD_NC(GPP_F_CLK_LOOPBK, NONE),
282 /* ------- GPIO Group GPP_HVCMOS ------- */
283 PAD_CFG_NF(GPP_L_BKLTEN, NONE, DEEP, NF1), /* n/a */
284 PAD_CFG_NF(GPP_L_BKLTCTL, NONE, DEEP, NF1), /* n/a */
285 PAD_CFG_NF(GPP_L_VDDEN, NONE, DEEP, NF1), /* n/a */
286 PAD_CFG_NF(GPP_SYS_PWROK, NONE, DEEP, NF1), /* n/a */
287 PAD_CFG_NF(GPP_SYS_RESETB, NONE, DEEP, NF1), /* n/a */
288 PAD_CFG_NF(GPP_MLK_RSTB, NONE, DEEP, NF1), /* n/a */
290 /* ------- GPIO Group GPP_E ------- */
291 PAD_CFG_NF(GPP_E0, UP_20K, DEEP, NF1), /* SATAXPCIE0 */
292 PAD_NC(GPP_E1, NONE),
293 PAD_NC(GPP_E2, NONE),
294 PAD_NC(GPP_E3, NONE),
295 PAD_NC(GPP_E4, NONE),
296 PAD_NC(GPP_E5, NONE),
297 PAD_CFG_TERM_GPO(GPP_E6, 1, DN_20K, PLTRST),
298 PAD_NC(GPP_E7, NONE),
299 PAD_CFG_GPO(GPP_E8, 0, PLTRST),
300 PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* USB_OC0# */
301 PAD_NC(GPP_E10, NONE),
302 PAD_NC(GPP_E11, NONE),
303 PAD_NC(GPP_E12, NONE),
304 PAD_NC(GPP_E13, NONE),
305 PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDSP_HPDA */
306 PAD_CFG_NF(GPP_E15, NONE, DEEP, NF2), /* Reserved */
307 PAD_CFG_GPO(GPP_E16, 0, PLTRST),
308 PAD_NC(GPP_E17, NONE),
309 PAD_NC(GPP_E18, NATIVE),
310 PAD_NC(GPP_E19, NATIVE),
311 PAD_CFG_NF(GPP_E20, NATIVE, DEEP, NF5), /* BSSB_LS1_RX */
312 PAD_CFG_NF(GPP_E21, NATIVE, DEEP, NF5), /* BSSB_LS1_TX */
313 PAD_CFG_NF(GPP_E22, DN_20K, DEEP, NF1), /* DDPA_CTRLCLK */
314 PAD_CFG_NF(GPP_E23, NONE, DEEP, NF1), /* DDPA_CTRLDATA */
315 PAD_NC(GPP_E_CLK_LOOPBK, NONE),
317 /* ------- GPIO Community 5 ------- */
319 /* ------- GPIO Group GPP_R ------- */
320 PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), /* HDA_BCLK */
321 PAD_CFG_NF(GPP_R1, NONE, DEEP, NF1), /* HDA_SYNC */
322 PAD_CFG_NF(GPP_R2, NONE, DEEP, NF1), /* HDA_SDO */
323 PAD_CFG_NF(GPP_R3, NONE, DEEP, NF1), /* HDA_SDI0 */
324 PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), /* HDA_RST# */
325 PAD_NC(GPP_R5, NONE),
326 PAD_NC(GPP_R6, NONE),
327 PAD_NC(GPP_R7, NONE),
330 #endif /* CFG_GPIO_H */