repo.or.cz
/
coreboot2.git
/
blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
blame
|
history
|
raw
|
HEAD
mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git]
/
src
/
mainboard
/
arm
/
rdn2
/
Kconfig.name
blob
1a9eed5f82f5f174997841ee922e2ab1eb178a19
1
# SPDX-License-Identifier: GPL-2.0-or-later
2
3
config BOARD_ARM_RDN2
4
bool "Neoverse N2"
5
help
6
To execute, do:
7
FVP_RD_N2\models\Win64_VC2019\FVP_RD_N2 -C board.flashloader0.fname=coreboot.rom \
8
-C css.trustedBootROMloader.fname=bl1.bin