mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / arm / rdn2 / acpi.c
blob941c2f4767044dfd716ce835025ba5f9a9dd60bb
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <acpi/acpi_iort.h>
5 #include <console/console.h>
6 #include <mainboard/addressmap.h>
7 #include <stdio.h>
9 void acpi_fill_fadt(acpi_fadt_t *fadt)
13 unsigned long acpi_fill_madt(unsigned long current)
15 return current;
18 uintptr_t platform_get_gicd_base(void)
20 return RDN2_GIC_DIST;
23 uintptr_t platform_get_gicr_base(void)
25 return RDN2_GIC_REDIST;
28 void platform_fill_gicc(acpi_madt_gicc_t *gicc)
30 gicc->physical_base_address = platform_get_gicd_base();
31 gicc->gicv = RDN2_VGIC_BASE;
32 gicc->gich = RDN2_HGIC_BASE;
34 if (gicc->mpidr >> 16 == 0xf)
35 gicc->trbe_interrupt = 0x180c;
36 else
37 gicc->trbe_interrupt = 0x500b;
40 static uintptr_t gic_its[] = {
41 RDN2_GIC_ITS(0),
42 RDN2_GIC_ITS(1),
43 RDN2_GIC_ITS(2),
44 RDN2_GIC_ITS(3),
45 RDN2_GIC_ITS(4),
46 RDN2_GIC_ITS(5)
49 int platform_get_gic_its(uintptr_t **base)
51 *base = gic_its;
52 return ARRAY_SIZE(gic_its);
55 void mainboard_fill_fadt(acpi_fadt_t *fadt)
57 fadt->preferred_pm_profile = PM_DESKTOP;
58 fadt->ARM_boot_arch = 1;
61 void acpi_soc_fill_gtdt(acpi_gtdt_t *gtdt)
63 /* his value is optional if the system implements EL3 (Security
64 Extensions). If not provided, this field must be 0xFFFFFFFFFFFFFFFF. */
65 gtdt->counter_block_address = UINT64_MAX;
66 gtdt->secure_el1_interrupt = SEC_EL1_TIMER_GISV;
67 gtdt->secure_el1_flags = RDN2_TIMER_FLAGS;
68 gtdt->non_secure_el1_interrupt = NONSEC_EL1_TIMER_GSIV;
69 gtdt->non_secure_el1_flags = RDN2_TIMER_FLAGS;
70 gtdt->virtual_timer_interrupt = VIRTUAL_TIMER_GSIV;
71 gtdt->virtual_timer_flags = RDN2_TIMER_FLAGS;
72 gtdt->non_secure_el2_interrupt = NONSEC_EL2_TIMER_GSIV;
73 gtdt->non_secure_el2_flags = RDN2_TIMER_FLAGS;
74 /* his value is optional if the system implements EL3
75 (Security Extensions). If not provided, this field must be
76 0xFFFFFFFFFFFFFFF. */
77 gtdt->counter_read_block_address = UINT64_MAX;
80 unsigned long acpi_soc_gtdt_add_timers(uint32_t *count, unsigned long current)
82 struct acpi_gtdt_timer_entry timers[2];
84 memset(timers, 0, sizeof(timers));
85 (*count)++;
86 timers[0].frame_number = 0;
87 timers[0].base_address = RDN2_GT_FRAME1_CTL_BASE;
88 timers[0].el0_base_address = UINT64_MAX;
89 timers[0].timer_interrupt = RDN2_GT_FRAME1_GSIV;
90 timers[0].timer_flags = 0;
91 timers[0].virtual_timer_interrupt = 0;
92 timers[0].virtual_timer_flags = 0;
93 timers[0].common_flags = ACPI_GTDT_GT_ALWAYS_ON;
96 (*count)++;
97 timers[1].frame_number = 1;
98 timers[1].base_address = RDN2_GT_FRAME0_CTL_BASE;
99 timers[1].el0_base_address = UINT64_MAX;
100 timers[1].timer_interrupt = RDN2_GT_FRAME0_GSIV;
101 timers[1].timer_flags = 0;
102 timers[1].virtual_timer_interrupt = 0;
103 timers[1].virtual_timer_flags = 0;
104 timers[1].common_flags = ACPI_GTDT_GT_ALWAYS_ON | ACPI_GTDT_GT_IS_SECURE_TIMER;
106 current = acpi_gtdt_add_timer_block(current, RDN2_GT_CTL_BASE, timers, 2);
108 (*count)++;
109 current = acpi_gtdt_add_watchdog(current, RDN2_GWDT_REFRESH, RDN2_GWDT_CONTROL,
110 RDN2_GWDT_WS0_GSIV, 0);
111 /* Secure */
112 current = acpi_gtdt_add_watchdog(current, RDN2_GWDT_REFRESH, RDN2_GWDT_CONTROL,
113 RDN2_GWDT_WS1_GSIV, ACPI_GTDT_WATCHDOG_SECURE);
115 return current;
118 static unsigned long acpi_soc_fill_iort_tcu4(acpi_iort_t *iort, unsigned long current)
120 acpi_iort_node_t *its, *smmu_v3, *named_comp;
121 u32 identifiers[] = {4};
122 u32 its_reference, smmuv3_reference;
124 current = acpi_iort_its_entry(current, iort, &its, 1, identifiers);
125 its_reference = (unsigned long)its - (unsigned long)iort;
127 current = acpi_iort_smmuv3_entry(current, iort, &smmu_v3, RDN2_SMMU_V3(4), ACPI_IORT_SMMU_V3_FLAGS);
128 smmuv3_reference = (unsigned long)smmu_v3 - (unsigned long)iort;
130 /* Individual maps here */
131 current = acpi_iort_id_map_entry(current, smmu_v3, 0, 1, 0x80000, its_reference,
132 ACPI_IORT_ID_SINGLE_MAPPING);
134 current = acpi_iort_id_map_entry(current, smmu_v3, 0x10000, 10, 0x10000, its_reference, 0);
136 current = acpi_iort_id_map_entry(current, smmu_v3, 0x30000, 10, 0x30000, its_reference, 0);
138 /* SMMUV3 entry length includes mapping */
140 for (int n = 0 ; n < 2 ; n++) {
141 /* DMA */
142 char dma[32];
143 snprintf(dma, sizeof(dma), "\\_SB_.DMA%d", n);
145 current = acpi_iort_nc_entry(current, iort, &named_comp, 0, 0, 0x30, dma);
147 for (int i = 0 ; i < 9 ; i++) {
148 /* ID */
149 current = acpi_iort_id_map_entry(current, named_comp, i, 1, 0x10000 + n * 0x20000 + i,
150 smmuv3_reference, ACPI_IORT_ID_SINGLE_MAPPING);
155 return current;
158 static unsigned long acpi_soc_fill_iort_tcu(u32 i, u16 id_count, u32 *smmu_offset,
159 acpi_iort_t *iort, unsigned long current)
162 acpi_iort_node_t *its, *smmu_v3;
163 static u32 id_base = 0x30000;
164 u32 its_reference;
166 current = acpi_iort_its_entry(current, iort, &its, 1, &i);
167 its_reference = (unsigned long)its - (unsigned long)iort;
169 current = acpi_iort_smmuv3_entry(current, iort, &smmu_v3, RDN2_SMMU_V3(i), ACPI_IORT_SMMU_V3_FLAGS);
171 *smmu_offset = (unsigned long)smmu_v3 - (unsigned long)iort;
173 /* Individual maps here */
174 current = acpi_iort_id_map_entry(current, smmu_v3, 0, 1, 0x80000, its_reference,
175 ACPI_IORT_ID_SINGLE_MAPPING);
177 current = acpi_iort_id_map_entry(current, smmu_v3, id_base, id_count, id_base, its_reference, 0);
178 id_base += id_count;
180 /* SMMUV3 entry length includes mapping */
182 return current;
185 unsigned long acpi_soc_fill_iort(acpi_iort_t *iort, unsigned long current)
187 acpi_iort_node_t *root_comp;
188 u32 smmu_offset[4];
189 uint32_t id_count[] = {768, 256, 256, 256};
191 for (int i = 0; i < 4; i++)
192 current = acpi_soc_fill_iort_tcu(i, id_count[i], &smmu_offset[i], iort, current);
194 current = acpi_soc_fill_iort_tcu4(iort, current);
196 current = acpi_iort_rc_entry(current, iort, &root_comp, 0, ACPI_IORT_ATS_SUPPORTED, 0,
197 0x30, 0);
199 u32 base = 0;
200 for (int i = 0 ; i < 4 ; i++) {
201 current = acpi_iort_id_map_entry(current, root_comp, base, id_count[i], 0x30000 + base,
202 smmu_offset[i], 0);
203 base += id_count[i];
206 return current;