mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / arm / rdn2 / cbmem.c
bloba8ad03399ca6f69aa6d01a6392b1d5865e67529c
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <cbmem.h>
4 #include <console/console.h>
5 #include <ramdetect.h>
6 #include <symbols.h>
8 uintptr_t cbmem_top_chipset(void)
10 return (uintptr_t)_dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB);