mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / arm / rdn2 / dsdt.asl
blob2e795b8eeddacda113837b7658a8efe2ef9a086f
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <mainboard/addressmap.h>
5 DefinitionBlock(
6         "dsdt.aml",
7         "DSDT",
8         ACPI_DSDT_REV_2,
9         OEM_ID,
10         ACPI_TABLE_CREATOR,
11         0x20230621      // OEM revision
14         #include <acpi/dsdt_top.asl>
16         Device (COM0)
17         {
18                 Name (_HID, "ARMH0011")  // _HID: Hardware ID
19                 Name (_UID, Zero)  // _UID: Unique ID
20                 Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
21                 {
22                         Memory32Fixed (ReadWrite,
23                                 RDN2_UART_NS_BASE,       // Address Base
24                                 0x00001000,              // Address Length
25                                 )
26                         Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
27                         {
28                                 RDN2_UART_NS_GSIV,
29                         }
30                 })
31                 Method (_STA, 0, NotSerialized)  // _STA: Status
32                 {
33                         Return (0xf)
34                 }
35         }
37         Device (VR00)
38         {
39                 Name (_HID, "LNRO0005")  // _HID: Hardware ID
40                 Name (_UID, Zero)  // _UID: Unique ID
41                 Name (_CCA, One)  // _CCA: Cache Coherency Attribute
42                 Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
43                 {
44                         Memory32Fixed (ReadWrite,
45                                 0x0C130000,              // Address Base
46                                 0x00010000,              // Address Length
47                                 )
48                         Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
49                         {
50                                 0x000001CA,
51                         }
52                 })
53         }
55         Device (VR01)
56         {
57                 Name (_HID, "LNRO0005")  // _HID: Hardware ID
58                 Name (_UID, One)  // _UID: Unique ID
59                 Name (_CCA, One)  // _CCA: Cache Coherency Attribute
60                 Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
61                 {
62                         Memory32Fixed (ReadWrite,
63                                 0x0C150000,              // Address Base
64                                 0x00010000,              // Address Length
65                                 )
66                         Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
67                         {
68                                 0x000001CC,
69                         }
70                 })
71         }
74         Device (\_SB.DMA0)
75         {
76             Name (_HID, "ARMH0330")  // _HID: Hardware ID
77             Name (_UID, Zero)  // _UID: Unique ID
78             Name (_CCA, One)  // _CCA: Cache Coherency Attribute
79             Name (_STA, 0x0F)  // _STA: Status
80             Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
81             {
82                 Name (RBUF, ResourceTemplate ()
83                 {
84                     QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
85                         0x0000000000000000, // Granularity
86                         0x0000000000000000, // Range Minimum
87                         0x0000000000000001, // Range Maximum
88                         0x0000000000000000, // Translation Offset
89                         0x0000000000000002, // Length
90                         ,, _Y02, AddressRangeMemory, TypeStatic)
91                     Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
92                     {
93                         0x000001ED,
94                         0x000001EE,
95                         0x000001EF,
96                         0x000001F0,
97                         0x000001F1,
98                         0x000001F2,
99                         0x000001F3,
100                         0x000001F4,
101                         0x000001F5,
102                     }
103                 })
104                 CreateQWordField (RBUF, \_SB.DMA0._CRS._Y02._MIN, MIN2)  // _MIN: Minimum Base Address
105                 CreateQWordField (RBUF, \_SB.DMA0._CRS._Y02._MAX, MAX2)  // _MAX: Maximum Base Address
106                 CreateQWordField (RBUF, \_SB.DMA0._CRS._Y02._LEN, LEN2)  // _LEN: Length
107                 MIN2 = RDN2_DMA0_BASE
108                 MAX2 = (MIN2 + 0xFFFF)
109                 LEN2 = 0x00010000
110                 Return (RBUF) /* \_SB_.DMA0._CRS.RBUF */
111             }
112         }
114         Device (\_SB.DMA1)
115         {
116             Name (_HID, "ARMH0330")  // _HID: Hardware ID
117             Name (_UID, One)  // _UID: Unique ID
118             Name (_CCA, One)  // _CCA: Cache Coherency Attribute
119             Name (_STA, 0x0F)  // _STA: Status
120             Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
121             {
122                 Name (RBUF, ResourceTemplate ()
123                 {
124                     QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
125                         0x0000000000000000, // Granularity
126                         0x0000000000000000, // Range Minimum
127                         0x0000000000000001, // Range Maximum
128                         0x0000000000000000, // Translation Offset
129                         0x0000000000000002, // Length
130                         ,, _Y03, AddressRangeMemory, TypeStatic)
131                     Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
132                     {
133                         0x000001F7,
134                         0x000001F8,
135                         0x000001F9,
136                         0x000001FA,
137                         0x000001FB,
138                         0x000001FC,
139                         0x000001FD,
140                         0x000001FE,
141                         0x000001FF,
142                     }
143                 })
144                 CreateQWordField (RBUF, \_SB.DMA1._CRS._Y03._MIN, MIN2)  // _MIN: Minimum Base Address
145                 CreateQWordField (RBUF, \_SB.DMA1._CRS._Y03._MAX, MAX2)  // _MAX: Maximum Base Address
146                 CreateQWordField (RBUF, \_SB.DMA1._CRS._Y03._LEN, LEN2)  // _LEN: Length
147                 MIN2 = RDN2_DMA1_BASE
148                 MAX2 = (MIN2 + 0xFFFF)
149                 LEN2 = 0x00010000
150                 Return (RBUF) /* \_SB_.DMA1._CRS.RBUF */
151             }
152         }
153         Device (PCI0)
154         {
155                 Name (_HID, EisaId ("PNP0A08")) // PCI Express Bus _HID: Hardware ID
156                 Name (_CID, EisaId ("PNP0A03")) // PCI Bus _CID: Compatible ID
157                 Name (_SEG, Zero)  // _SEG: PCI Segment
158                 Name (_BBN, Zero)  // _BBN: BIOS Bus Number
159                 Name (_UID, "PCI0")  // _UID: Unique ID
160                 Name (_CCA, One)  // _CCA: Cache Coherency Attribute
162                 Method (_STA, 0, NotSerialized)  // _STA: Status
163                 {
164                         Return (0xf)
165                 }
167                 Method (_CBA, 0, NotSerialized)  // _CBA: Configuration Base Address
168                 {
169                         Return (RDN2_PCIE_ECAM_BASE)
170                 }
172                 Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
173                 {
174                         Name (RBUF, ResourceTemplate ()
175                         {
176                                 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
177                                         0x0000,                  // Granularity
178                                         0x0000,                  // Range Minimum
179                                         0x00FF,                  // Range Maximum
180                                         0x0000,                  // Translation Offset
181                                         0x0100,                  // Length
182                                         ,, )
183                                 DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
184                                         0x00000000,              // Granularity
185                                         RDN2_PCIE_MMIO_BASE,             // Range Minimum
186                                         RDN2_PCIE_MMIO_LIMIT,            // Range Maximum
187                                         0x00000000,              // Translation Offset
188                                         RDN2_PCIE_MMIO_SIZE,             // Length
189                                         ,, , AddressRangeMemory, TypeStatic)
190                                 QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
191                                         0x0000000000000000, // Granularity
192                                         RDN2_PCIE_MMIO_HIGH_BASE, // Range Minimum
193                                         RDN2_PCIE_MMIO_HIGH_LIMIT, // Range Maximum
194                                         0x0000000000000000, // Translation Offset
195                                         RDN2_PCIE_MMIO_HIGH_SIZE, // Length
196                                         ,, , AddressRangeMemory, TypeStatic)
197                                 DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
198                                         0x00000000,              // Granularity
199                                         0x00000000,              // Range Minimum
200                                         0x007FFFFF,              // Range Maximum
201                                         0x77800000,              // Translation Offset
202                                         0x00800000,              // Length
203                                         ,, , TypeTranslation, DenseTranslation)
204                         })
205                         Return (RBUF) /* \PCI0._CRS.RBUF */
206                 }
208                 Device (RES0)
209                 {
210                         Name (_HID, "PNP0C02" /* PNP Motherboard Resources */)  // _HID: Hardware ID
211                         Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
212                         {
213                                 QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
214                                         0x0000000000000000, // Granularity
215                                         RDN2_PCIE_ECAM_BASE, // Range Minimum
216                                         RDN2_PCIE_ECAM_LIMIT, // Range Maximum
217                                         0x0000000000000000, // Translation Offset
218                                         RDN2_PCIE_ECAM_SIZE, // Length
219                                         ,, , AddressRangeMemory, TypeStatic)
220                         })
221                         Method (_STA, 0, NotSerialized)  // _STA: Status
222                         {
223                                 Return (0xf)
224                         }
225                 }
226         }