src/mainboard/arm/rdn2/memlayout.ld

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <memlayout.h>
   4 #include <arch/header.ld>
   5
   6 /*
   7  * Memory map for Neoverse N2
   8  * See Technical Reference: Table 5-2: FVP board peripherals
   9  */
  10 SECTIONS
  11 {
  12         REGION(flash, 0x8000000, CONFIG_ROM_SIZE, 8)
  13
  14         REGION(dev_mem, 0x0c010000, 2M, 8)
  15         DRAM_START(0x80000000)
  16         BOOTBLOCK(0xe0000000, 64K)
  17         STACK(0xe0010000, 64K)
  18         CBFS_MCACHE(0xe0020000, 8K)
  19         FMAP_CACHE(0xe0022000 , 4K)
  20         TIMESTAMP(0xe0023000, 4K)
  21         ROMSTAGE(0xe0024000, 128K)
  22         TTB(0xe0060000, 128K)
  23         RAMSTAGE(0xe00a0000, 16M)
  24         REGION(fdt_pointer, 0xe10a0000, ARCH_POINTER_ALIGN_SIZE, ARCH_POINTER_ALIGN_SIZE)
  25
  26         POSTRAM_CBFS_CACHE(0xe11f0000, 1M)
  27 }