repo.or.cz
/
coreboot2.git
/
blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
blame
|
history
|
raw
|
HEAD
mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git]
/
src
/
mainboard
/
bytedance
/
bd_egs
/
Makefile.mk
blob
be3ae0c8a292fd148353dc564cadb62c8eb509db
1
## SPDX-License-Identifier: GPL-2.0-only
2
3
bootblock-y
+=
bootblock.c gpio.c
4
romstage-y
+=
romstage.c
5
ramstage-y
+=
ramstage.c gpio.c
6
CPPFLAGS_common
+= -
I
$(
src
)/
mainboard
/$(
MAINBOARDDIR
)/
include